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1. 发明授权

US5929473A MMIC semiconductor device with WN.sub.x capacitor electrode 失效
标题翻译：带有WNx电容电极的MMIC半导体器件
公开(公告)号：US5929473A
公开(公告)日：1999-07-27
申请号：US842646
申请日：1997-04-15
申请人： Kazuya Nishihori , Yoshiaki Kitaura , Yoshikazu Tanabe , Tomonori Aoyama , Kyoichi Suguro , Kumi Okuwada , Shuichi Komatsu , Kazuhide Abe
发明人： Kazuya Nishihori , Yoshiaki Kitaura , Yoshikazu Tanabe , Tomonori Aoyama , Kyoichi Suguro , Kumi Okuwada , Shuichi Komatsu , Kazuhide Abe
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/06 , H01L27/095 , H01L29/92 , H01L29/812
CPC分类号： H01L27/0629 , H01L27/0605 , H01L27/10852 , H01L28/40
摘要： An SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 nm) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.
摘要翻译：在GaAs衬底上依次排列有SiO 2膜和第一布线层。在第一布线层上形成电容器。电容器包括从下侧依次具有由Ti层，Mo层和Pt层构成的多层结构的下电极。电容器还包括由钛酸锶制成的电介质膜。电容器还包括从下侧依次具有由WNx层（120nm）和W层（300nm）构成的多层结构的上部电极。与电介质膜接触的上电极的表面由氮化钨层限定。

2. 发明授权

US5670808A Metal oxide capacitor with a WN.sub.X electrode 失效
标题翻译：具有WNX电极的金属氧化物电容器
公开(公告)号：US5670808A
公开(公告)日：1997-09-23
申请号：US591153
申请日：1996-01-25
申请人： Kazuya Nishihori , Yoshiaki Kitaura , Yoshikazu Tanabe , Tomonori Aoyama , Kyoichi Suguro , Kumi Okuwada , Shuichi Komatsu , Kazuhide Abe
发明人： Kazuya Nishihori , Yoshiaki Kitaura , Yoshikazu Tanabe , Tomonori Aoyama , Kyoichi Suguro , Kumi Okuwada , Shuichi Komatsu , Kazuhide Abe
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/06 , H01L27/095 , H01L29/92 , H01L27/108
CPC分类号： H01L27/0629 , H01L27/0605 , H01L27/10852 , H01L28/40
摘要： A semiconductor device in which an SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 um) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.
摘要翻译：其中SiO 2膜和第一布线层依次布置在GaAs衬底上的半导体器件。在第一布线层上形成电容器。电容器包括从下侧依次具有由Ti层，Mo层和Pt层构成的多层结构的下电极。电容器还包括由钛酸锶制成的电介质膜。电容器还包括从下侧依次具有由WNx层（120μm）和W层（300nm）组成的多层结构的上部电极。与电介质膜接触的上电极的表面由氮化钨层限定。

3. 发明授权

US06114195A Manufacturing method of compound semiconductor field effect transistor 失效
标题翻译：化合物半导体场效应晶体管的制造方法
公开(公告)号：US06114195A
公开(公告)日：2000-09-05
申请号：US192575
申请日：1998-11-17
申请人： Kazuya Nishihori , Yoshiaki Kitaura , Naotaka Uchitomi
发明人： Kazuya Nishihori , Yoshiaki Kitaura , Naotaka Uchitomi
IPC分类号： H01L21/265 , H01L21/335 , H01L21/338 , H01L29/812
CPC分类号： H01L29/66462 , H01L29/66878
摘要： A manufacturing method of compound semiconductor field effect transistor capable of enhancing a gate/drain withstand voltage includes a step of forming a channel layer by implanting ions into the surface of a semi-insulating compound semiconductor substrate and a step of performing a first thermal treatment for removing crystalline defects on the surface of the channel layer. This method also includes a step of forming a compound semiconductor epitaxial layer by use of an epitaxial method on a region covering the channel layer, a step of forming a gate electrode within a region on the epitaxial layer just above the channel layer and a step of forming a source region and a drain region in the substrate. A concentration of the impurity for forming the channel layer at an interface between the channel layer and the epitaxial layer is 45% or under of the highest concentration when forming the channel layer. A good interface between the channel layer and the epitaxial layer can be thereby obtained, and a transistor having the high-quality epitaxial layer can be also acquired.
摘要翻译：能够提高栅极/漏极耐电压的化合物半导体场效应晶体管的制造方法包括通过将离子注入到半绝缘化合物半导体基板的表面中而形成沟道层的步骤，以及对半导体衬底的表面进行第一热处理的步骤去除沟道层表面的晶体缺陷。该方法还包括在覆盖沟道层的区域上利用外延法形成化合物半导体外延层的步骤，在沟道层正上方的外延层的区域内形成栅极电极的工序; 在衬底中形成源区和漏区。在形成沟道层时，在沟道层和外延层之间的界面处形成沟道层的杂质浓度为最高浓度的45％以下。由此可以获得沟道层和外延层之间的良好的界面，并且也可以获得具有高质量外延层的晶体管。

4. 发明授权

US6134424A High-frequency power amplifier and mobile communication device using same 失效
标题翻译：高频功率放大器和移动通信设备使用相同
公开(公告)号：US6134424A
公开(公告)日：2000-10-17
申请号：US943160
申请日：1997-10-03
申请人： Kazuya Nishihori , Yoshiaki Kitaura , Mayumi Morizuka , Atsushi Kameyama , Masami Nagaoka , Hirotsugu Wakimoto , Tadahiro Sasaki
发明人： Kazuya Nishihori , Yoshiaki Kitaura , Mayumi Morizuka , Atsushi Kameyama , Masami Nagaoka , Hirotsugu Wakimoto , Tadahiro Sasaki
IPC分类号： H03F3/60 , H01L29/08 , H01Q1/24 , H01Q11/12 , H01Q23/00 , H03F1/30 , H03F3/193 , H04B1/04 , H04B7/26 , H01L31/112
CPC分类号： H03F1/306 , H01L29/0891 , H01Q1/242 , H01Q11/12 , H01Q23/00 , H03F3/1935 , H03F2200/294 , H03F2200/372
摘要： A MESFET of a GaAs semiconductor device having a p-pocket LDD structure is used for a high-frequency power amplifier of a mobile communication device, in order to decrease current consumption and to increase the continuous operating time of a battery. The high-frequency power amplifier is provided with a gate-bias adjusting feedback element between the drain and gate of the MESFET. Thus, even if there is a great difference between the filled and terminated potentials of the discharge voltage of the battery for supplying electric power to the amplifier, electric power can be supplied near the terminated potential for a long time, so that the mobile communication device can be continuously used for a long time.
摘要翻译：具有p口LDD结构的GaAs半导体器件的MESFET用于移动通信设备的高频功率放大器，以便降低电流消耗并增加电池的连续工作时间。高频功率放大器在MESFET的漏极和栅极之间设有栅极偏置调整反馈元件。因此，即使在向放大器供电的电池的放电电压的充满电位和终止电位之间存在很大差异的情况下，也可以在终止电位附近长时间地供给电力，使得移动通信装置可以连续使用很长时间。

5. 发明授权

US6037619A Field effect transistor and high-frequency power amplifier having same 失效
标题翻译：场效应晶体管和高频功率放大器相同
公开(公告)号：US6037619A
公开(公告)日：2000-03-14
申请号：US037539
申请日：1998-03-10
申请人： Mayumi Morizuka , Yoshiaki Kitaura
发明人： Mayumi Morizuka , Yoshiaki Kitaura
IPC分类号： H01L21/338 , H01L29/812
CPC分类号： H01L29/812
摘要： A field effect transistor comprises: a first conductive type active layer formed on a surface region of a semiconductor substrate; first conductive type, source and drain regions formed on the semiconductor substrate on both sides of the gate electrode, the source and drain regions having a higher density of impurity than that of the active layer; and first conductive type, first and second impurity regions formed on the semiconductor substrate between a channel region below the gate electrode and the source region and between the channel region and the drain region, the first and second impurity regions having a depth, which is substantially the same as or deeper than that of those of the source region and the drain region, the first and second impurity regions having a density of impurity, which is higher than that of the channel region and lower than those of source region and the drain region. Thus, it is possible to provide a field effect transistor having a high power conversion efficiency, and it is possible to increase the drain efficiency and the yield as high as possible.
摘要翻译：场效应晶体管包括：形成在半导体衬底的表面区域上的第一导电型有源层; 第一导电类型，源极和漏极区域形成在栅电极两侧的半导体衬底上，源区和漏区具有比有源层的杂质更高的杂质; 以及形成在所述半导体衬底上的所述栅电极下方的沟道区域和所述源极区域之间以及所述沟道区域和所述漏极区域之间的所述第一和第二杂质区域，所述第一和第二杂质区域具有深度，所述深度基本上与源极区域和漏极区域相同或更深的第一和第二杂质区域的杂质浓度高于沟道区域，并且低于源极区域和漏极区域的杂质浓度。因此，可以提供具有高功率转换效率的场效应晶体管，并且可以尽可能地提高漏极效率和产量。

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