专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07998867B2 Method for manufacturing epitaxial wafer 有权
标题翻译：外延晶片制造方法
公开(公告)号：US07998867B2
公开(公告)日：2011-08-16
申请号：US12740441
申请日：2008-11-06
申请人： Kazushige Takaishi , Tomonori Miura
发明人： Kazushige Takaishi , Tomonori Miura
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： C23C16/4401 , C30B25/12 , C30B29/06 , H01L21/02532 , H01L21/0262 , H01L21/68757
摘要： An epitaxial wafer is provided capable of eliminating particles in a device process, particles being generated from a scratch in a boundary area between a rear surface and a chamfered surface of a wafer. The scratch in the boundary area between the rear surface and the chamfered surface is removed in a scratch removal process. Thus, no particles exist caused by a scratch, at a time of immersion in an etching solution in the device process, and thus a device yield is increased.
摘要翻译：提供了能够消除器件工艺中的颗粒的外延晶片，颗粒是从晶片的后表面和倒角表面之间的边界区域中的划痕产生的。在刮除过程中，在后表面和倒角表面之间的边界区域中的划痕被去除。因此，在器件工艺中浸渍在蚀刻溶液中时，由划痕引起的颗粒不存在，从而提高了器件的产率。

2. 发明申请

US20100261341A1 METHOD FOR MANUFACTURING EPITAXIAL WAFER 有权
标题翻译：制造外延波形的方法
公开(公告)号：US20100261341A1
公开(公告)日：2010-10-14
申请号：US12740441
申请日：2008-11-06
申请人： Kazushige Takaishi , Tomonori Miura
发明人： Kazushige Takaishi , Tomonori Miura
IPC分类号： H01L21/20
CPC分类号： C23C16/4401 , C30B25/12 , C30B29/06 , H01L21/02532 , H01L21/0262 , H01L21/68757
摘要： An epitaxial wafer is provided capable of eliminating particles in a device process, particles being generated from a scratch in a boundary area between a rear surface and a chamfered surface of a wafer. The scratch in the boundary area between the rear surface and the chamfered surface is removed in a scratch removal process. Thus, no particles exist caused by a scratch, at a time of immersion in an etching solution in the device process, and thus a device yield is increased.
摘要翻译：提供了能够消除器件工艺中的颗粒的外延晶片，颗粒是从晶片的后表面和倒角表面之间的边界区域中的划痕产生的。在刮除过程中，在后表面和倒角表面之间的边界区域中的划痕被去除。因此，在器件工艺中浸渍在蚀刻溶液中时，由划痕引起的颗粒不存在，从而提高了器件的产率。

3. 发明申请

US20100237470A1 EPITAXIAL WAFER 审中-公开
标题翻译：外来波浪
公开(公告)号：US20100237470A1
公开(公告)日：2010-09-23
申请号：US12740426
申请日：2008-11-06
申请人： Kazushige Takaishi , Tomonori Miura
发明人： Kazushige Takaishi , Tomonori Miura
IPC分类号： H01L29/30
CPC分类号： C30B29/06 , C30B25/12 , H01L21/68757
摘要： An epitaxial wafer is provided capable of eliminating particles in a device process, particles being generated from scratches in a boundary area between a rear surface and a chamfered surface of a wafer. The number of scratches in the boundary area between the rear surface and the chamfered surface is small, and thus the number of particles generated from the scratches is reduced at a time of immersion in an etching solution in the device process. Thereby, a device yield is increased.
摘要翻译：提供了能够消除器件工艺中的微粒的外延晶片，颗粒由在晶片的后表面和倒角表面之间的边界区域中的划痕产生。后表面与倒角面之间的边界区域中的划痕数量较少，因此在装置处理中浸入蚀刻溶液时，由划痕产生的颗粒数量减少。因此，器件产量增加。

4. 发明申请

US20120090536A1 METHOD FOR PRODUCING SILICON EPITAXIAL WAFER 有权
标题翻译：生产硅外延层的方法
公开(公告)号：US20120090536A1
公开(公告)日：2012-04-19
申请号：US13318950
申请日：2010-05-07
申请人： Masayuki Ishibashi , Tomonori Miura
发明人： Masayuki Ishibashi , Tomonori Miura
IPC分类号： C30B25/02
CPC分类号： H01L21/30625 , C30B25/02 , C30B29/06 , C30B33/00 , C30B33/08 , H01L21/02381 , H01L21/02658 , Y10S438/959
摘要： The method for producing a silicon epitaxial wafer according to the present invention has: a growth step G at which an epitaxial layer is grown on a silicon single crystal substrate; a first polishing step E at which, before the growth step G, both main surfaces of the silicon single crystal substrate are subjected to rough polishing simultaneously; and a second polishing step H at which, after the growth step G, the both main surfaces of the silicon single crystal substrate are subjected to finish polishing simultaneously.
摘要翻译：根据本发明的硅外延晶片的制造方法具有：在硅单晶基板上生长外延层的生长工序G; 在生长步骤G之前，同时对硅单晶衬底的两个主表面进行粗抛光的第一抛光步骤E; 以及在生长步骤G之后同时对硅单晶基板的两个主表面进行精加工抛光的第二抛光步骤H.

5. 发明授权

US06479112B1 Glass panel and method of manufacturing thereof and spacers used for glass panel 失效
标题翻译：玻璃面板及其制造方法以及用于玻璃面板的间隔物
公开(公告)号：US06479112B1
公开(公告)日：2002-11-12
申请号：US09445153
申请日：2000-02-25
申请人： Kyoichi Shukuri , Hideo Yoshizawa , Naoto Horiguchi , Osamu Asano , Keiichiro Okajima , Tomonori Miura
发明人： Kyoichi Shukuri , Hideo Yoshizawa , Naoto Horiguchi , Osamu Asano , Keiichiro Okajima , Tomonori Miura
IPC分类号： E06B324
CPC分类号： E06B3/6612 , E06B3/66304 , Y02A30/25 , Y02B80/24
摘要： A glass panel, its manufacturing method and a spacer for use in the glass panel. In the glass panel, a plurality of spacers (3) are formed between and along a first opposing face (2A) of a first glass sheet (1A) and a second opposing face (2B) of a second glass sheet (1B) so as to form a space (C) therebetween, and a sealing material (6) is provided at peripheral edge (1a) of the first glass sheet (1A) and the second glass sheet (1B) for maintaining the space (C) gas-tight. The plurality of such spacers (3) having, at one side thereof, contact portions (5) capable of coming into contact with the first opposing face (2A) are provided on the second opposing face (2B). The contact portions (5) and the first opposing face (2A) are movable relative to each other.
摘要翻译：玻璃面板，其制造方法和用于玻璃面板的间隔件。在玻璃面板中，沿第一玻璃板（1A）的第一相对面（2A）和第二玻璃板（1B）的第二相对面（2B）之间形成多个间隔件（3）在它们之间形成空间（C），并且在第一玻璃板（1A）和第二玻璃板（1B）的周缘（1a）处设置密封材料（6），用于将空间（C）保持在气密性。在第二相对面（2B）上设置有多个这样的间隔件（3），其一侧具有能够与第一相对面（2A）接触的接触部分（5）。接触部分（5）和第一相对面（2A）可相对于彼此移动。

6. 发明授权

US09130480B2 Device for applying high voltage using pulse voltage, and method of applying high voltage 有权
标题翻译：使用脉冲电压施加高压的装置以及施加高电压的方法
公开(公告)号：US09130480B2
公开(公告)日：2015-09-08
申请号：US13395905
申请日：2010-11-24
申请人： Tomonori Miura
发明人： Tomonori Miura
IPC分类号： H03K3/017 , H02M7/5387
CPC分类号： H02M7/53871 , H03K2217/0045
摘要： A device for applying a high voltage using a pulse voltage is provided which applies a high voltage having a pulse width τ0 to a capacitive load (1) through a pulse transformer (4), the high voltage having pulse-like peaks with a steep leading edge, wherein a capacitance C1 of the capacitive load (1) and a secondary side leakage inductance L1 of the pulse transformer (4) satisfy the equation: L1=(τ0/π)2×(1/C1). This enables enlargement of the pulse-like peaks and application of any pulse repetition frequency when the high voltage having the pulse-like peaks is applied to the capacitive load through the pulse transformer.
摘要翻译：提供了一种使用脉冲电压施加高电压的装置，其通过脉冲变压器（4）将具有脉冲宽度τ0的高电压施加到电容性负载（1），该高电压具有陡峭的引线边缘，其中电容性负载（1）的电容C1和脉冲变压器（4）的次级侧漏电感L1满足等式：L1 =（τ0/＆pgr;）2×（1 / C1）。当具有脉冲峰值的高电压通过脉冲变压器施加到电容性负载时，能够扩大脉冲峰值和施加任何脉冲重复频率。

7. 发明授权

US08999061B2 Method for producing silicon epitaxial wafer 有权
标题翻译：硅外延晶片的制造方法
公开(公告)号：US08999061B2
公开(公告)日：2015-04-07
申请号：US13318950
申请日：2010-05-07
申请人： Masayuki Ishibashi , Tomonori Miura
发明人： Masayuki Ishibashi , Tomonori Miura
IPC分类号： C30B25/02 , H01L21/306 , C30B33/08 , C30B29/06 , C30B33/00 , H01L21/02
CPC分类号： H01L21/30625 , C30B25/02 , C30B29/06 , C30B33/00 , C30B33/08 , H01L21/02381 , H01L21/02658 , Y10S438/959
摘要： The method for producing a silicon epitaxial wafer according to the present invention has: a growth step G at which an epitaxial layer is grown on a silicon single crystal substrate; a first polishing step E at which, before the growth step G, both main surfaces of the silicon single crystal substrate are subjected to rough polishing simultaneously; and a second polishing step H at which, after the growth step G, the both main surfaces of the silicon single crystal substrate are subjected to finish polishing simultaneously.
摘要翻译：根据本发明的硅外延晶片的制造方法具有：在硅单晶基板上生长外延层的生长工序G; 在生长步骤G之前，同时对硅单晶衬底的两个主表面进行粗抛光的第一抛光步骤E; 以及在生长步骤G之后同时对硅单晶基板的两个主表面进行精加工抛光的第二抛光步骤H.

8. 发明授权

US08870627B2 Polishing method and polishing apparatus 有权
标题翻译：抛光方法和抛光装置
公开(公告)号：US08870627B2
公开(公告)日：2014-10-28
申请号：US13496685
申请日：2010-08-20
申请人： Hiroto Fukushima , Akira Horiguchi , Ken Isobe , Tomonori Miura , Shoji Nakao
发明人： Hiroto Fukushima , Akira Horiguchi , Ken Isobe , Tomonori Miura , Shoji Nakao
IPC分类号： B24B37/08 , H01L21/687 , B24B37/04 , H01L21/68 , H01L21/683 , B24B37/34
CPC分类号： B24B37/042 , B24B37/08 , B24B37/345 , H01L21/68 , H01L21/6838 , H01L21/68707
摘要： To propose a method for realizing appropriate delivering of works to carriers in the conventional transfer process. Specifically, in a polishing method for polishing a work retained in a carrier, at least one carrier for retaining a work to be polished is placed between an upper plate and a lower plate; the work is fit in a hole of the carrier; the carrier and the work are inserted between the upper plate and the lower plate; and at least one of the upper plate and the lower plate is rotated while supplying a polishing agent to a space between the upper plate and the lower plate. In fitting the work in the hole of the carrier, an end portion of the work is held and the work is carried to a position above the lower plate; the work is positioned with respect to the hole of the carrier on the lower plate; and the work is released from the hold and guided by a guide to be slowly carried down toward the hole.
摘要翻译：提出一种在常规传输过程中实现对载体的适当传递的方法。具体而言，在用于研磨保留在载体中的工件的研磨方法中，将至少一个用于保持待抛光的工件的载体放置在上板和下板之间; 工作适合承运人的一个洞; 载体和工件插入在上板和下板之间; 并且在将抛光剂供给到上板和下板之间的空间的同时旋转上板和下板中的至少一个。在将工件装配在承载件的孔中时，工件的端部被保持并将工件运送到下板上方的位置; 工件相对于下板上的托架的孔定位; 工作由保持架释放出来，由导向器引导，慢慢地朝向洞穴移动。

9. 发明申请

US20120223596A1 DEVICE FOR APPLYING HIGH VOLTAGE USING PULSE VOLTAGE, AND METHOD OF APPLYING HIGH VOLTAGE 有权
标题翻译：使用脉冲电压施加高电压的装置以及应用高电压的方法
公开(公告)号：US20120223596A1
公开(公告)日：2012-09-06
申请号：US13395905
申请日：2010-11-24
申请人： Tomonori Miura
发明人： Tomonori Miura
IPC分类号： H03K3/017
CPC分类号： H02M7/53871 , H03K2217/0045
摘要： A device for applying a high voltage using a pulse voltage is provided which applies a high voltage having a pulse width τ0 to a capacitive load (1) through a pulse transformer (4), the high voltage having pulse-like peaks with a steep leading edge, wherein a capacitance C1 of the capacitive load (1) and a secondary side leakage inductance L1 of the pulse transformer (4) satisfy the equation: L1=(τ0/π)2×(1/C1). This enables enlargement of the pulse-like peaks and application of any pulse repetition frequency when the high voltage having the pulse-like peaks is applied to the capacitive load through the pulse transformer.
摘要翻译：提供了一种使用脉冲电压施加高电压的装置，其通过脉冲变压器（4）将具有脉冲宽度τ0的高电压施加到电容性负载（1），该高电压具有陡峭的引线边缘，其中电容性负载（1）的电容C1和脉冲变压器（4）的次级侧漏电感L1满足等式：L1 =（τ0/＆pgr;）2×（1 / C1）。当具有脉冲峰值的高电压通过脉冲变压器施加到电容性负载时，能够扩大脉冲峰值和施加任何脉冲重复频率。

10. 发明申请

US20120220200A1 POLISHING METHOD AND POLISHING APPARATUS 有权
标题翻译：抛光方法和抛光装置
公开(公告)号：US20120220200A1
公开(公告)日：2012-08-30
申请号：US13496685
申请日：2010-08-20
申请人： Hiroto Fukushima , Akira Horiguchi , Ken Isobe , Tomonori Miura , Shoji Nakao
发明人： Hiroto Fukushima , Akira Horiguchi , Ken Isobe , Tomonori Miura , Shoji Nakao
IPC分类号： B24B47/10 , B24B57/00 , B24B1/00
CPC分类号： B24B37/042 , B24B37/08 , B24B37/345 , H01L21/68 , H01L21/6838 , H01L21/68707
摘要： To propose a method for realizing appropriate delivering of works to carriers in the conventional transfer process. Specifically, in a polishing method for polishing a work retained in a carrier, at least one carrier for retaining a work to be polished is placed between an upper plate and a lower plate; the work is fit in a hole of the carrier; the carrier and the work are inserted between the upper plate and the lower plate; and at least one of the upper plate and the lower plate is rotated while supplying a polishing agent to a space between the upper plate and the lower plate. In fitting the work in the hole of the carrier, an end portion of the work is held and the work is carried to a position above the lower plate; the work is positioned with respect to the hole of the carrier on the lower plate; and the work is released from the hold and guided by a guide to be slowly carried down toward the hole.
摘要翻译：提出一种在常规传输过程中实现对载体的适当传递的方法。具体而言，在用于研磨保留在载体中的工件的研磨方法中，将至少一个用于保持待抛光的工件的载体放置在上板和下板之间; 工作适合承运人的一个洞; 载体和工件插入在上板和下板之间; 并且在将抛光剂供给到上板和下板之间的空间的同时旋转上板和下板中的至少一个。在将工件装配在承载件的孔中时，工件的端部被保持并将工件运送到下板上方的位置; 工件相对于下板上的托架的孔定位; 工作由保持架释放出来，由导向器引导，慢慢地朝向洞穴移动。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式