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    • 1. 发明授权
    • Fine pattern forming method
    • 精细图案形成方法
    • US5169494A
    • 1992-12-08
    • US742550
    • 1991-08-08
    • Kazuhiko HashimotoTaichi KoizumiKenji KawakitaNoboru Nomura
    • Kazuhiko HashimotoTaichi KoizumiKenji KawakitaNoboru Nomura
    • G03F7/039G03F7/09
    • G03F7/094G03F7/039
    • The present invention provides a method of forming a fine pattern comprising the steps of forming on a semiconductor substrate an organic polymer film and heat treating it, forming on the organic polymer film an inorganic film and heat treating it, forming on the inorganic film an electron beam resist film and heat treating it, drawing a pattern on the resist film, developing it to form a resist pattern, and etching the inorganic film and the organic polymer film using the resist pattern as a mask, wherein the improvement comprises using one substance selected from the group consisting of a polyphenylene sulfide, a derivative thereof, and a polymer represented by the formula (I): ##STR1## where n is a positive integer, for forming at least one of the organic polymer film and the electron beam resist film. According to the present invention, it is possible to prevent charging by incident electrons, thereby keeping free of field butting and reduction of overlay accuracy, and to form an accurate and vertical fine resist pattern.
    • 本发明提供一种形成精细图案的方法,包括以下步骤:在半导体衬底上形成有机聚合物膜并进行热处理,在有机聚合物膜上形成无机膜并进行热处理,在无机膜上形成电子 抗蚀剂膜并对其进行热处理,在抗蚀剂膜上绘制图案,将其显影以形成抗蚀剂图案,并使用抗蚀剂图案作为掩模蚀刻无机膜和有机聚合物膜,其中改进包括使用选择的一种物质 由聚苯硫醚,其衍生物和由式(I)表示的聚合物组成:其中n为正整数,用于形成至少一个有机聚合物膜和电子 光束抗蚀膜。 根据本发明,可以防止入射电子的充电,从而保持无间隙对接和降低覆盖精度,并形成精确和垂直的精细抗蚀剂图案。
    • 7. 发明授权
    • Method of manufacturing isolated semiconductor devices
    • 制造隔离半导体器件的方法
    • US4685198A
    • 1987-08-11
    • US758962
    • 1985-07-25
    • Kenji KawakitaNoboru NomuraToyoki Takemoto
    • Kenji KawakitaNoboru NomuraToyoki Takemoto
    • H01L21/762H01L21/763H01L29/06
    • H01L21/76264H01L21/762H01L21/763H01L21/76281H01L21/76283Y10S148/05Y10S148/115Y10S438/973
    • Disclosed is a method of isolating a transistor perfectly by employing a selective oxidation technology (LOCOS technology). More particularly, vertical openings are formed in the surface of {100} silicon substrate, and oxidation resistant films are formed of this surface and in part of the side walls of these openings. In succession, by etching with an etchant having an orientation anisotropy, dents are formed at high precision in the side walls of the openings. By oxidizing using the oxidation resistant film as the mask, an oxide film growing out from a dent in the opening side wall is connected with another oxide film growing out from an adjacent dent. The transistor thus formed in the active region of the silicon electrically isolated from the substrate is small in parasitic capacitance and may be formed into a small size, so that it possesses the features suited to VLSI, that is, high speed, low power consumption, and processability to high density integration.
    • 公开了通过采用选择氧化技术(LOCOS技术)将晶体管完全隔离的方法。 更具体地,在{100}硅衬底的表面中形成垂直开口,并且由该表面和这些开口的一部分侧壁形成抗氧化膜。 相继地,通过用具有取向各向异性的蚀刻剂进行蚀刻,在开口的侧壁中以高精度形成凹痕。 通过使用抗氧化膜作为掩模进行氧化,从开口侧壁中的凹陷生长的氧化膜与从相邻凹坑生长的另一氧化膜连接。 因此,在与衬底电隔离的硅的有源区中形成的晶体管的寄生电容小,并且可以形成为小尺寸,使得其具有适合于VLSI的特征,即高速度,低功耗, 和可加工性的高密度集成。
    • 8. 发明授权
    • ATM switching network and ATM switching system in which the transfer of inputted cells is controlled by control cells, and signal processing method in ATM switching network
    • ATM交换网络和ATM交换系统,其中输入的小区的传输由控制小区控制,以及ATM交换网络中的信号处理方法
    • US06396808B1
    • 2002-05-28
    • US09519417
    • 2000-03-06
    • Masao KunimotoKenji KawakitaShinichi IwakiSatoshi Shimizu
    • Masao KunimotoKenji KawakitaShinichi IwakiSatoshi Shimizu
    • H04L1256
    • H04L49/309H04L2012/5627H04L2012/563H04Q11/0478
    • A signal processing method for an ATM switching network formed by connecting a plurality of ATM switching networks in which header conversion tables of line interfaces can be rewritten by control cells, includes in response to occurrence of an abnormality in a call control processor of a ATM switching system A, informing an ATM switching system B of the occurrence of the abnormality, transferring call control information in the ATM switching system A to the ATM switching system B, rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system A and thereby transferring signal channel cells arriving at the ATM switching system A after occurrence of the abnormality to the ATM switching system B, and rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system B and thereby making a call control processor of the ATM switching system B effect route control of information channel cells within the ATM switching system A.
    • 一种用于通过连接多个ATM交换网络形成的ATM交换网络的信号处理方法,其中线路接口的报头转换表可由控制小区重写,包括响应于ATM交换机的呼叫控制处理器中发生异常 系统A通知ATM交换系统B发生异常,将ATM交换系统A中的呼叫控制信息传送到ATM交换系统B,重写包括在ATM交换系统A的多个线路接口中的报头转换表 通过使用由ATM交换系统A生成的控制信元,从而在ATM交换系统B发生异常之后传送到达ATM交换系统A的信道信元,并重写包含在ATM交换系统A的多个线路接口中的报头转换表 ATM交换系统A通过使用由ATM交换系统B生成的控制信元,从而进行maki ATM交换系统B的呼叫控制处理器对ATM交换系统A内的信道信元进行路由控制。
    • 10. 发明授权
    • Method and system for data transmission
    • 数据传输方法和系统
    • US4855995A
    • 1989-08-08
    • US7339
    • 1987-01-27
    • Kunio HiyamaKenji KawakitaOsamu Takada
    • Kunio HiyamaKenji KawakitaOsamu Takada
    • H04L12/43H04M9/02
    • H04M9/022H04L12/43
    • Herein disclosed is a data communication system in which a plurality of node equipments are linked to a common signal transmission line so that the data may be communicated between the respective node equipments. The data communication system is characterized: in that at least one of the node equipments includes means for generating and transmitting repeatedly for a predetermined period the channel which contains a data transmission bit and a validity bit for the former bit; and in that each of the node equipments linked to the common signal transmission line partly sends out the data through said channel and partly makes the validity indicating bit indicate an invalid state, when the speed of said data is so slower than the predetermined period of said channel that the data to be sent out for the predetermined period are out of time thereby to make it possible to effect the data transmission at an arbitrary speed shorter than said predetermined period.Herein also disclosed is a data communication system in which a plurality of node equipments are jointed by a common transmission loop line and in which the information of multiple channels is repeatedly transmitted for a predetermined period to said transmission loop line so that the channel information may be sent and received between terminal equipments linked to said node equipments. The data communication system is characterized in that an identical pattern for synchronization is inserted into and transmitted by the plural head channels of each period so that the synchronization is effected at each of said node equipments by detecting the synchronizing pattern received by means of a detecting circuit.
    • 这里公开了一种数据通信系统,其中多个节点设备链接到公共信号传输线,使得可以在各个节点设备之间传送数据。 数据通信系统的特征在于:节点设备中的至少一个包括用于在预定周期内重复生成和发送包含前一比特的数据传输比特和有效比特的信道的装置; 并且,连接到公共信号传输线路的每个节点设备部分地通过所述信道发送数据,并且部分地使有效指示位指示无效状态,当所述数据的速度比所述数据的预定时间慢的时候 在预定时间段内要发送的数据的时间是超时的,从而使得可以以比所述预定周期短的任意速度实现数据传输。 这里还公开了一种数据通信系统,其中多个节点设备由公共传输环路线连接,并且其中将多个信道的信息重复发送一段预定时间段到所述传输环路线,使得信道信息可以是 在与所述节点设备连接的终端设备之间发送和接收。 数据通信系统的特征在于,用于同步的相同模式被插入每个周期的多个头信道并由其发送,从而通过检测通过检测电路接收的同步模式来在每个所述节点设备处实现同步 。