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    • 1. 发明授权
    • Vehicle door opening and closing device
    • 车门打开和关闭装置
    • US07287805B2
    • 2007-10-30
    • US11206072
    • 2005-08-18
    • Katsuhisa YamadaJunji YamaguchiSeiichi SuzukiJoo Young Kim
    • Katsuhisa YamadaJunji YamaguchiSeiichi SuzukiJoo Young Kim
    • B60J5/06
    • E05F15/646E05Y2900/531
    • A vehicle door opening and closing device includes a guide rail fixed to a vehicle body, a supporting member connected to the vehicle door, a first driven pulley, a second driven pulley, an idle pulley, a cable take-up pulley that is arranged between the idle pulley and the second driven pulley, a cable wound around the cable take-up pulley and made contact with the idle pulley, the first driven pulley, and the second driven pulley, and a pulley cover for guiding a first portion of the cable connected to the supporting member to be made contact with the idle pulley in such a manner that a vertical position of the first portion of the cable is different from that of a second portion of the cable in contact with the idle pulley.
    • 车门打开和关闭装置包括固定到车体的导轨,连接到车门的支撑构件,第一从动滑轮,第二从动滑轮,空转滑轮,布置在 空转滑轮和第二从动皮带轮,缠绕在电缆卷取滑轮上的电缆,与空转滑轮,第一从动滑轮和第二从动滑轮接触,以及用于引导电缆的第一部分的滑轮罩 连接到支撑构件以与空转滑轮接触,使得电缆的第一部分的垂直位置不同于与空转滑轮接触的电缆的第二部分的垂直位置。
    • 3. 发明申请
    • INSTRUCTION EXECUTION CIRCUIT
    • 指令执行电路
    • US20120166205A1
    • 2012-06-28
    • US13335132
    • 2011-12-22
    • Junji YamaguchiKoichi Abe
    • Junji YamaguchiKoichi Abe
    • G10L19/00G06F9/312G06F9/38
    • G06F9/381
    • An instruction execution circuit includes: a memory circuit including a first memory element and a second memory element configured to require less power than the first memory element; a processor; and an address decoder configured to output an enable signal to either one, storing an instruction, of the first memory element and the second memory element when an address is outputted from the processor, the enable signal corresponding to a signal to output the instruction stored at the address, one portion of a program stored in the first memory element corresponding to a portion in which processing other than loop processing is described, the loop processing causing the processor to execute the specific instruction in a repetitive manner, the other portion of a program stored in the second memory element corresponding to a portion in which the loop processing is described.
    • 指令执行电路包括:存储器电路,包括第一存储器元件和被配置为要求比第一存储器元件少的功率的第二存储器元件; 处理器 以及地址解码器,被配置为当从处理器输出地址时,将使能信号输出到第一存储器元件和第二存储器元件的存储指令中的任一个,使能信号对应于信号以输出存储在 存储在第一存储元件中的程序的一部分对应于描述了循环处理以外的处理的部分的循环处理使处理器以重复的方式执行特定指令,程序的另一部分 存储在与描述循环处理的部分相对应的第二存储元件中。
    • 6. 发明申请
    • OPTICAL DISC
    • 光盘
    • US20120060175A1
    • 2012-03-08
    • US13255301
    • 2009-09-01
    • Atsushi OshioJunji YamaguchiDaisuke Ito
    • Atsushi OshioJunji YamaguchiDaisuke Ito
    • G11B7/24
    • G11B7/24038G11B7/252G11B7/2542G11B7/263G11B7/266
    • Provided is an optical disc in which at least a light reflecting layer and a light transmitting layer that includes a cured film of an ultraviolet curable composition are stacked on a substrate, and information is reproduced by making a blue laser beam be incident on the optical disc from a side of the light transmitting layer, wherein an elastic modulus (25° C.) measured by indenting a Vickers indenter having a vertex angle of 136° under a load of 100 mN into a surface of the cured film of the ultraviolet curable composition is 1,500 MPa or less; and a loss modulus (E″) at 60° C. in a dynamic viscoelastic spectrum of the cured film measured at a frequency of 3.5 Hz is 10 MPa or less. Thus, warpage is reduced during curing and plastic deformation is less likely even under a load for a long period of time.
    • 本发明提供一种光盘,其中至少含有紫外线固化性组合物的固化膜的光反射层和透光层层叠在基板上,通过使蓝色激光束入射到光盘上再生信息 从所述透光层的一侧,其中通过将在100mN的负载下顶角为136°的维氏压头压入所述紫外线固化性组合物的固化膜的表面而测量的弹性模量(25℃) 为1500MPa以下; 在以3.5Hz的频率测定的固化膜的动态粘弹性光谱中,60℃下的损耗模量(E“)为10MPa以下。 因此,在固化期间翘曲减小,并且即使在长时间的负载下塑性变形也不太可能。
    • 10. 发明授权
    • Instruction execution circuit
    • 指令执行电路
    • US09075620B2
    • 2015-07-07
    • US13335132
    • 2011-12-22
    • Junji YamaguchiKoichi Abe
    • Junji YamaguchiKoichi Abe
    • G10L19/00G06F9/38
    • G06F9/381
    • An instruction execution circuit includes: a memory circuit including a first memory element and a second memory element configured to require less power than the first memory element; a processor; and an address decoder configured to output an enable signal to either one, storing an instruction, of the first memory element and the second memory element when an address is outputted from the processor, the enable signal corresponding to a signal to output the instruction stored at the address, one portion of a program stored in the first memory element corresponding to a portion in which processing other than loop processing is described, the loop processing causing the processor to execute the specific instruction in a repetitive manner, the other portion of a program stored in the second memory element corresponding to a portion in which the loop processing is described.
    • 指令执行电路包括:存储器电路,包括第一存储器元件和被配置为要求比第一存储器元件少的功率的第二存储器元件; 处理器 以及地址解码器,被配置为当从处理器输出地址时,将使能信号输出到第一存储器元件和第二存储器元件的存储指令中的任一个,使能信号对应于信号以输出存储在 存储在第一存储元件中的程序的一部分对应于描述了循环处理以外的处理的部分的循环处理使处理器以重复的方式执行特定指令,程序的另一部分 存储在与描述循环处理的部分相对应的第二存储元件中。