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1. 发明授权

US08539421B2 Layout-specific classification and prioritization of recommended rules violations 有权
标题翻译：布局特定的分类和推荐规则违规的优先级排序
公开(公告)号：US08539421B2
公开(公告)日：2013-09-17
申请号：US13328942
申请日：2011-12-16
申请人： Kanak Behari Agarwal , Sani Richard Nassif
发明人： Kanak Behari Agarwal , Sani Richard Nassif
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A method, system, and computer program product for classifying and prioritizing a set of recommended rule (RR) violations in an integrated circuit (IC) design are provided in the illustrative embodiments. The set of RR violations is received. A layout corresponding to the IC design is received. A set of features is selected in the layout. A classification model corresponding to the set of features is selected. Using the set of features and the classification model, the first RR violation is classified into a classification from a set of classifications. The classification is prioritized in an order of priority such that the first RR violation in the classification is recommended for remedying in the order of priority.
摘要翻译：在说明性实施例中提供了用于在集成电路（IC）设计中对一组推荐规则（RR）违规进行分类和优先排序的方法，系统和计算机程序产品。接收到RR违规的集合。接收与IC设计对应的布局。在布局中选择一组功能。选择与特征集对应的分类模型。使用一组特征和分类模型，将第一个RR违规分为一组分类的分类。分类按优先顺序排列优先顺序，以便按照优先顺序推荐分类中的第一次违反RR的行为。

2. 发明申请

US20130159955A1 DYNAMIC PIN ACCESS MAXIMIZATION FOR MULTI-PATTERNING LITHOGRAPHY 审中-公开
标题翻译：用于多格式平移的动态引脚访问最大化
公开(公告)号：US20130159955A1
公开(公告)日：2013-06-20
申请号：US13328976
申请日：2011-12-16
申请人： Rani Abou Ghaida , Kanak Behari Agarwal , Lars Wolfgang Liebmann , Sani Richard Nassif
发明人： Rani Abou Ghaida , Kanak Behari Agarwal , Lars Wolfgang Liebmann , Sani Richard Nassif
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F17/5081
摘要： A method, system, and computer program product for improving pin access in a design of an integrated circuit (IC) for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A cell is placed in the IC design, the cell including a pin shape configured to connect a pin of the cell to a semi-conductor component in the IC design, the cell including a coloring conflict due to the pin shape and an other shape in the cell each being colored using a first color for fabricating onto a wafer using MPL. A net is routed to the pin shape without resolving the coloring conflict, wherein the routing routes the net using a first segment of the pin shape. The pin shape is modified after routing to resolve the coloring conflict to result in a modified cell.
摘要翻译：在说明性实施例中提供了用于在用于多图案化光刻（MPL）的集成电路（IC）的设计中改善引脚访问的方法，系统和计算机程序产品。电池被放置在IC设计中，电池包括被配置为将电池的引脚连接到IC设计中的半导体部件的引脚形状，该电池包括由于引脚形状引起的着色冲突和其他形状每个单元均使用第一种颜色进行着色，以使用MPL制造到晶片上。网络被路由到引脚形状而不解决着色冲突，其中，路由使用引脚形状的第一段路由网络。引脚形状在路由后修改以解决着色冲突，从而导致修改的单元格。

3. 发明申请

US20130159948A1 LAYOUT-SPECIFIC CLASSIFICATION AND PRIORITIZATION OF RECOMMENDED RULES VIOLATIONS 有权
标题翻译：建议的规则侵权的布局特定分类和优先
公开(公告)号：US20130159948A1
公开(公告)日：2013-06-20
申请号：US13328942
申请日：2011-12-16
申请人： Kanak Behari Agarwal , Sani Richard Nassif
发明人： Kanak Behari Agarwal , Sani Richard Nassif
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A method, system, and computer program product for classifying and prioritizing a set of recommended rule (RR) violations in an integrated circuit (IC) design are provided in the illustrative embodiments. The set of RR violations is received. A layout corresponding to the IC design is received. A set of features is selected in the layout. A classification model corresponding to the set of features is selected. Using the set of features and the classification model, the first RR violation is classified into a classification from a set of classifications. The classification is prioritized in an order of priority such that the first RR violation in the classification is recommended for remedying in the order of priority.
摘要翻译：在说明性实施例中提供了用于在集成电路（IC）设计中对一组推荐规则（RR）违规进行分类和优先排序的方法，系统和计算机程序产品。接收到RR违规的集合。接收与IC设计对应的布局。在布局中选择一组功能。选择与特征集对应的分类模型。使用一组特征和分类模型，将第一个RR违规分为一组分类的分类。分类按优先顺序排列优先顺序，以便按照优先顺序推荐分类中的第一次违反RR的行为。

4. 发明授权

US08464194B1 Machine learning approach to correct lithographic hot-spots 失效
标题翻译：机器学习方法来纠正光刻热点
公开(公告)号：US08464194B1
公开(公告)日：2013-06-11
申请号：US13328994
申请日：2011-12-16
申请人： Kanak Behari Agarwal , Shayak Banerjee
发明人： Kanak Behari Agarwal , Shayak Banerjee
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F7/70433
摘要： A method, system, and computer program product for machine learning approach for detecting and correcting lithographic hot-spots in an integrated circuit (IC) design are provided in the illustrative embodiments. A layout corresponding to the IC design is received at a machine learning model (ML model). At the ML model using a hardware component, a set of input objects is identified corresponding to a target shape in the layout. A retargeting value is predicted for the target shape using the set of input objects, such that applying the retargeting value to the target shape in the layout causes the target shape to be modified into a modified target shape, wherein printing the modified target shape instead of the target shape eliminates a lithographic hot-spot that would otherwise occur from printing the target shape in a printed circuit corresponding to the IC design.
摘要翻译：在说明性实施例中提供了用于在集成电路（IC）设计中检测和校正平版印刷热点的用于机器学习方法的方法，系统和计算机程序产品。在机器学习模型（ML模型）下接收与IC设计相对应的布局。在使用硬件组件的ML模型中，在布局中识别与目标形状相对应的一组输入对象。使用所述一组输入对象来对目标形状预测重定向值，使得将重定向值应用于布局中的目标形状使得目标形状被修改为修改的目标形状，其中，打印修改的目标形状而不是目标形状消除了在对应于IC设计的印刷电路中打印目标形状否则会发生的平版印刷热点。

5. 发明授权

US08347255B2 Equation based retargeting of design layouts 有权
标题翻译：基于方程式的重新定位设计布局
公开(公告)号：US08347255B2
公开(公告)日：2013-01-01
申请号：US12782407
申请日：2010-05-18
申请人： Kanak Behari Agarwal
发明人： Kanak Behari Agarwal
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/70 , G06F17/5068 , G06F2217/12 , H01L27/0203 , Y02P90/265
摘要： A method, system, and computer usable program product for equation based retargeting of design layouts are provided in the illustrative embodiments. A set of desirable combination of values of a set of layout parameters of the design layout is determined. A desirable region that includes the set of the desirable combination of values is determined. An equation is computed to determine a retargeting value for a first combination of values of the set of layout parameters with respect to the desirable region. Instructions are generated to adjust a value in the first combination to generate a second combination of values of the set of layout parameters such that the second combination falls in the desirable region. A shape in the design layout is retargeted such that the retargeted shape uses the second combination of values of the set of layout parameters. The IC is manufactured using the retargeted shape.
摘要翻译：在说明性实施例中提供了用于基于等式的重新定位设计布局的方法，系统和计算机可用程序产品。确定设计布局的一组布局参数的值的一组期望组合。确定包括值的所需组合的期望区域。计算等式以确定关于所需区域的布局参数集合的值的第一组合的重定向值。生成指令以调整第一组合中的值以生成布局参数集合的值的第二组合，使得第二组合落入所需区域。重新定位设计布局中的形状，使得重定向形状使用布局参数集合的值的第二组合。 IC使用重新定向的形状制造。

6. 发明申请

US20130159943A1 MACHINE LEARNING APPROACH TO CORRECT LITHOGRAPHIC HOT-SPOTS 失效
标题翻译：机器学习方法来校正光刻热点
公开(公告)号：US20130159943A1
公开(公告)日：2013-06-20
申请号：US13328994
申请日：2011-12-16
申请人： Kanak Behari Agarwal , Shayak Banerjee
发明人： Kanak Behari Agarwal , Shayak Banerjee
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F7/70433
摘要： A method, system, and computer program product for machine learning approach for detecting and correcting lithographic hot-spots in an integrated circuit (IC) design are provided in the illustrative embodiments. A layout corresponding to the IC design is received at a machine learning model (ML model). At the ML model using a hardware component, a set of input objects is identified corresponding to a target shape in the layout. A retargeting value is predicted for the target shape using the set of input objects, such that applying the retargeting value to the target shape in the layout causes the target shape to be modified into a modified target shape, wherein printing the modified target shape instead of the target shape eliminates a lithographic hot-spot that would otherwise occur from printing the target shape in a printed circuit corresponding to the IC design.
摘要翻译：在说明性实施例中提供了用于在集成电路（IC）设计中检测和校正平版印刷热点的用于机器学习方法的方法，系统和计算机程序产品。在机器学习模型（ML模型）下接收与IC设计相对应的布局。在使用硬件组件的ML模型中，在布局中识别与目标形状相对应的一组输入对象。使用所述一组输入对象来对目标形状预测重定向值，使得将重定向值应用于布局中的目标形状使得目标形状被修改为修改的目标形状，其中，打印修改的目标形状而不是目标形状消除了在对应于IC设计的印刷电路中打印目标形状否则会发生的平版印刷热点。

7. 发明申请

US20130086543A1 MULTI-PATTERNING LITHOGRAPHY AWARE CELL PLACEMENT IN INTEGRATED CIRCUIT DESIGN 失效
标题翻译：集成电路设计中的多图形图形识别芯片布局
公开(公告)号：US20130086543A1
公开(公告)日：2013-04-04
申请号：US13248711
申请日：2011-09-29
申请人： Kanak Behari Agarwal , Charles Jay Alpert , Zhuo Li , Gi-Joon Nam , Natarajan Viswanathan
发明人： Kanak Behari Agarwal , Charles Jay Alpert , Zhuo Li , Gi-Joon Nam , Natarajan Viswanathan
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F2217/12 , Y02P90/265
摘要： A method, system, and computer program product for multi-patterning lithography (MPL) aware cell placement in integrated circuit (IC) design are provided in the illustrative embodiments. A global phase of cell movement is performed. A local phase cell movement is performed, wherein the local phase includes moving a color instance of the cell from a plurality of color instances of the cell within a row of cell in the IC design, wherein the global phase and the local phase are each performed before a final placement is produced for the IC design.
摘要翻译：在说明性实施例中提供了用于集成电路（IC）设计中的多图案化光刻（MPL）感知单元放置的方法，系统和计算机程序产品。执行细胞运动的全局阶段。执行局部相位单元移动，其中本地相位包括从IC设计中的单元行内的单元的多个颜色实例移动单元的颜色实例，其中，每个执行全局相位和局部相位在为IC设计制作最终布局之前。

8. 发明授权

US08089296B2 On-chip measurement of signals 失效
标题翻译：片上信号测量
公开(公告)号：US08089296B2
公开(公告)日：2012-01-03
申请号：US12489525
申请日：2009-06-23
申请人： Kanak Behari Agarwal , Jerry D. Hayes
发明人： Kanak Behari Agarwal , Jerry D. Hayes
IPC分类号： G01R31/02
CPC分类号： G01R31/2884 , G01R19/252 , G01R31/2844
摘要： A method, system, and computer usable program product for in an integrated circuit are provided in the illustrative embodiments. A signal to be measured is identified in the IC. The signal is provided as a first control voltage input to a first VCO in the IC. A first output frequency is generated from the first VCO, the first output frequency having a first frequency value corresponding to the signal. The signal is provided as a second control voltage input to a second VCO in the IC. A second output frequency is generated from the second VCO, the second output frequency having a second frequency value corresponding to the signal. The first and the second output frequency values are exported from the IC. A mean value and a standard deviation of the signal are computed using the output first and second frequency values.
摘要翻译：在说明性实施例中提供了集成电路中的方法，系统和计算机可用程序产品。在IC中识别要测量的信号。信号被提供作为IC中的第一VCO的第一控制电压输入。从第一VCO产生第一输出频率，第一输出频率具有对应于该信号的第一频率值。信号被提供作为IC中的第二VCO的第二控制电压输入。从第二VCO产生第二输出频率，第二输出频率具有对应于该信号的第二频率值。第一和第二输出频率值从IC导出。使用输出的第一和第二频率值来计算信号的平均值和标准偏差。

9. 发明授权

US08689151B1 Pitch-aware multi-patterning lithography 有权
标题翻译：音高感应多图案平版印刷
公开(公告)号：US08689151B1
公开(公告)日：2014-04-01
申请号：US13612790
申请日：2012-09-12
申请人： Kanak Behari Agarwal , Shayak Banerjee
发明人： Kanak Behari Agarwal , Shayak Banerjee
IPC分类号： G06F17/50
CPC分类号： G03F7/70466 , G03F7/70283
摘要： A method, system, and computer program product for improving printability of a design of an integrated circuit (IC) using pitch-aware coloring for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A first shape is identified in a layout of the IC corresponding to the design as being apart by a first distance from a second shape. The first distance is a forbidden distance and at least equal to a minimum distance requirement of a lithography system. A determination is made that the first shape and the second shape are colored using a first color. The first shape is changed to a second color, such that even though the first distance is at least equal to the minimum distance requirement of the lithography system, the first and the second shapes are placed on different masks to print the design, thereby improving the printability of the design.
摘要翻译：在说明性实施例中提供了一种用于改善用于多图案化光刻（MPL）的俯仰感知着色的集成电路（IC）的设计的可印刷性的方法，系统和计算机程序产品。第一形状在对应于设计的IC的布局中被识别为与第二形状隔开第一距离。第一距离是禁止距离，并且至少等于光刻系统的最小距离要求。确定第一形状和第二形状使用第一颜色着色。第一种形状被改变为第二颜色，使得即使第一距离至少等于光刻系统的最小距离要求，第一形状和第二形状被放置在不同的掩模上以印刷设计，从而改善设计的可印刷性。

10. 发明申请

US20140075397A1 PITCH-AWARE MULTI-PATTERNING LITHOGRAPHY 有权
标题翻译： PITCH-AWARE多图形绘图
公开(公告)号：US20140075397A1
公开(公告)日：2014-03-13
申请号：US13612790
申请日：2012-09-12
申请人： Kanak Behari Agarwal , Shayak Banerjee
发明人： Kanak Behari Agarwal , Shayak Banerjee
IPC分类号： G06F17/50
CPC分类号： G03F7/70466 , G03F7/70283
摘要： A method, system, and computer program product for improving printability of a design of an integrated circuit (IC) using pitch-aware coloring for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A first shape is identified in a layout of the IC corresponding to the design as being apart by a first distance from a second shape. The first distance is a forbidden distance and at least equal to a minimum distance requirement of a lithography system. A determination is made that the first shape and the second shape are colored using a first color. The first shape is changed to a second color, such that even though the first distance is at least equal to the minimum distance requirement of the lithography system, the first and the second shapes are placed on different masks to print the design, thereby improving the printability of the design.
摘要翻译：在说明性实施例中提供了一种用于改善用于多图案化光刻（MPL）的俯仰感知着色的集成电路（IC）的设计的可印刷性的方法，系统和计算机程序产品。第一形状在对应于设计的IC的布局中被识别为与第二形状隔开第一距离。第一距离是禁止距离，并且至少等于光刻系统的最小距离要求。确定第一形状和第二形状使用第一颜色着色。第一种形状被改变为第二颜色，使得即使第一距离至少等于光刻系统的最小距离要求，第一和第二形状被放置在不同的掩模上以印刷设计，从而改善设计的可印刷性。

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