专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2010045379A Apparatus and methods for semiconductor ic failure detection 有权
标题翻译：半导体IC故障检测的装置和方法
公开(公告)号：JP2010045379A
公开(公告)日：2010-02-25
申请号：JP2009219052
申请日：2009-09-24
申请人： Kla-Tencor Corp , ケーエルエー−テンカーコーポレイション
发明人： WEINER KURT H , VERMA GAURAV
IPC分类号： H01L21/66 , G01N23/225
摘要： PROBLEM TO BE SOLVED: To provide an improved voltage contrast test structure. SOLUTION: The test structure is fabricated in a single photolithography step or with a single reticle or mask and includes substructures 102 and 104a-g having a particular voltage potential pattern during a voltage contrast inspection. When an electron beam is scanned across the test structure, an expected intensity pattern is produced and imaged as a result of the expected voltage potentials of the test structure. However, when there is an unexpected pattern of voltage potentials during the voltage contrast inspection, this indicates that a defect is present within the test structure. To produce different voltage potentials, a first set 102 of the substructures is coupled to a relatively large conductive structure 110, such as a large conductive pad, so that the first set of the substructures charges more slowly than a second set of the substructures that are not coupled to the relatively large conductive structure. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供改进的电压对比度测试结构。解决方案：测试结构在单个光刻步骤或单个掩模版或掩模中制造，并且包括在电压对比度检查期间具有特定电压电位图案的子结构102和104a-g。当跨越测试结构扫描电子束时，产生预期的强度图案并作为测试结构的预期电压电位而成像。然而，当在电压对比度检查期间存在意想不到的电压电位模式时，这表明在测试结构内存在缺陷。为了产生不同的电压电势，子结构的第一组102耦合到相对较大的导电结构110，例如大的导电焊盘，使得第一组子结构比第二组子结构充电更慢不耦合到相对较大的导电结构。版权所有（C）2010，JPO＆INPIT

2. 发明专利

AU2580401A Improved test structures and methods for inspecting and utilizing the same 未知
公开(公告)号：AU2580401A
公开(公告)日：2001-10-30
申请号：AU2580401
申请日：2000-12-14
申请人： KLA TENCOR CORP
发明人： SATYA AKELLA V S , PINTO GUSTAVO A , ADLER DAVID L , LONG ROBERT THOMAS , RICHARDSON NEIL , WEINER KURT H , WALKER DAVID J , MANTALAS LYNDA C
IPC分类号： H01L21/66 , H01L23/544

3. 发明申请

WO0180304A3 IMPROVED TEST STRUCTURES AND METHODS FOR INSPECTING AND UTILIZING THE SAME 审中-公开
标题翻译：改进的检查和使用它们的测试结构和方法
公开(公告)号：WO0180304A3
公开(公告)日：2003-05-15
申请号：PCT/US0034086
申请日：2000-12-14
申请人： KLA TENCOR CORP , SATYA AKELLA V S , PINTO GUSTAVO A , ADLER DAVID L , LONG ROBERT THOMAS , RICHARDSON NEIL , WEINER KURT H , WALKER DAVID J , MANTALAS LYNDA C
发明人： SATYA AKELLA V S , PINTO GUSTAVO A , ADLER DAVID L , LONG ROBERT THOMAS , RICHARDSON NEIL , WEINER KURT H , WALKER DAVID J , MANTALAS LYNDA C
IPC分类号： H01L21/66 , H01L23/544
CPC分类号： H01L22/34 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A sample is inspected by moving to a first field associated with a first group of test structures, which are partially within the first field, which is scanned to determine whether there are any defects present. If defects are present a specific defect location is determined by repeatedly stepping to areas and scanning such areas within the first group of test structures. In a second method, a sample is scanned in a first direction and in a second direction at an angle to the first direction with at least one particle beam. The number of defects per area of the sample are found as a result of the first scan, and the position of one or more of the found defects is determined from the second scan. A semiconductor die includes test structures located entirely within a scanning area and only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.
摘要翻译：通过移动到与第一组测试结构相关联的第一场来检查样本，该第一场是部分地在第一场内，其被扫描以确定是否存在任何缺陷。如果存在缺陷，则通过反复步进到区域并扫描第一组测试结构内的这些区域来确定特定缺陷位置。在第二种方法中，使用至少一个粒子束，在第一方向和第二方向上以与第一方向成一定角度扫描样品。作为第一扫描的结果，发现样品的每个区域的缺陷数，并且从第二扫描确定发现的一个或多个缺陷的位置。半导体管芯包括完全位于扫描区域内并且仅部分地位于扫描区域内的测试结构。测试结构被布置成使得扫描区域的扫描导致检测到扫描区域外的缺陷。

4. 发明申请

WO0180304A8 IMPROVED TEST STRUCTURES AND METHODS FOR INSPECTING AND UTILIZING THE SAME 审中-公开
标题翻译：改进的检查和使用它们的测试结构和方法
公开(公告)号：WO0180304A8
公开(公告)日：2001-12-27
申请号：PCT/US0034086
申请日：2000-12-14
申请人： KLA TENCOR CORP , SATYA AKELLA V S , PINTO GUSTAVO A , ADLER DAVID L , LONG ROBERT THOMAS , RICHARDSON NEIL , WEINER KURT H , WALKER DAVID J , MANTALAS LYNDA C
发明人： SATYA AKELLA V S , PINTO GUSTAVO A , ADLER DAVID L , LONG ROBERT THOMAS , RICHARDSON NEIL , WEINER KURT H , WALKER DAVID J , MANTALAS LYNDA C
IPC分类号： H01L21/66 , H01L23/544
CPC分类号： H01L22/34 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A sample is inspected by moving to a first field associated with a first group of test structures, which are partially within the first field, which is scanned to determine whether there are any defects present. If defects are present a specific defect location is determined by repeatedly stepping to areas and scanning such areas within the first group of test structures. In a second method, a sample is scanned in a first direction and in a second direction at an angle to the first direction with at least one particle beam. The number of defects per area of the sample are found as a result of the first scan, and the position of one or more of the found defects is determined from the second scan. A semiconductor die includes test structures located entirely within a scanning area and only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.
摘要翻译：通过移动到与第一组测试结构相关联的第一场来检查样本，该第一场是部分地在第一场内，其被扫描以确定是否存在任何缺陷。如果存在缺陷，则通过反复步进到区域并扫描第一组测试结构内的这些区域来确定特定缺陷位置。在第二种方法中，使用至少一个粒子束，在第一方向和第二方向上以与第一方向成一定角度扫描样品。作为第一扫描的结果，发现样品的每个区域的缺陷数，并且从第二扫描确定发现的一个或多个缺陷的位置。半导体管芯包括完全位于扫描区域内并且仅部分地位于扫描区域内的测试结构。测试结构被布置成使得扫描区域的扫描导致检测到扫描区域外的缺陷。

5. 发明申请

WO03003375A3 APPARATUS AND METHODS FOR MONITORING SELF-ALIGNED CONTACT ARRAYS 审中-公开
标题翻译：用于监测自对准接触阵列的装置和方法
公开(公告)号：WO03003375A3
公开(公告)日：2003-08-21
申请号：PCT/US0220205
申请日：2002-06-25
申请人： KLA TENCOR CORP
发明人： WEINER KURT H , NUNAN PETER D , TANDON SANJAY
IPC分类号： G01R31/28 , G01R31/307 , H01L21/66
CPC分类号： G01R31/2831 , G01R31/307
摘要： Disclosed are methods and apparatus for detecting defects in a partially fabricated semiconductor device with self-aligned contacts. The self-aligned contacts are formed from a first layer with a plurality of contact portions (404), a second layer with a plurality of conductive lines (402) that are each aligned proximate to an associated underlying contact portion (404), and a third insulating layer (406) formed over the conductive lines (402) and their proximate underlying contact portions (404). The third insulating layer (406) has a plurality of vias formed therein that are each formed alongside a one of the conductive lines (402) and over its proximate underlying contact portion (404). A charged particle beam is scanned over a portion of the vias to form a voltage contrast image of each via. When a minority of the vias in the image have a significantly different brightness level than a majority of the vias, it is then determined that the minority of vias have defects.
摘要翻译：公开了用于检测具有自对准触点的部分制造的半导体器件中的缺陷的方法和装置。自对准触点由具有多个接触部分（404）的第一层形成，具有多个导线（402）的第二层，每个导电线路邻近相关联的下面的接触部分（404）对准，并且第三绝缘层（406）形成在导电线（402）及其邻近的下面的接触部分（404）之上。第三绝缘层（406）具有形成在其中的多个通孔，每个通孔沿着导电线（402）中的一条并在其邻近的下面的接触部分（404）上形成。在通孔的一部分上扫描带电粒子束以形成每个通孔的电压对比图像。当图像中的少数通孔具有与大多数通孔相比明显不同的亮度时，则确定少数通孔具有缺陷。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式