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    • 4. 发明申请
    • TRENCH GATE FIELD EFFECT DEVICES
    • TRENCH门式场效应器件
    • WO2005062385A1
    • 2005-07-07
    • PCT/JP2004/018432
    • 2004-12-03
    • TOYOTA JIDOSHA KABUSHIKI KAISHAHOTTA, KojiKAWAJI, SachikoSUGIYAMA, TakahideUSUI, Masanori
    • HOTTA, KojiKAWAJI, SachikoSUGIYAMA, TakahideUSUI, Masanori
    • H01L29/739
    • H01L29/7397H01L29/0619H01L29/0634H01L29/1095H01L29/7813
    • The present invention relates to a technique for reducing the on-voltage of the semiconductor device by increasing the concentration of minority carriers in the deep region (26) and the intermediate region (28). A semiconductor device according to the invention comprises an electrode, a top region (36) of a second conductivity type connected to the electrode, a deep region of the second conductivity type, and an intermediate region of a first conductivity type connected to the electrode. A portion of the intermediate region isolates the top region and the deep region. The semiconductor device further comprises a gate electrode (32) facing the portion of the intermediate region via an insulating layer. The portion facing the gate electrode isolates the top region and the deep region. The semiconductor device according to the invention further comprises a barrier region (40) that is formed within the intermediate region and/or the top region.
    • 本发明涉及通过增加深区域(26)和中间区域(28)中的少数载流子的浓度来降低半导体器件的导通电压的技术。 根据本发明的半导体器件包括电极,连接到电极的第二导电类型的顶部区域(36),第二导电类型的深区域和连接到电极的第一导电类型的中间区域。 中间区域的一部分隔离顶部区域和深部区域。 半导体器件还包括经由绝缘层面对中间区域的部分的栅电极(32)。 面对栅电极的部分隔离顶部区域和深部区域。 根据本发明的半导体器件还包括形成在中间区域和/或顶部区域内的阻挡区域(40)。