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1. 发明申请

US20100219867A1 Delay-locked loop and electronic device including the same 有权
标题翻译：延迟锁定环路和电子设备包括相同的
公开(公告)号：US20100219867A1
公开(公告)日：2010-09-02
申请号：US12659010
申请日：2010-02-23
申请人： Jong-Ryun Choi , Dong Hwan Lee , Su Ho Kim , Won Lee , Alex Joo , Ji Hun Oh
发明人： Jong-Ryun Choi , Dong Hwan Lee , Su Ho Kim , Won Lee , Alex Joo , Ji Hun Oh
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , H03L7/0805 , H03L7/0818 , H03L7/10
摘要： A delay locked loop is provided. The delay locked loop controls the number of delay cells that delay the phase of an input clock during a locking operation and controls a phase delay value of at least one delay cell among a plurality of delay cells after the locking operation is completed.
摘要翻译：提供延迟锁定环。延迟锁定环控制在锁定操作期间延迟输入时钟的相位的延迟单元的数量，并且在锁定操作完成之后控制多个延迟单元中的至少一个延迟单元的相位延迟值。

2. 发明授权

US08283958B2 Delay-locked loop and electronic device including the same 有权
标题翻译：延迟锁定环路和电子设备包括相同的
公开(公告)号：US08283958B2
公开(公告)日：2012-10-09
申请号：US12659010
申请日：2010-02-23
申请人： Jong-Ryun Choi , Dong Hwan Lee , Su Ho Kim , Won Lee , Alex Joo , Ji Hun Oh
发明人： Jong-Ryun Choi , Dong Hwan Lee , Su Ho Kim , Won Lee , Alex Joo , Ji Hun Oh
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , H03L7/0805 , H03L7/0818 , H03L7/10
摘要： A delay locked loop is provided. The delay locked loop controls the number of delay cells that delay the phase of an input clock during a locking operation and controls a phase delay value of at least one delay cell among a plurality of delay cells after the locking operation is completed.
摘要翻译：提供延迟锁定环。延迟锁定环控制在锁定操作期间延迟输入时钟的相位的延迟单元的数量，并且在锁定操作完成之后控制多个延迟单元中的至少一个延迟单元的相位延迟值。

3. 发明授权

US08049543B2 Delay locked loop, electronic device including the same, and method of operating the same 有权
标题翻译：延迟锁定环，包括相同的电子设备及其操作方法
公开(公告)号：US08049543B2
公开(公告)日：2011-11-01
申请号：US12592753
申请日：2009-12-02
申请人： Hee Chai Kang , Kyeong Ho Ryu , Seong Ook Jung , Won Lee , Dong Hwan Lee , Alex Joo , Jong-Ryun Choi
发明人： Hee Chai Kang , Kyeong Ho Ryu , Seong Ook Jung , Won Lee , Dong Hwan Lee , Alex Joo , Jong-Ryun Choi
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , H03K5/00006 , H03K5/133 , H03K2005/00058 , H03L7/07 , H03L7/0995 , H03L7/10
摘要： A delay locked loop controls a plurality of delay blocks included in a delay line and thus generate a plurality of clock signals which have a frequency obtained by multiplying a frequency of a reference clock signal, an accurate phase delay, and a constant duty cycle. The delay locked loop calculates an initial delay value and applies it to the delay blocks, thereby preventing harmonic locking and reducing locking time.
摘要翻译：延迟锁定环控制包括在延迟线中的多个延迟块，从而产生具有通过将参考时钟信号的频率，精确相位延迟和恒定占空比相乘而获得的频率的多个时钟信号。延迟锁定环路计算初始延迟值并将其应用于延迟块，从而防止谐波锁定并减少锁定时间。

4. 发明申请

US20100194456A1 Delay locked loop, electronic device including the same, and method of operating the same 有权
标题翻译：延迟锁定环，包括相同的电子设备及其操作方法
公开(公告)号：US20100194456A1
公开(公告)日：2010-08-05
申请号：US12592753
申请日：2009-12-02
申请人： Hee Chai Kang , Kyeong Ho Ryu , Seong Ook Jung , Won Lee , Dong Hwan Lee , Alex Joo , Jong Ryun Choi
发明人： Hee Chai Kang , Kyeong Ho Ryu , Seong Ook Jung , Won Lee , Dong Hwan Lee , Alex Joo , Jong Ryun Choi
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , H03K5/00006 , H03K5/133 , H03K2005/00058 , H03L7/07 , H03L7/0995 , H03L7/10
摘要： A delay locked loop controls a plurality of delay blocks included in a delay line and thus generate a plurality of clock signals which have a frequency obtained by multiplying a frequency of a reference clock signal, an accurate phase delay, and a constant duty cycle. The delay locked loop calculates an initial delay value and applies it to the delay blocks, thereby preventing harmonic locking and reducing locking time.
摘要翻译：延迟锁定环控制包括在延迟线中的多个延迟块，从而产生具有通过将参考时钟信号的频率，精确相位延迟和恒定占空比相乘而获得的频率的多个时钟信号。延迟锁定环路计算初始延迟值并将其应用于延迟块，从而防止谐波锁定并减少锁定时间。

5. 发明授权

US08258283B2 Method for detection of HCV at the real time PCR with intercalating dye 失效
标题翻译：用插入染料实时PCR检测HCV的方法
公开(公告)号：US08258283B2
公开(公告)日：2012-09-04
申请号：US12649239
申请日：2009-12-29
申请人： Dong Hwan Lee , Jin Seok Kang , Jae Sung Lee , Young Suk Park , Dong Hyun Kim
发明人： Dong Hwan Lee , Jin Seok Kang , Jae Sung Lee , Young Suk Park , Dong Hyun Kim
IPC分类号： C12Q1/68 , C07H21/04
CPC分类号： C12Q1/707 , C12Q1/6851
摘要： The present invention relates to a composition for detection of HCV by a single step reaction, comprising a specific primer and probe. In particular, the present invention relates to a composition for detection of HCV by a single step reaction, comprising the primer sequences of SEQ ID NOs:1 and 2; a composition for detection of HCV by a single step reaction, comprising both the primer sequences and a probe of SEQ ID NOs:5 or 9; a method for detecting HCV by a single step reaction, comprising the steps of obtaining a sample from a subject, and amplifying and detecting HCV using the primer and probe; and a kit comprising the primer and probe, in which the HCV detection method is characterized by a single step reaction.
摘要翻译：本发明涉及用于通过单步反应检测HCV的组合物，其包含特异性引物和探针。特别地，本发明涉及通过单步反应检测HCV的组合物，其包含SEQ ID NO：1和2的引物序列; 用于通过单步反应检测HCV的组合物，其包含引物序列和SEQ ID NO：5或9的探针; 一种通过单步反应检测HCV的方法，包括以下步骤：从受试者获得样品，并使用引物和探针扩增和检测HCV; 以及包含引物和探针的试剂盒，其中HCV检测方法的特征在于单步反应。

6. 外观设计

USD663290S1 Bluetooth headset 有权
公开(公告)号：USD663290S1
公开(公告)日：2012-07-10
申请号：US29398005
申请日：2011-07-25
申请人： Dong Hwan Lee
设计人： Dong Hwan Lee

7. 发明申请

US20120081869A1 PRINTED CIRCUIT BOARD FOR REDUCING CROSSTALK 审中-公开
标题翻译：印刷电路板，用于减少CROSSTALK
公开(公告)号：US20120081869A1
公开(公告)日：2012-04-05
申请号：US13251780
申请日：2011-10-03
申请人： Yoon Dong KIM , Hee Soo Yoon , Jong Lae Kim , Su Bong Jang , Dong Hwan Lee , Kyoung Ho Lee
发明人： Yoon Dong KIM , Hee Soo Yoon , Jong Lae Kim , Su Bong Jang , Dong Hwan Lee , Kyoung Ho Lee
IPC分类号： H05K1/16 , H05K9/00
CPC分类号： H04B15/02 , H04B1/40
摘要： There is provided a printed circuit board for reducing crosstalk, having a capacitive impedance component connected between signal and ground patterns, the printed circuit board including: signal patterns including a first signal pattern transferring low frequency signals and a second signal pattern transferring high frequency signals; ground patterns including a first ground pattern connected to the first signal pattern and a second ground pattern connected to the second signal pattern which are separated from each other; and a conductive shielding film connected between the first and second ground patterns and shielding electromagnetic waves generated from the printed circuit board. Accordingly, crosstalk between the low and high frequency signals may be reduced.
摘要翻译：提供了一种用于减少串扰的印刷电路板，具有连接在信号和接地图案之间的电容性阻抗分量，印刷电路板包括：包括传输低频信号的第一信号图案和传送高频信号的第二信号图案的信号图案; 包括连接到第一信号图案的第一接地图案和连接到第二信号图案的彼此分离的第二接地图案的接地图案; 以及连接在第一和第二接地图案之间并且屏蔽从印刷电路板产生的电磁波的导电屏蔽膜。因此，可以减小低频和高频信号之间的串扰。

8. 发明授权

US08022915B2 Liquid crystal driving device and driving method thereof 有权
标题翻译：液晶驱动装置及其驱动方法
公开(公告)号：US08022915B2
公开(公告)日：2011-09-20
申请号：US10621250
申请日：2003-07-16
申请人： Dong Hwan Lee , Tae Hyuk Kwon
发明人： Dong Hwan Lee , Tae Hyuk Kwon
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3648 , G09G2320/0223
摘要： Disclosed is a liquid crystal driving device, which is without a gate PCB, having improved uniformity of screen, and a driving method thereof. The liquid crystal driving device comprises: a sequence recognition means for recognizing sequence of a pertinent gate driver IC by a pulse width of a vertical start signal inputted in synchronization with a vertical synchronous signal, and generating a Carry signal and location data of the pertinent gate driver IC; and a gate-off voltage generation means for receiving a first gate-off voltage and the location data of the pertinent gate driver IC, and outputting a second gate-off voltage which is generated by subtracting a voltage attenuation quantity corresponding to the location data of the gate driver IC from the first gate-off voltage.
摘要翻译：公开了一种没有栅极PCB的具有改进的屏幕均匀性的液晶驱动装置及其驱动方法。液晶驱动装置包括：序列识别装置，用于通过与垂直同步信号同步输入的垂直起始信号的脉冲宽度来识别相关栅极驱动器IC的序列，并产生相应栅极的进位信号和位置数据驱动IC; 以及栅极截止电压产生装置，用于接收第一栅极截止电压和相关栅极驱动器IC的位置数据，并输出第二栅极截止电压，该第二栅极截止电压是通过减去与位置数据相对应的电压衰减量栅极驱动器IC从第一个栅极截止电压。

9. 发明申请

US20070285352A1 Plasma display apparatus and driving thereof 有权
标题翻译：等离子体显示装置及其驱动
公开(公告)号：US20070285352A1
公开(公告)日：2007-12-13
申请号：US11634121
申请日：2006-12-06
申请人： Dooyong Hwang , Dong Hwan Lee
发明人： Dooyong Hwang , Dong Hwan Lee
IPC分类号： G09G3/28
CPC分类号： G09G3/293 , G09G3/2022 , G09G3/291 , G09G3/2927 , G09G3/294 , G09G2320/0228 , G09G2320/041
摘要： Provided is a a plasma display apparatus and a method of driving the same. The plasma display apparatus includes a scan driver. The scan driver supplies a first driving signal to the scan electrode in a first subfield during a first reset period, a first address period, and a first sustain period. The scan driver supplies a second driving signal to the scan electrode, during a second reset period having a different time duration from the first reset period, a second address period having a different time duration from the first address period, and a second sustain period having a different time duration from the first sustain period. At least one of the dielectric layer or the protective layer includes 1000 PPM (parts per million) or less of lead(Pb).
摘要翻译：提供了一种等离子体显示装置及其驱动方法。等离子体显示装置包括扫描驱动器。扫描驱动器在第一复位周期，第一寻址周期和第一维持周期期间在第一子场中向扫描电极提供第一驱动信号。在具有与第一复位周期不同的持续时间的第二复位周期期间，扫描驱动器向扫描电极提供第二驱动信号，第二寻址周期具有与第一寻址周期不同的持续时间，以及第二维持周期具有与第一维持周期不同的持续时间。介电层或保护层中的至少一个包括1000PPM（百万分之一）以下的铅（Pb）。

10. 发明授权

US09875044B2 Data storage device compensating for initial threshold voltage distribution shift, method of operating the same, and data processing system including the same 有权
公开(公告)号：US09875044B2
公开(公告)日：2018-01-23
申请号：US14800783
申请日：2015-07-16
申请人： Dong Hwan Lee , Jun Jin Kong , Chang Kyu Seol , Hong Rak Son
发明人： Dong Hwan Lee , Jun Jin Kong , Chang Kyu Seol , Hong Rak Son
IPC分类号： G06F3/00 , G06F3/06 , G06F17/30 , G06F12/02 , G06F21/79 , G11C16/04
CPC分类号： G06F3/0619 , G06F3/065 , G06F3/0653 , G06F3/068 , G06F12/0246 , G06F17/3033 , G06F17/30867 , G06F21/79 , G11C16/0466
摘要： A method is provided for operating a data storage device capable of compensating for an initial threshold voltage shift of multiple memory cells. The method includes generating a first compression value for a first write address corresponding to a first write request input during a first time interval among different time intervals, and storing the first compression value in a first table among multiple tables.

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