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1. 发明授权

US06583000B1 Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation 失效
标题翻译： STI形成后Si1-xGex CMOS与Si1-xGex弛豫过程的整合
公开(公告)号：US06583000B1
公开(公告)日：2003-06-24
申请号：US10072183
申请日：2002-02-07
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-shen Maa , Douglas James Tweet
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-shen Maa , Douglas James Tweet
IPC分类号： H01L218238
CPC分类号： H01L21/823807 , H01L21/76224 , H01L21/823878
摘要： A method of forming a CMOS device includes preparing a silicon substrate, including forming plural device regions on the substrate; epitaxially forming a strained SiGe layer on the substrate, wherein the SiGe layer has a germanium content of between about 20% and 40%; forming a silicon cap layer epitaxially on the SiGe layer; depositing a gate oxide layer; depositing a first polysilicon layer; implanting H+ ions to a depth below the SiGe layer; forming a trench by shallow trench isolation which extends into the substrate; annealing the structure at a temperature of between about 700° C. to 900° C. for between about five minutes to sixty minutes; depositing an oxide layer and a second polysilicon layer, thereby filling the trench; planarizing the structure to the top of the level of the portion of the second polysilicon layer which is located in the trench; and completing the CMOS device.
摘要翻译：形成CMOS器件的方法包括制备硅衬底，包括在衬底上形成多个器件区域; 在衬底上外延地形成应变SiGe层，其中SiGe层的锗含量在约20％和40％之间; 在SiGe层上外延地形成硅帽层; 沉积栅氧化层; 沉积第一多晶硅层; 将H +离子注入SiGe层以下的深度; 通过延伸到衬底中的浅沟槽隔离形成沟槽; 在约700℃至900℃的温度下退火结构约5分钟至60分钟; 沉积氧化物层和第二多晶硅层，从而填充沟槽; 将结构平面化到位于沟槽中的第二多晶硅层的部分的顶部的顶部; 并完成CMOS设备。

2. 发明授权

US07226504B2 Method to form thick relaxed SiGe layer with trench structure 失效
标题翻译：形成具有沟槽结构的厚松弛SiGe层的方法
公开(公告)号：US07226504B2
公开(公告)日：2007-06-05
申请号：US10062336
申请日：2002-01-31
申请人： Jer-Shen Maa , Douglas James Tweet , Tingkai Li , Jong-Jan Lee , Sheng Teng Hsu
发明人： Jer-Shen Maa , Douglas James Tweet , Tingkai Li , Jong-Jan Lee , Sheng Teng Hsu
IPC分类号： C30B33/02
CPC分类号： H01L21/3247 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02694 , H01L21/324
摘要： A method of forming a SiGe layer having a relatively high germanium content and a relatively low threading dislocation density includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the germanium content of the SiGe layer is greater than 20%, by atomic ratio; implanting H+ ions into the SiGe layer at a dose of between about 1·1016 cm−2 to 5·1016 cm−2, at an energy of between about 20 keV to 45 keV; patterning the SiGe layer with photoresist; plasma etching the structure to form trenches about regions; removing the photoresist; and thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes.
摘要翻译：形成具有较高锗含量和较低穿透位错密度的SiGe层的方法包括制备硅衬底; 将SiGe层沉积至约100nm至500nm的厚度，其中SiGe层的锗含量按原子比大于20％; 将H +离子以约1.10×16cm -2至0.0010±0.2cm的剂量注入SiGe层中， SUP>，在约20keV至45keV之间的能量; 用光致抗蚀剂图案化SiGe层; 等离子体蚀刻结构以形成关于区域的沟槽; 去除光致抗蚀剂; 以及对基板和SiGe层进行热退火，以在惰性气氛中在约650℃至950℃的温度下放置SiGe层约30秒至30分钟。

3. 发明授权

US07800148B2 CMOS active pixel sensor 有权
标题翻译： CMOS有源像素传感器
公开(公告)号：US07800148B2
公开(公告)日：2010-09-21
申请号：US12178169
申请日：2008-07-23
申请人： Jong-Jan Lee , Sheng Teng Hsu , Douglas James Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Teng Hsu , Douglas James Tweet , Jer-Shen Maa
IPC分类号： H01L31/062
CPC分类号： H01L27/14647
摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

4. 发明申请

US20080303072A1 CMOS Active Pixel Sensor 有权
标题翻译： CMOS有源像素传感器
公开(公告)号：US20080303072A1
公开(公告)日：2008-12-11
申请号：US12178169
申请日：2008-07-23
申请人： Jong-Jan Lee , Sheng Teng Hsu , Douglas James Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Teng Hsu , Douglas James Tweet , Jer-Shen Maa
IPC分类号： H01L31/113
CPC分类号： H01L27/14647
摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

5. 发明授权

US06746902B2 Method to form relaxed sige layer with high ge content 有权
标题翻译：形成具有高Ge含量的轻松精神层的方法
公开(公告)号：US06746902B2
公开(公告)日：2004-06-08
申请号：US10062319
申请日：2002-01-31
申请人： Jer-Shen Maa , Douglas James Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Douglas James Tweet , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L21/322 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02694 , Y10S438/933
摘要： A method of forming a SiGe layer having a relatively high Ge content includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the Ge content of the SiGe layer is equal to or greater than 22%, by molecular weight; implanting H+ ions into the SiGe layer at a dose of between about 1·1016 cm−2 to 5·1016 cm−2, at an energy of between about 20 keV to 45 keV; thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes; and depositing a layer of tensile-strained silicon on the relaxed SiGe layer to a thickness of between about 5 nm to 30 nm.
摘要翻译：形成Ge含量较高的SiGe层的方法包括制备硅衬底; 将SiGe层沉积至约100nm至500nm的厚度，其中SiGe层的Ge含量通过分子量等于或大于22％; 以约20keV至45keV之间的能量以约1.10 16 cm -2至5.10 16 cm -2的剂量将H +离子注入SiGe层; 热处理基板和SiGe层，以在约650℃至950℃的温度的惰性气氛中放松SiGe层约30秒至30分钟; 以及在弛豫的SiGe层上沉积拉伸应变硅层至约5nm至30nm的厚度。

6. 发明授权

US06627919B2 Thermally stable nickel germanosilicide formed on SiGe 有权
公开(公告)号：US06627919B2
公开(公告)日：2003-09-30
申请号：US10319312
申请日：2002-12-12
申请人： Jer-shen Maa , Douglas James Tweet , Sheng Teng Hsu
发明人： Jer-shen Maa , Douglas James Tweet , Sheng Teng Hsu
IPC分类号： H01L2976
CPC分类号： H01L21/28525 , H01L21/28518 , H01L29/45
摘要： A thermally stable nickel germanosilicide on SiGe integrated circuit device, and a method of making the same, is disclosed. During fabrication of the device iridium or cobalt is added at the Ni/SiGe interface to decrease the sheet resistance of the device. The device comprising nickel silicide with iridium on SiGe shows thermal stability at temperatures up to 800° C. The device comprising nickel silicide with cobalt on SiGe shows a decrease in the sheet resistance with temperature, i.e., the resistance remains low when annealing temperatures extend up to and beyond 800° C.

7. 发明授权

US06506637B2 Method to form thermally stable nickel germanosilicide on SiGe 失效
公开(公告)号：US06506637B2
公开(公告)日：2003-01-14
申请号：US09834488
申请日：2001-04-12
申请人： Jer-shen Maa , Douglas James Tweet , Sheng Teng Hsu
发明人： Jer-shen Maa , Douglas James Tweet , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L21/28525 , H01L21/28518 , H01L29/45
摘要： A thermally stable nickel germanosilicide on SiGe integrated circuit device, and a method of making the same, is disclosed. During fabrication of the device iridium or cobalt is added at the Ni/SiGe interface to decrease the sheet resistance of the device. The device comprising nickel silicide with iridium on SiGe shows thermal stability at temperatures up to 800° C. The device comprising nickel silicide with cobalt on SiGe shows a decrease in the sheet resistance with temperature, i.e., the resistance remains low when annealing temperatures extend up to and beyond 800° C.

8. 发明授权

US07675056B2 Germanium phototransistor with floating body 有权
标题翻译：具有浮体的锗光电晶体管
公开(公告)号：US07675056B2
公开(公告)日：2010-03-09
申请号：US11891574
申请日：2007-08-10
申请人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
发明人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136 , H01L31/028 , H01L31/1808 , Y02E10/547
摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.
摘要翻译：提出了一种浮体锗（Ge）光电晶体管及其制造工艺。该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。

9. 发明授权

US07351995B2 Floating body germanium phototransistor having a photo absorption threshold bias region 有权
标题翻译：具有光吸收阈值偏置区域的浮体锗光电晶体管
公开(公告)号：US07351995B2
公开(公告)日：2008-04-01
申请号：US11894938
申请日：2007-08-22
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
摘要翻译：提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。在一个方面，第二S / D区域具有比第一S / D长度更长的长度。光吸收阈值偏置区域位于第二S / D区域的下方。或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

10. 发明授权

US06562703B1 Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content 失效
标题翻译：用于形成具有高锗含量的松弛硅锗层的分子氢注入方法
公开(公告)号：US06562703B1
公开(公告)日：2003-05-13
申请号：US10099374
申请日：2002-03-13
申请人： Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu , Jong-Jan Lee
发明人： Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu , Jong-Jan Lee
IPC分类号： H01L21265
CPC分类号： H01L21/263 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/02694 , H01L29/1054 , Y10S438/933
摘要： A method is provided for forming a relaxed silicon germanium layer with a high germanium content on a silicon substrate. The method comprises: depositing a single-crystal silicon (Si) buffer layer overlying the silicon substrate; depositing a layer of single-crystal silicon germanium (Si1−xGex) overlying the Si buffer layer having a thickness of 1000 to 5000 Å; implanting the Si1−xGex layer with ionized molecular hydrogen (H2+) a projected range of approximately 100 to 300 Å into the underlying Si buffer layer; optionally, implanting the Si1−xGex layer with a species selected such as boron, He, or Si; annealing; and, in response to the annealing, converting the Si1−xGex layer to a relaxed Si1−xGex layer. Optionally, after annealing, an additional layer of single-crystal Si1−xGex having a thickness of greater than 1000 Å can be deposited overlying the relaxed layer of Si1−xGex.
摘要翻译：提供了一种在硅衬底上形成具有高锗含量的松弛硅锗层的方法。该方法包括：沉积覆盖硅衬底的单晶硅（Si）缓冲层; 沉积覆盖厚度为1000至5000的Si缓冲层的单晶硅锗层（Si1-xGex）; 将具有离子化分子氢（H 2 +）的Si 1-x Ge x层投射到下面的Si缓冲层中约100至300埃的投影范围; 任选地，将Si1-xGex层用诸如硼，氦或硅的物质进行注入; 退火; 并且响应于退火，将Si1-xGex层转化为弛豫的Si1-xGex层。任选地，在退火之后，可以沉积厚度大于的附加层的单晶Si1-xGex覆盖在Si1-xGex的松弛层上。

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