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1. 发明申请

US20120122297A1 METHOD OF FABRICATING A NONVOLATILE MEMORY DEVICE 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20120122297A1
公开(公告)日：2012-05-17
申请号：US13198157
申请日：2011-08-04
申请人： Jong-Hoon NA , Young-Woo Park , Dong-Hwa Kwak , Tae-Yong Kim , Jee-Hoon Han , Jang-Hyun You , Dong-Sik Lee , Su-Jin Park
发明人： Jong-Hoon NA , Young-Woo Park , Dong-Hwa Kwak , Tae-Yong Kim , Jee-Hoon Han , Jang-Hyun You , Dong-Sik Lee , Su-Jin Park
IPC分类号： H01L21/762
CPC分类号： H01L27/0207 , H01L21/28273 , H01L27/11 , H01L27/11519 , H01L27/11524
摘要： A method of fabricating a nonvolatile memory device includes providing a substrate having active regions defined by a plurality of trenches, forming a first isolation layer on the substrate having the plurality of trenches, forming a sacrificial layer on the first isolation layer to fill the trenches, the sacrificial layer including a first region filling lower portions of the trenches and a second region filling portions other than the lower portions, removing the second region of the sacrificial layer, forming a second isolation layer on the first isolation layer and the first region of the sacrificial layer, forming air gaps in the trenches by removing the first region of the sacrificial layer, and removing a portion of the first isolation layer and a portion of the second isolation layer while maintaining the air gaps.
摘要翻译：一种制造非易失性存储器件的方法包括提供具有由多个沟槽限定的有源区的衬底，在具有多个沟槽的衬底上形成第一隔离层，在第一隔离层上形成牺牲层以填充沟槽，所述牺牲层包括填充所述沟槽的下部的第一区域和除所述下部以外的第二区域填充部分，去除所述牺牲层的所述第二区域，在所述第一隔离层上形成第二隔离层和在所述第一隔离层的所述第一区域牺牲层，通过去除牺牲层的第一区域在沟槽中形成气隙，以及在保持气隙的同时去除第一隔离层的一部分和第二隔离层的一部分。

2. 发明授权

US08748286B2 Method of fabricating a nonvolatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08748286B2
公开(公告)日：2014-06-10
申请号：US13198157
申请日：2011-08-04
申请人： Jong-Hoon Na , Young-Woo Park , Dong-Hwa Kwak , Tae-Yong Kim , Jee-Hoon Han , Jang-Hyun You , Dong-Sik Lee , Su-Jin Park
发明人： Jong-Hoon Na , Young-Woo Park , Dong-Hwa Kwak , Tae-Yong Kim , Jee-Hoon Han , Jang-Hyun You , Dong-Sik Lee , Su-Jin Park
IPC分类号： H01L21/76 , H01L29/00
CPC分类号： H01L27/0207 , H01L21/28273 , H01L27/11 , H01L27/11519 , H01L27/11524
摘要： A method of fabricating a nonvolatile memory device includes providing a substrate having active regions defined by a plurality of trenches, forming a first isolation layer on the substrate having the plurality of trenches, forming a sacrificial layer on the first isolation layer to fill the trenches, the sacrificial layer including a first region filling lower portions of the trenches and a second region filling portions other than the lower portions, removing the second region of the sacrificial layer, forming a second isolation layer on the first isolation layer and the first region of the sacrificial layer, forming air gaps in the trenches by removing the first region of the sacrificial layer, and removing a portion of the first isolation layer and a portion of the second isolation layer while maintaining the air gaps.
摘要翻译：一种制造非易失性存储器件的方法包括提供具有由多个沟槽限定的有源区的衬底，在具有多个沟槽的衬底上形成第一隔离层，在第一隔离层上形成牺牲层以填充沟槽，所述牺牲层包括填充所述沟槽的下部的第一区域和除所述下部以外的第二区域填充部分，去除所述牺牲层的所述第二区域，在所述第一隔离层上形成第二隔离层和在所述第一隔离层的所述第一区域牺牲层，通过去除牺牲层的第一区域在沟槽中形成气隙，以及在保持气隙的同时去除第一隔离层的一部分和第二隔离层的一部分。

3. 发明授权

US09330913B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09330913B2
公开(公告)日：2016-05-03
申请号：US12912744
申请日：2010-10-27
申请人： Jang-Hyun You , Jong-Min Lee , Dong-Hwa Kwak , Tae-Yong Kim , Jong-Hoon Na , Young-Woo Park , Dong-Sik Lee , Jee-Hoon Han
发明人： Jang-Hyun You , Jong-Min Lee , Dong-Hwa Kwak , Tae-Yong Kim , Jong-Hoon Na , Young-Woo Park , Dong-Sik Lee , Jee-Hoon Han
IPC分类号： H01L29/40 , H01L21/033 , H01L21/28 , H01L21/308 , H01L21/3213 , H01L21/762 , H01L27/115 , H01L29/66
CPC分类号： H01L21/0337 , H01L21/28273 , H01L21/3086 , H01L21/32139 , H01L21/76229 , H01L27/11521 , H01L27/11536 , H01L29/66825
摘要： A semiconductor device includes first, second, and third conductive lines, each with a respective line portion formed over a substrate and extending in a first direction and with a respective branch portion extending from an end of the respective line portion in a direction different from the first direction. The branch portion of a middle conductive line is disposed between and shorter than the respective branch portions of the outer conductive lines such that contact pads may be formed integral with such branch portions of the conductive lines.
摘要翻译：半导体器件包括第一，第二和第三导线，每个导线具有形成在衬底上并且沿第一方向延伸的相应的线部分，并且具有相应的分支部分，该分支部分从相应线部分的端部沿与第一个方向中间导线的分支部分设置在外导电线的相应分支部分之间并且短于接触焊盘可以与导电线的这种分支部分一体形成。

4. 发明授权

US08753955B2 Methods of fabricating nonvolatile memory devices including voids between active regions and related devices 有权
标题翻译：制造包括有源区域和相关器件之间的空隙的非易失性存储器件的方法
公开(公告)号：US08753955B2
公开(公告)日：2014-06-17
申请号：US13300787
申请日：2011-11-21
申请人： Dong-Sik Lee , Jang-Hyun You , Jee-Hoon Han , Young-Woo Park , Sung-Hoi Hur , Sang-Ick Joo
发明人： Dong-Sik Lee , Jang-Hyun You , Jee-Hoon Han , Young-Woo Park , Sung-Hoi Hur , Sang-Ick Joo
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/76229 , H01L21/764
摘要： A method of fabricating a nonvolatile memory device includes forming trenches in a substrate defining device isolation regions therein and active regions therebetween. The trenches and the active regions therebetween extend into first and second device regions of the substrate. A sacrificial layer is formed in the trenches between the active regions in the first device region, and an insulating layer is formed to substantially fill the trenches between the active regions in the second device region. At least a portion of the sacrificial layer in the trenches in the first device region is selectively removed to define gap regions extending along the trenches between the active regions in the first device region, while substantially maintaining the insulating layer in the trenches between the active regions in the second device region. Related methods and devices are also discussed.
摘要翻译：制造非易失性存储器件的方法包括在衬底中形成限定器件隔离区域的衬底中的沟槽，并且其间的有源区域。沟槽和其间的有源区延伸到衬底的第一和第二器件区域。牺牲层形成在第一器件区域中的有源区之间的沟槽中，并且形成绝缘层以基本上填充第二器件区域中的有源区之间的沟槽。选择性地去除第一器件区域中的沟槽中的牺牲层的至少一部分，以限定沿着第一器件区域中的有源区之间的沟槽延伸的间隙区域，同时基本上将沟槽中的绝缘层保持在有源区在第二设备区域中。还讨论了相关的方法和设备。

5. 发明申请

US20120202335A1 METHODS OF FABRICATING NONVOLATILE MEMORY DEVICES INCLUDING VOIDS BETWEEN ACTIVE REGIONS AND RELATED DEVICES 有权
标题翻译：制造非活性存储器件的方法，包括有源区域和相关器件之间的失调
公开(公告)号：US20120202335A1
公开(公告)日：2012-08-09
申请号：US13300787
申请日：2011-11-21
申请人： Dong-Sik Lee , Jang-Hyun You , Jee-Hoon Han , Young-Woo Park , Sung-Hoi Hur , Sang-Ick Joo
发明人： Dong-Sik Lee , Jang-Hyun You , Jee-Hoon Han , Young-Woo Park , Sung-Hoi Hur , Sang-Ick Joo
IPC分类号： H01L21/762
CPC分类号： H01L21/76224 , H01L21/76229 , H01L21/764
摘要： A method of fabricating a nonvolatile memory device includes forming trenches in a substrate defining device isolation regions therein and active regions therebetween. The trenches and the active regions therebetween extend into first and second device regions of the substrate. A sacrificial layer is formed in the trenches between the active regions in the first device region, and an insulating layer is formed to substantially fill the trenches between the active regions in the second device region. At least a portion of the sacrificial layer in the trenches in the first device region is selectively removed to define gap regions extending along the trenches between the active regions in the first device region, while substantially maintaining the insulating layer in the trenches between the active regions in the second device region. Related methods and devices are also discussed.
摘要翻译：制造非易失性存储器件的方法包括在衬底中形成限定器件隔离区域的衬底中的沟槽，并且其间的有源区域。沟槽和其间的有源区延伸到衬底的第一和第二器件区域。牺牲层形成在第一器件区域中的有源区之间的沟槽中，并且形成绝缘层以基本上填充第二器件区域中的有源区之间的沟槽。选择性地去除第一器件区域中的沟槽中的牺牲层的至少一部分，以限定沿着第一器件区域中的有源区之间的沟槽延伸的间隙区域，同时基本上将沟槽中的绝缘层保持在有源区在第二设备区域中。还讨论了相关的方法和设备。

6. 发明申请

US20120052676A1 Methods of Fabricating Semiconductor Memory Devices 有权
标题翻译：制造半导体存储器件的方法
公开(公告)号：US20120052676A1
公开(公告)日：2012-03-01
申请号：US13190032
申请日：2011-07-25
申请人： Jong-Min LEE , Jae-Kwan Park , Jee-Hoon Han
发明人： Jong-Min LEE , Jae-Kwan Park , Jee-Hoon Han
IPC分类号： H01L21/28
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/7682 , H01L27/11521 , H01L27/11526 , H01L29/42324 , H01L29/4234
摘要： Methods of forming memory devices are provided. The methods may include forming a pre-stacked gate structure including a lower structure and a first polysilicon pattern on the substrate. The methods may also include forming an insulation layer covering the pre-stacked gate structure. The methods may further include forming a trench in the insulation layer by removing a portion of the first polysilicon pattern. The methods may additionally include forming a metal film pattern in the trench on the first polysilicon pattern. The methods may also include forming a first metal silicide pattern by performing a first thermal treatment on the first polysilicon pattern and the metal film pattern. The methods may further include forming a second polysilicon pattern in the trench. The methods may additionally include forming a second metal silicide pattern by performing a second thermal treatment on the second polysilicon pattern and the first metal silicide pattern.
摘要翻译：提供了形成存储器件的方法。所述方法可以包括在衬底上形成包括下部结构和第一多晶硅图案的预堆叠栅极结构。所述方法还可以包括形成覆盖预堆叠栅极结构的绝缘层。所述方法还可以包括通过去除第一多晶硅图案的一部分在绝缘层中形成沟槽。所述方法还可以包括在第一多晶硅图案上的沟槽中形成金属膜图案。所述方法还可以包括通过对第一多晶硅图案和金属膜图案进行第一热处理来形成第一金属硅化物图案。所述方法还可以包括在沟槽中形成第二多晶硅图案。所述方法还可以包括通过对第二多晶硅图案和第一金属硅化物图案进行第二热处理来形成第二金属硅化物图案。

7. 发明授权

US08357605B2 Methods of fabricating semiconductor memory devices 有权
标题翻译：制造半导体存储器件的方法
公开(公告)号：US08357605B2
公开(公告)日：2013-01-22
申请号：US13190032
申请日：2011-07-25
申请人： Jong-Min Lee , Jae-Kwan Park , Jee-Hoon Han
发明人： Jong-Min Lee , Jae-Kwan Park , Jee-Hoon Han
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/7682 , H01L27/11521 , H01L27/11526 , H01L29/42324 , H01L29/4234
摘要： Methods of forming memory devices are provided. The methods may include forming a pre-stacked gate structure including a lower structure and a first polysilicon pattern on the substrate. The methods may also include forming an insulation layer covering the pre-stacked gate structure. The methods may further include forming a trench in the insulation layer by removing a portion of the first polysilicon pattern. The methods may additionally include forming a metal film pattern in the trench on the first polysilicon pattern. The methods may also include forming a first metal silicide pattern by performing a first thermal treatment on the first polysilicon pattern and the metal film pattern. The methods may further include forming a second polysilicon pattern in the trench. The methods may additionally include forming a second metal silicide pattern by performing a second thermal treatment on the second polysilicon pattern and the first metal silicide pattern.
摘要翻译：提供了形成存储器件的方法。所述方法可以包括在衬底上形成包括下部结构和第一多晶硅图案的预堆叠栅极结构。所述方法还可以包括形成覆盖预堆叠栅极结构的绝缘层。所述方法还可以包括通过去除第一多晶硅图案的一部分在绝缘层中形成沟槽。所述方法还可以包括在第一多晶硅图案上的沟槽中形成金属膜图案。所述方法还可以包括通过对第一多晶硅图案和金属膜图案进行第一热处理来形成第一金属硅化物图案。所述方法还可以包括在沟槽中形成第二多晶硅图案。所述方法还可以包括通过对第二多晶硅图案和第一金属硅化物图案进行第二热处理来形成第二金属硅化物图案。

8. 发明授权

US10396086B2 Vertical non-volatile memory device having channel-accomodating opening formed of etch stop region in lower stack layers 有权
公开(公告)号：US10396086B2
公开(公告)日：2019-08-27
申请号：US15639733
申请日：2017-06-30
申请人： Young-Hwan Son , Jae-Hoon Jang , Jee-Hoon Han
发明人： Young-Hwan Son , Jae-Hoon Jang , Jee-Hoon Han
IPC分类号： H01L27/11582 , H01L27/1157 , H01L27/11556 , H01L27/11519 , H01L27/11565 , H01L27/11524 , H01L27/11529 , H01L27/11573
摘要： A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.

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