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1. 发明授权

US08253171B1 Two terminal nanotube switch, memory array incorporating the same and method of making 有权
标题翻译：两端子纳米管开关，内存阵列及其制作方法
公开(公告)号：US08253171B1
公开(公告)日：2012-08-28
申请号：US12857494
申请日：2010-08-16
申请人： Garo J. Derderian , Michael J. O'Connor , Adrian N. Robinson , Jonathan W. Ward
发明人： Garo J. Derderian , Michael J. O'Connor , Adrian N. Robinson , Jonathan W. Ward
IPC分类号： H01L27/118
CPC分类号： B82Y10/00 , H01L27/2436 , H01L27/2463 , H01L29/413 , H01L45/04 , H01L45/1226 , H01L45/149 , H01L45/1641
摘要： A two terminal switching device includes a first conductive terminal, a second conductive terminal in spaced relation to the first terminal, the first terminal encompassed by the second terminal. The device also includes an electrically insulating spacer that encompasses the first terminal and provides the spaced relation between the second terminal and the first terminal. It also includes a nanotube article comprising at least one carbon nanotube, the nanotube article being arranged to overlap at least a portion of each of the first and second terminals. The device also includes a stimulus circuit in electrical communication with at least one of the first and second terminals that is capable of applying a first electrical stimulus to at least one of the first and second terminals to change the resistance of the device between the first and second terminals from a relatively low resistance to a relatively high resistance.
摘要翻译：双端开关装置包括第一导电端子，与第一端子间隔开的第二导电端子，由第二端子包围的第一端子。该装置还包括电绝缘间隔件，其包围第一端子并且提供第二端子和第一端子之间的间隔关系。其还包括包含至少一个碳纳米管的纳米管制品，所述纳米管制品被布置成与所述第一和第二端子中的每一个的至少一部分重叠。该装置还包括与第一和第二端子中的至少一个电连通的刺激电路，其能够对第一和第二端子中的至少一个施加第一电刺激，以改变装置在第一和第二端子之间的电阻第二端子从相对较低的电阻到相对较高的电阻。

2. 发明授权

US09159418B1 High density stacked CNT memory cube arrays with memory selectors 有权
标题翻译：具有存储器选择器的高密度堆叠CNT存储器立方体阵列
公开(公告)号：US09159418B1
公开(公告)日：2015-10-13
申请号：US13301521
申请日：2011-11-21
申请人： Jonathan W. Ward , Adrian N. Robinson , Garo J. Derderian
发明人： Jonathan W. Ward , Adrian N. Robinson , Garo J. Derderian
IPC分类号： G11C11/00 , G11C13/02
CPC分类号： G11C13/025 , G11C13/003 , G11C2213/17 , G11C2213/33 , G11C2213/70 , G11C2213/71 , G11C2213/76 , H01L51/0048 , H01L51/0591
摘要： A three-dimensional (3-D) memory stack and a method of formation thereof are described. The 3-D memory stack includes a number of vertically stacked memory devices. Each memory device includes one or more memory cells. Each of the memory cells can be formed on a conductive material. Each memory device further includes one or more selector elements each configured to couple a memory cell of the one or more memory cells to a respective bit line. None of the selector elements is configured as a diode or a transistor element.
摘要翻译：描述三维（3-D）存储器堆栈及其形成方法。 3-D存储器堆叠包括多个垂直堆叠的存储器件。每个存储器件包括一个或多个存储器单元。每个存储单元可以形成在导电材料上。每个存储器件还包括一个或多个选择器元件，每个选择器元件被配置为将一个或多个存储器单元的存储器单元耦合到相应的位线。没有选择器元件被配置为二极管或晶体管元件。

3. 发明授权

US08125824B1 Nanotube random access memory (NRAM) and transistor integration 有权
标题翻译：纳米管随机存取存储器（NRAM）和晶体管集成
公开(公告)号：US08125824B1
公开(公告)日：2012-02-28
申请号：US12875044
申请日：2010-09-02
申请人： Jonathan W. Ward , Adrian N. Robinson , Scott Anderson
发明人： Jonathan W. Ward , Adrian N. Robinson , Scott Anderson
IPC分类号： G11C11/34
CPC分类号： G11C13/025 , B82Y10/00
摘要： A nanotube random access memory (NRAM) structure is provided. The structure includes a substrate, a gate electrode disposed in the substrate, and a first nanotube fabric disposed on the substrate. The first nanotube fabric has a channel region spaced apart from the gate electrode by a portion of the substrate. The structure also includes a drain contact contacting the first nanotube fabric. The structure also includes a second nanotube fabric disposed on the substrate, and is adjacent and connected to the first nanotube fabric. The structure also includes a source contact contacting the second nanotube fabric. The first nanotube fabric is a high-voltage fabric compared to the second nanotube fabric such that when a voltage is applied across the first nanotube fabric and the second nanotube fabric via the drain contact and the source contact, the second nanotube fabric is permitted to switch without switching the first nanotube fabric.
摘要翻译：提供了纳米管随机存取存储器（NRAM）结构。该结构包括衬底，设置在衬底中的栅电极和布置在衬底上的第一纳米管织物。第一纳米管织物具有通过衬底的一部分与栅电极间隔开的沟道区。该结构还包括接触第一纳米管织物的漏极接触。该结构还包括布置在基底上并与第一纳米管织物相邻并连接的第二纳米管织物。该结构还包括接触第二纳米管织物的源极接触。与第二纳米管织物相比，第一纳米管织物是高电压织物，使得当经由漏极接触和源极接触跨越第一纳米管织物和第二纳米管织物施加电压时，允许第二纳米管织物切换而不切换第一纳米管织物。

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