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1. 发明授权

US06297921B1 Write driver circuit having programmable overshoot and undershoot 有权
标题翻译：写入具有可编程过冲和下冲的驱动电路
公开(公告)号：US06297921B1
公开(公告)日：2001-10-02
申请号：US09292502
申请日：1999-04-15
申请人： John J. Price, Jr. , Donald J. Schulte
发明人： John J. Price, Jr. , Donald J. Schulte
IPC分类号： G11B502
CPC分类号： G11B5/022 , G11B5/012 , G11B5/02 , G11B5/035 , G11B5/09 , G11B2005/0013
摘要： Undershoot and overshoot control circuitry is provided in a write driver circuit to enhance its efficiency and ability to quickly change directions of write current through a write head. The undershoot and overshoot control circuitry includes: (1) an undershoot reduction circuit, which adds current to the write current when one head terminal has a voltage higher than the opposite head terminal and the input signals are in a certain state, indicating that the write current waveform is about to experience some level of undershoot; (2) an overshoot enhancement circuit, which adds current to the write current when one of the head terminals has a voltage lower than a predetermined threshold, indicating that the write current waveform is about to experience some level of overshoot; and (3) an overshoot reduction circuit, which provides a resistance between the head terminals in parallel with the write head to damp overshoot, when one of the head terminals has a voltage lower than a predetermined threshold, indicating that the write current waveform is about to experience some level of overshoot. The predetermined thresholds, the currents added to the write current, and the resistance provided are all programmable in one embodiment, so that the undershoot and overshoot of the write driver circuit may be precisely controlled for efficient operation.
摘要翻译：在写驱动器电路中提供下冲和过冲控制电路，以增强其效率和快速改变通过写头的写入电流方向的能力。下冲和过冲控制电路包括：（1）下冲还原电路，当一个头端子的电压高于相对的头端并且输入信号处于一定状态时，该电路将电流加到写入电流上，电流波形即将经历一定程度的下冲; （2）过冲增强电路，当一个头端子具有低于预定阈值的电压时，将电流加到写入电流，指示写入电流波形即将经历一定程度的过冲; 和（3）过冲减少电路，当头部端子中的一个具有低于预定阈值的电压时，其提供与写入头并联的头部端子之间的电阻以抑制过冲，指示写入电流波形为约经历一定程度的超调。预定阈值，添加到写入电流的电流和提供的电阻在一个实施例中都是可编程的，使得可以精确地控制写入驱动器电路的下冲和过冲以进行有效的操作。

2. 发明授权

US07236030B2 Method to implement hysteresis in a MOSFET differential pair input stage 有权
标题翻译：在MOSFET差分对输入级实现滞后的方法
公开(公告)号：US07236030B2
公开(公告)日：2007-06-26
申请号：US10881611
申请日：2004-06-30
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： H03K3/00
CPC分类号： H03K3/3565 , H03K5/2481
摘要： A simplified comparator circuit (10) having hysteresis and lower power requirements for its implementation. The circuit (10) includes 2 minimum-sized MOSFETs (MN4, MN5) providing feedback from the circuit output to an input device (MN1) body to produce hystereis, requiring very little power. This invention is suitable for applications not requiring a precisely set hysteresis magnitude.
摘要翻译：一种简化的比较器电路（10），具有滞后和较低的功率要求。电路（10）包括2个最小尺寸的MOSFET（MN 4，MN 5），其提供从电路输出到输入装置（MN 1）主体的反馈以产生滞后，需要很小的功率。本发明适用于不需要精确设定的滞后幅度的应用。

3. 发明授权

US4295063A Fast settling digital to analog converter bit switch 失效
标题翻译：快速建立数字到模拟转换器位开关
公开(公告)号：US4295063A
公开(公告)日：1981-10-13
申请号：US53131
申请日：1979-06-28
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： H03K17/60 , H03M1/00 , H03K5/153 , H03K17/02
CPC分类号： H03K17/603 , H03M1/74
摘要： A bit switch for use in a digital-to-analog converter comprises three differential pairs of transistors. The first pair receives a digital input signal and a reference voltage signal. The second pair switches the bit current to either an output bus or to ground depending upon the state of the input signal. A third differential pair of transistors is coupled between the first and second pairs for minimizing adverse effects of fast input transitions and parasitic capacitance.
摘要翻译：用于数模转换器的位开关包括三个差分晶体管对。第一对接收数字输入信号和参考电压信号。第二对根据输入信号的状态将位电流切换到输出总线或接地。第三差分对晶体管耦合在第一对和第二对之间，以最小化快速输入跃迁和寄生电容的不利影响。

4. 发明授权

US5872477A Multiplexer with CMOS break-before-make circuit 失效
标题翻译：多路复用器具有CMOS断开电路
公开(公告)号：US5872477A
公开(公告)日：1999-02-16
申请号：US874242
申请日：1997-06-13
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： H03K17/693 , H04J3/04 , H03K17/16 , H03K17/76
CPC分类号： H04J3/047 , H03K17/693
摘要： A multiplexer selectively connects one of first and second nodes to a third node. The multiplexer includes a first switch coupled between the first and third nodes, a second switch coupled between the second and third nodes, and a control input for receiving a signal to either open the first switch and close the second switch or open the second switch and close the first switch. Additionally, a delay circuit, coupled to the control input and the second switch, delays closure of the second switch until the first switch is open. In a preferred embodiment, the delay circuit includes two field-effect transistors having substantially different width-to-length ratios.
摘要翻译：复用器选择性地将第一和第二节点之一连接到第三节点。多路复用器包括耦合在第一和第三节点之间的第一开关，耦合在第二和第三节点之间的第二开关和用于接收信号以打开第一开关并闭合第二开关或打开第二开关的控制输入，以及关闭第一个开关。此外，耦合到控制输入和第二开关的延迟电路延迟第二开关的闭合，直到第一开关断开。在优选实施例中，延迟电路包括具有基本上不同宽度与长度比的两个场效应晶体管。

5. 发明授权

US5311146A Current mirror for low supply voltage operation 失效
标题翻译：用于低电源电压工作的电流镜
公开(公告)号：US5311146A
公开(公告)日：1994-05-10
申请号：US9287
申请日：1993-01-26
申请人： Craig M. Brannon , Tuan V. Ngo , John J. Price, Jr.
发明人： Craig M. Brannon , Tuan V. Ngo , John J. Price, Jr.
IPC分类号： H03F3/343 , H03F3/04
CPC分类号： H03F3/343
摘要： The present invention is an improved current mirror circuit. This improved current mirror circuit includes first and second transistors of the same conductivity type and have bases connected together. The first transistor is connected between a first supply terminal and an input terminal. The second transistor is connected between a first supply terminal and an output terminal. Included is a feedback circuit for providing a voltage feedback between the input terminal and the bases of the first and second transistors. Also included is a bias circuit for providing a bias current to the feedback circuit that is based on the input current.
摘要翻译：本发明是改进的电流镜电路。该改进的电流镜电路包括具有相同导电类型的第一和第二晶体管，并且具有连接在一起的基极。第一晶体管连接在第一电源端子和输入端子之间。第二晶体管连接在第一供电端子和输出端子之间。包括用于在输入端和第一和第二晶体管的基极之间提供电压反馈的反馈电路。还包括用于向基于输入电流的反馈电路提供偏置电流的偏置电路。

6. 发明授权

US4536663A Comparator circuit having full supply common mode input 失效
标题翻译：比较器电路具有全电源共模输入
公开(公告)号：US4536663A
公开(公告)日：1985-08-20
申请号：US510006
申请日：1983-07-01
申请人： Ira Miller , Robert C. Rumbaugh , John J. Price, Jr.
发明人： Ira Miller , Robert C. Rumbaugh , John J. Price, Jr.
IPC分类号： H03F3/45 , G01R19/00 , H03K5/08 , H03K5/24 , H03K3/02
CPC分类号： G01R19/0038 , H03K5/2418
摘要： The input voltage signals to a comparison circuit may vary between levels substantial equal to the first and second supply voltages (e.g. typically 5 volts and ground). A first transistor circuit is coupled to a current mirror circuit and to an output node for supplying a mirrorable current to the current mirror circuit which in turn reduces the voltage at the output node when the first input voltage approaches the upper supply voltage, and supplies a current to the output to increase the voltage thereat when the second input approaches the upper supply voltage. A second transistor circuit is also coupled to the current mirror and to the output for supplying a mirrorable current to the current mirror means so as to reduce the voltage at the output when the second input voltage approaches ground, and supplies current to the output to increase the voltage thereat when the first input voltage approaches ground. The output node has coupled thereto a level shifting transistor and first and second follower transistors.
摘要翻译：到比较电路的输入电压信号可以在基本等于第一和第二电源电压（例如通常为5伏和接地）之间的电平之间变化。第一晶体管电路耦合到电流镜电路和输出节点，用于向电流镜电路提供可反映的电流，这反过来在第一输入电压接近上电源电压时降低输出节点处的电压，并且提供当第二输入接近上电源电压时，电流到输出以增加其电压。第二晶体管电路还耦合到电流镜和输出端，用于向电流镜装置提供可镜像电流，以便当第二输入电压接近时减小输出端的电压，并将电流提供给输出以增加当第一个输入电压接近时的电压。输出节点与电平移动晶体管和第一和第二跟随器晶体管耦合。

7. 发明授权

US06721115B2 System and method for enhancing write driver performance 有权
标题翻译：提高写入驱动程序性能的系统和方法
公开(公告)号：US06721115B2
公开(公告)日：2004-04-13
申请号：US10118782
申请日：2002-04-09
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： G11B509
CPC分类号： G11B5/022 , G11B5/012 , G11B5/02 , G11B5/09 , G11B2005/0013
摘要： A technique for presenting an optimally timed control signal to an upper H-switch driver in a fashion capable of achieving a very fast transition of the current in the inductive recording head. The technique also provides a current boost during the transition while resulting in minimized power consumption at other times.
摘要翻译：一种用于以能够实现电感记录头中的电流非常快速转变的方式向上部H开关驱动器呈现最佳定时控制信号的技术。该技术还在转换期间提供电流提升，同时在其他时间最小化功耗。

8. 发明授权

US06184727B2 Write driver circuit having enhanced switching control circuitry 有权
标题翻译：写入具有增强型开关控制电路的驱动电路
公开(公告)号：US06184727B2
公开(公告)日：2001-02-06
申请号：US09292294
申请日：1999-04-15
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： H03B100
CPC分类号： G11B5/022 , G11B5/02 , G11B5/09 , G11B2005/0013 , H03K17/662
摘要： Turn-on and turn-off control circuitry are provided for a write driver circuit having first and second switching devices for directing current in opposite directions through a write head between first and second terminals in response to first and second input signals. The turn-off control circuitry includes first and second active devices coupled to the control elements of the respective first and second switching devices. The first and second active devices are operated to pull current from the control elements of the first and second switching devices in first and second current paths upon activation of appropriate input signals. First and second resistors are connected in the respective first and second current paths. The turn-on control circuitry includes a first resistor coupled between a control element of the first switching device and a fixed voltage and a second resistor coupled between a control clement of the second switching device and the fixed voltage. Active devices are coupled between the control elements of the first and second switching devices and the fixed voltage, the active devices each having a control element coupled to the control clement of the opposite switching device.
摘要翻译：为具有第一和第二开关装置的写入驱动器电路提供开启和关闭控制电路，用于响应于第一和第二输入信号，通过第一和第二端子之间的写入头沿相反方向引导电流。关断控制电路包括耦合到相应的第一和第二开关装置的控制元件的第一和第二有源装置。在激活适当的输入信号时，第一和第二有源器件被操作以在第一和第二电流通路中从第一和第二开关器件的控制元件拉电流。第一和第二电阻器连接在相应的第一和第二电流路径中。导通控制电路包括耦合在第一开关器件的控制元件和固定电压之间的第一电阻器和耦合在第二开关器件的控制元件与固定电压之间的第二电阻器。有源器件耦合在第一和第二开关器件的控制元件和固定电压之间，有源器件各自具有耦合到相对的开关器件的控制元件的控制元件。

9. 发明授权

US5894237A Write driver with buffer circuits between pull-up resistors and upper drive transistors 失效
标题翻译：用上拉电阻和上驱动晶体管之间的缓冲电路来写入驱动器
公开(公告)号：US5894237A
公开(公告)日：1999-04-13
申请号：US903458
申请日：1997-07-30
申请人： Craig M. Brannon , John J. Price, Jr. , Jeremy R. Kuehlwein
发明人： Craig M. Brannon , John J. Price, Jr. , Jeremy R. Kuehlwein
IPC分类号： H03K17/66 , H03K3/00
CPC分类号： G11B5/022 , H03K17/662
摘要： A write driver, having a pair of head pins for connection to a write head, includes two push-pull buffer circuits connected respectively between first and second pull-up resistors and the control nodes of first and second upper drive transistors. The buffer circuits selectively charge and discharge the inherent capacitances of the upper drive transistors, thereby accelerating their turn on and turn off without diminishing head swing. Moreover, connecting the buffer circuits between the pull-up resistors and the upper transistors effectively isolates, or buffers, the pull-up resistors from the self-inductance voltages of the write head, reducing glitching in the write-head output signal.
摘要翻译：具有用于连接到写入头的一对头引脚的写驱动器包括分别连接在第一和第二上拉电阻器与第一和第二上驱动晶体管的控制节点之间的两个推挽缓冲电路。缓冲电路选择性地充电和放电上驱动晶体管的固有电容，从而加速其导通和关断而不减小磁头摆动。此外，连接上拉电阻和上层晶体管之间的缓冲电路有效地将上拉电阻与写入头的自感电压隔离或缓冲，从而减少写入头输出信号的毛刺。

10. 发明授权

US06636082B1 System and method for detecting a negative supply fault 有权
标题翻译：用于检测负电源故障的系统和方法
公开(公告)号：US06636082B1
公开(公告)日：2003-10-21
申请号：US10123645
申请日：2002-04-16
申请人： John J. Price, Jr.
发明人： John J. Price, Jr.
IPC分类号： H03K5153
CPC分类号： G01R19/16538
摘要： A negative supply, low-voltage supply fault detection circuit is implemented without the need for a current mirror thereby providing for the elimination of inaccuracies generally associated with a current mirror, and resulting in less power consumption when compared with known negative supply, low-voltage detection circuits that employ a current mirror and associated support circuitry.
摘要翻译：实现负电源，低电压电源故障检测电路，而不需要电流镜，从而提供通常与电流镜相关联的不精确度的消除，并且与已知的负电源相比导致更少的功率消耗采用电流镜和相关支持电路的检测电路。

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