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1. 发明授权

US08300489B2 Charge pump system and method utilizing adjustable output charge and compilation system and method for use by the charge pump 有权
标题翻译：电荷泵系统和方法利用可调输出电荷和汇编系统及方法供电泵使用
公开(公告)号：US08300489B2
公开(公告)日：2012-10-30
申请号：US12686013
申请日：2010-01-12
申请人： John A. Fifield , Thomas M. Maffitt , Dale E. Pontius
发明人： John A. Fifield , Thomas M. Maffitt , Dale E. Pontius
IPC分类号： G11C7/00
CPC分类号： H02M3/07 , G11C5/145 , G11C29/021 , G11C29/028
摘要： Charge pump circuit includes a plurality of boost capacitors. An output charge of the charge pump circuit is adjusted by selecting a number of the boost capacitors at least one of using a digital control word and programming of a wiring level. A method of boosting supply voltage uses a charge pump circuit. The method includes adjusting an output charge of the charge pump circuit by selecting a number of boost capacitors at least one of using a digital control word and by programming of a wiring level.
摘要翻译：电荷泵电路包括多个升压电容器。通过选择多个升压电容器来调整电荷泵电路的输出电荷，至少使用数字控制字和布线电平的编程。提高电源电压的方法使用电荷泵电路。该方法包括通过选择多个升压电容器来调节电荷泵电路的输出电荷，所述升压电容器使用数字控制字和编程布线电平中的至少一个。

2. 发明授权

US06496037B1 Automatic off-chip driver adjustment based on load characteristics 有权
标题翻译：基于负载特性的自动片外驱动器调整
公开(公告)号：US06496037B1
公开(公告)日：2002-12-17
申请号：US09588202
申请日：2000-06-06
申请人： Claude L. Bertin , John A. Fifield , Thomas M. Maffitt , Wilbur D. Pricer , William R. Tonti
发明人： Claude L. Bertin , John A. Fifield , Thomas M. Maffitt , Wilbur D. Pricer , William R. Tonti
IPC分类号： H03K190175
CPC分类号： H03K19/0005
摘要： An automatic driver adjuster and methods using the same are provided that modify off-chip drivers based on load characteristics. The preferred embodiments are preferably automatic and require little or no human intervention. Preferred embodiments of the current invention analyze and determine the impedance of a node and adjust a number of output drivers in response to the impedance of the node, or analyze a resultant waveform of the node, caused by an input waveform, and adjust a number of output drivers in response to the resultant waveform of the node.
摘要翻译：提供了一种自动驱动器调节器及其使用方法，其基于负载特性修改片外驱动器。优选的实施方案优选是自动的，并且需要很少的或不需要人为干预。本发明的优选实施例分析和确定节点的阻抗并且响应于节点的阻抗调整输出驱动器的数量，或者分析由输入波形引起的节点的合成波形，并且调整多个输出驱动器响应于该结点的合成波形。

3. 发明授权

US08724365B2 Programmable semiconductor device 有权
标题翻译：可编程半导体器件
公开(公告)号：US08724365B2
公开(公告)日：2014-05-13
申请号：US13427162
申请日：2012-03-22
申请人： William R. Tonti , Wayne S. Berry , John A. Fifield , William H. Guthrie , Richard S. Kontra
发明人： William R. Tonti , Wayne S. Berry , John A. Fifield , William H. Guthrie , Richard S. Kontra
IPC分类号： G11C17/00
CPC分类号： G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
摘要翻译：可编程器件包括衬底（10）; 绝缘体（13）; 绝缘体上的细长半导体材料（12），具有第一和第二端的细长半导体材料和上表面S; 第一端部（12a）比第二端部（12b）大得多，金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

4. 发明申请

US20140003164A1 MEMORY ARRAY WITH ON AND OFF-STATE WORDLINE VOLTAGES HAVING DIFFERENT TEMPERATURE COEFFICIENTS 有权
标题翻译：具有开启和关闭状态的存储器阵列具有不同温度系数的字线电压
公开(公告)号：US20140003164A1
公开(公告)日：2014-01-02
申请号：US13534096
申请日：2012-06-27
申请人： John A. Fifield , Mark D. Jacunski
发明人： John A. Fifield , Mark D. Jacunski
IPC分类号： G11C5/14 , H02J1/10 , G11C8/08
CPC分类号： G11C8/08 , G11C7/04 , G11C11/4085 , Y10T307/555
摘要： Disclosed is a memory array structure, where a wordline driver selectively applies a high on-state voltage (VWLH) or a low off-state voltage (VWLL) to a wordline. VWLH has a slightly negative temperature coefficient so that it is regulated as high as the gate dielectric reliability limits allow, whereas VWLL has a substantially neutral temperature coefficient. To accomplish this, the wordline driver is coupled to one or more voltage regulation circuits. In one embodiment, the wordline driver is coupled to a single voltage regulation circuit, which incorporates a single voltage reference circuit having a single output stage that outputs multiple reference voltages. Also disclosed is a voltage reference circuit, which can be incorporated into the voltage regulation circuit of a memory array structure, as described, or, alternatively, into any other integrated circuit structure requiring voltages with different temperature coefficients. Also disclosed is a method of operating a memory array structure.
摘要翻译：公开了一种存储器阵列结构，其中字线驱动器选择性地将高导通状态电压（VWLH）或低关态电压（VWLL）施加到字线。 VWLH具有轻微的负温度系数，使得其受到栅极介电可靠性限制允许的高度调节，而VWLL具有基本上中性的温度系数。为了实现这一点，字线驱动器耦合到一个或多个电压调节电路。在一个实施例中，字线驱动器耦合到单个电压调节电路，其包括具有输出多个参考电压的单个输出级的单个电压参考电路。还公开了一种电压参考电路，其可以结合到如所描述的存储器阵列结构的电压调节电路中，或者可以并入任何其它需要具有不同温度系数的电压的集成电路结构。还公开了一种操作存储器阵列结构的方法。

5. 发明授权

US08027207B2 Leakage compensated reference voltage generation system 有权
标题翻译：泄漏补偿参考电压发生系统
公开(公告)号：US08027207B2
公开(公告)日：2011-09-27
申请号：US12639454
申请日：2009-12-16
申请人： John A. Fifield , Harold Pilo
发明人： John A. Fifield , Harold Pilo
IPC分类号： G11C5/14
CPC分类号： G11C17/16 , G11C5/147 , G11C7/062 , G11C7/12 , G11C17/18 , G11C29/02 , G11C29/021 , G11C29/028
摘要： An e-fuse sense circuit employs a single ended sense scheme in which the reference voltage is compensated for leakage. A reference voltage generator includes a pull-up resistor of similar value to the selected bitline pull-up resistor. As the sensing trip point is adjusted by selection of a bitline pull-up resistor, a pair of pull-up and pull-down resistors are adjusted together to adjust the impedance of the reference voltage generator. A leakage-path simulation structure including a parallel connection of bitcells is added to the reference voltage generator. The leakage-path simulation structure imitates the bitcells on a bitline in the array of e-fuses. Leakage current on the bitline offsets the bitline voltage by a certain error voltage. The reference voltage is also offset by a fraction of the error voltage to balance the shifts in the ‘1’ and ‘0’ margin levels in the presence of leakage.
摘要翻译：电熔丝感测电路采用单端感测方案，其中参考电压被补偿以进行泄漏。参考电压发生器包括与所选位线上拉电阻相似的上拉电阻。由于通过选择位线上拉电阻来调整感测跳变点，一对上拉电阻和下拉电阻一起调节，以调整参考电压发生器的阻抗。包括比特单元的并联连接的泄漏路径模拟结构被添加到参考电压发生器。泄漏路径模拟结构模仿电子熔丝阵列中的位线上的位单元。位线上的漏电流将位线电压抵消一定的误差电压。在存在泄漏的情况下，参考电压也被误差电压的一部分偏移以平衡'1'和'0'余量水平的偏移。

6. 发明授权

US07917806B2 System and method for indicating status of an on-chip power supply system 有权
标题翻译：用于指示片上电源系统状态的系统和方法
公开(公告)号：US07917806B2
公开(公告)日：2011-03-29
申请号：US11958680
申请日：2007-12-18
申请人： Darren L. Anand , John A. Fifield , Kevin W. Gorman
发明人： Darren L. Anand , John A. Fifield , Kevin W. Gorman
IPC分类号： G06F11/00
CPC分类号： G01R19/16552 , G11C11/401 , G11C29/02 , G11C29/021 , G11C29/44 , G11C2029/0401 , G11C2029/4402
摘要： The status of multiple on-chip power supply systems is indicated for use in modifying chip test flow and diagnosing chip failure. Digital compliance signals are received, each compliance signal associated with one of multiple on-chip power supplies. Each power supply has an associated compliance level, and each compliance signal indicates whether its associated power supply is operating at the associated compliance level. The compliance signals are converted into a power supply status signal indicating status of the compliance signals associated with the power supply. The power supply status signal is output. If a power supply is operating at its associated compliance level, the output power supply status signal indicates that the power supply is passing. If the power supply is not operating at its associated compliance level, the output power supply status signal indicates that the power supply is failing. If a power supply is failing, a memory test may be aborted, simplifying chip failure diagnosis.
摘要翻译：多片式电源系统的状态被指示用于修改芯片测试流程和诊断芯片故障。接收数字符合性信号，每个合规信号与多个片上电源之一相关联。每个电源具有相关的合规级别，并且每个合规信号指示其相关联的电源是否以相关联的合规级别运行。合规信号被转换成指示与电源相关联的符合性信号的状态的电源状态信号。输出电源状态信号。如果电源工作在相关的合规级别，则输出电源状态信号表示电源正在通过。如果电源不在其相关的合规级别运行，则输出电源状态信号表示电源出现故障。如果电源出现故障，可能会中断内存测试，从而简化了芯片故障诊断。

7. 发明授权

US07687883B2 Electronically programmable antifuse and circuits made therewith 有权
标题翻译：电子可编程反熔丝和由其制成的电路
公开(公告)号：US07687883B2
公开(公告)日：2010-03-30
申请号：US11627723
申请日：2007-01-26
申请人： John A. Fifield , Wagdi W. Abadeer , William R. Tonti
发明人： John A. Fifield , Wagdi W. Abadeer , William R. Tonti
IPC分类号： H01L29/00
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is in its programmed state, the bias element remains non-conductive, but the antifuse element is conductive. The difference in the resistance of the antifuse element between its unprogrammed state and programmed state causes the difference in voltages seen at the output node to be on the order of hundreds of mili-volts when a voltage of 1 V is applied across the antifuse device. This voltage difference is so high that it can be readily sensed using a simple sensing circuit (228).
摘要翻译：一种反熔丝装置（120），其包括彼此串联布置的偏置元件（124）和可编程反熔丝元件（128），以形成具有位于偏置和反熔丝元件之间的输出节点（F）的分压器。当反熔丝装置处于其未编程状态时，偏置元件和反熔丝元件中的每一个都是不导电的。当反熔丝装置处于其编程状态时，偏置元件保持不导电，但是反熔丝元件是导电的。反熔丝元件在其未编程状态和编程状态之间的电阻差异导致当在反熔断器件上施加1V的电压时，在输出节点处看到的电压差为几百微升。该电压差非常高以至于可以使用简单的感测电路（228）容易地感测。

8. 发明申请

US20100001788A1 SYSTEM TO EVALUATE CHARGE PUMP OUTPUTS AND ASSOCIATED METHODS 审中-公开
标题翻译：评估充电泵输出和相关方法的系统
公开(公告)号：US20100001788A1
公开(公告)日：2010-01-07
申请号：US12168136
申请日：2008-07-06
申请人： John E. Barth, JR. , John A. Fifield , Fadi H. Gebara , Jente B. Kuang , Michael Sperling
发明人： John E. Barth, JR. , John A. Fifield , Fadi H. Gebara , Jente B. Kuang , Michael Sperling
IPC分类号： G05F3/02 , G05F1/10
CPC分类号： H02M3/07
摘要： A system to evaluate charge pump output may include a comparator to compare a charge pump output voltage to a reference voltage to generate a comparison result. The system may also include a divider to divide down a clock signal. The system may further include a logical conjunction unit to operate on the comparison result and the divided down clock signal.
摘要翻译：用于评估电荷泵输出的系统可以包括比较器，用于将电荷泵输出电压与参考电压进行比较以产生比较结果。该系统还可以包括用于分频时钟信号的分频器。该系统还可以包括对比较结果和划分的下降时钟信号进行操作的逻辑连接单元。

9. 发明授权

US07573300B2 Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same 有权
标题翻译：集成电路中动态逻辑门控电路的电流控制机制及其调节方法
公开(公告)号：US07573300B2
公开(公告)日：2009-08-11
申请号：US11623112
申请日：2007-01-15
申请人： Wagdi W. Abadeer , George M. Braceras , Albert M. Chu , John A. Fifield , Harold Pilo , Daryl M. Seitzer
发明人： Wagdi W. Abadeer , George M. Braceras , Albert M. Chu , John A. Fifield , Harold Pilo , Daryl M. Seitzer
IPC分类号： H03K19/096
CPC分类号： H03K19/0963
摘要： An integrated circuit that includes a gate control voltage generator that supplies a current control gate voltage to a plurality of current control devices of a corresponding plurality of dynamic logic circuits each having a keeper circuit. The gate control voltage generator provides, via current control gate voltage, global control of the amount of keeper current flowing through the keeper circuits so as to enhance the performance of the dynamic logic circuits.
摘要翻译：一种集成电路，其包括栅极控制电压发生器，其将电流控制栅极电压提供给各自具有保持电路的相应多个动态逻辑电路的多个电流控制装置。栅极控制电压发生器通过电流控制栅极电压提供流过保持器电路的保持器电流量的全局控制，以便增强动态逻辑电路的性能。

10. 发明申请

US20090179670A1 PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR THE SAME 审中-公开
标题翻译：性能反相检测电路及其设计结构
公开(公告)号：US20090179670A1
公开(公告)日：2009-07-16
申请号：US12014430
申请日：2008-01-15
申请人： Albert M. Chu , John A. Fifield , Daryl M. Seitzer , Hongfei Wu
发明人： Albert M. Chu , John A. Fifield , Daryl M. Seitzer , Hongfei Wu
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F2200/447 , H03F2203/45586 , H03F2203/45618 , H03F2203/45622
摘要： A circuit containing a parallel connection of a first sub-circuit and a second sub-circuit is provided. The first sub-circuit comprises a serial connection of a first field effect transistor having a first threshold voltage and a first voltage dividing device. The second sub-circuit comprises a serial connection of a second field effect transistor having a second threshold voltage, which is different from the first threshold voltage, and a second voltage dividing device. The voltage between the first field effect transistor and the first voltage dividing device is compared with the voltage between the second field effect transistor and the second voltage dividing device so that a signal may be generated at a temperature at which the ratio of a performance parameter such as on-current between the first and second field effect transistors crosses over a predefined value. The signal may be advantageously employed to actively control circuit characteristics.
摘要翻译：提供了包含第一子电路和第二子电路的并联连接的电路。第一子电路包括具有第一阈值电压的第一场效应晶体管和第一分压装置的串联连接。第二子电路包括具有与第一阈值电压不同的第二阈值电压的第二场效应晶体管的串联连接和第二分压装置。将第一场效应晶体管和第一分压装置之间的电压与第二场效应晶体管和第二分压装置之间的电压进行比较，使得可以在这样的温度下产生信号，因为第一和第二场效应晶体管之间的导通电流跨越预定值。可以有利地使用该信号来主动地控制电路特性。

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