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1. 发明申请

US20080121916A1 METHOD OF FORMING A METAL CONTACT AND PASSIVATION OF A SEMICONDUCTOR FEATURE 有权
标题翻译：形成金属接触的方法和半导体特性的钝化
公开(公告)号：US20080121916A1
公开(公告)日：2008-05-29
申请号：US11939227
申请日：2007-11-13
申请人： Jinghua TENG , Ee Leong Lim , Soo Jin Chua
发明人： Jinghua TENG , Ee Leong Lim , Soo Jin Chua
IPC分类号： H01S5/22 , H01L21/4763 , H01L33/00
CPC分类号： H01L33/38 , H01L33/08 , H01L33/385 , H01S5/0282 , H01S5/22
摘要： A method of forming a metal contact and passivation of a semiconductor feature, and devices made using the method. The method comprises the steps of forming a dielectric mask on a semiconductor substrate utilising photolithography processes; etching the semiconductor substrate such that one or more features are formed underneath respective portions of the dielectric mask; depositing a passivation layer on the substrate with the dielectric mask in place above the features; subjecting the substrate to an etchant such that the dielectric mask is etched at a higher rate than the passivation layer, whereby portions of the passivation layer deposited on the dielectric mask are lifted off from the substrate; and depositing a metal layer on the substrate including over the remaining passivation layer and exposed portions of the features.
摘要翻译：一种形成半导体特征的金属接触和钝化的方法，以及使用该方法制造的器件。该方法包括以下步骤：利用光刻工艺在半导体衬底上形成介电掩模; 蚀刻半导体衬底，使得一个或多个特征形成在介电掩模的各个部分下方; 在衬底上沉积钝化层，其中介电掩模位于特征上方; 使衬底经受蚀刻剂，使得以比钝化层更高的速率蚀刻介电掩模，由此沉积在介电掩模上的钝化层的一部分从衬底上提出; 以及在所述衬底上沉积金属层，所述金属层包括在剩余的钝化层上并且所述特征的暴露部分。

2. 发明授权

US07598104B2 Method of forming a metal contact and passivation of a semiconductor feature 有权
标题翻译：形成金属接触的方法和半导体特征的钝化
公开(公告)号：US07598104B2
公开(公告)日：2009-10-06
申请号：US11939227
申请日：2007-11-13
申请人： Jinghua Teng , Ee Leong Lim , Soo Jin Chua
发明人： Jinghua Teng , Ee Leong Lim , Soo Jin Chua
IPC分类号： H01L21/00
CPC分类号： H01L33/38 , H01L33/08 , H01L33/385 , H01S5/0282 , H01S5/22
摘要： A method of forming a metal contact and passivation of a semiconductor feature, and devices made using the method. The method comprises the steps of forming a dielectric mask on a semiconductor substrate utilising photolithography processes; etching the semiconductor substrate such that one or more features are formed underneath respective portions of the dielectric mask; depositing a passivation layer on the substrate with the dielectric mask in place above the features; subjecting the substrate to an etchant such that the dielectric mask is etched at a higher rate than the passivation layer, whereby portions of the passivation layer deposited on the dielectric mask are lifted off from the substrate; and depositing a metal layer on the substrate including over the remaining passivation layer and exposed portions of the features.
摘要翻译：一种形成半导体特征的金属接触和钝化的方法，以及使用该方法制造的器件。该方法包括以下步骤：利用光刻工艺在半导体衬底上形成介电掩模; 蚀刻半导体衬底，使得一个或多个特征形成在介电掩模的各个部分下方; 在衬底上沉积钝化层，其中介电掩模位于特征上方; 使衬底经受蚀刻剂，使得以比钝化层更高的速率蚀刻介电掩模，由此沉积在介电掩模上的钝化层的一部分从衬底上提出; 以及在所述衬底上沉积金属层，所述金属层包括在剩余的钝化层上并且所述特征的暴露部分。

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