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1. 发明授权

US06199086B1 Circuit and method for decompressing compressed elliptic curve points 失效
标题翻译：用于解压缩压缩椭圆曲线点的电路和方法
公开(公告)号：US06199086B1
公开(公告)日：2001-03-06
申请号：US08997959
申请日：1997-12-24
申请人： James Douglas Dworkin , Michael John Torla , P. Michael Glaser , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
发明人： James Douglas Dworkin , Michael John Torla , P. Michael Glaser , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
IPC分类号： G06F772
CPC分类号： G06F7/725
摘要： An elliptic curve (EC) processor circuit (120) comprising a finite field arithmetic logic unit (122), operation registers (124) an EC control unit (123) and a register file (127). A storage element (250) is coupled to the finite field arithmetic logic unit (122). The EC control unit (123) controls the various components of the EC processor circuit (120) to decompress a compressed one-bit representation of a Y coordinate of an elliptic curve point (X, Y). The EC control unit (123) controls the use of the operation register (124), the storage element (250) and the finite field arithmetic logic unit (122) to recursively compute the decompressed version of the compressed Y coordinate based upon the X coordinate and the compressed one-bit representation of the Y coordinate. The circuit and method employ minimal additional hardware and processing in an EC processor circuit (120).
摘要翻译：椭圆曲线（EC）处理器电路（120）包括有限域算术逻辑单元（122），操作寄存器（124），EC控制单元（123）和寄存器文件（127）。存储元件（250）耦合到有限域算术逻辑单元（122）。 EC控制单元（123）控制EC处理器电路（120）的各个组件来解压缩椭圆曲线点（X，Y）的Y坐标的压缩的一位表示。 EC控制单元（123）控制操作寄存器（124），存储元件（250）和有限域算术逻辑单元（122）的使用，以基于X坐标递归地计算压缩的Y坐标的解压缩版本和Y坐标的压缩一位表示。电路和方法在EC处理器电路（120）中采用最小的附加硬件和处理。

2. 发明授权

US06230179B1 Finite field multiplier with intrinsic modular reduction 失效
标题翻译：具有内在模块化减少的有限域倍增器
公开(公告)号：US06230179B1
公开(公告)日：2001-05-08
申请号：US08997960
申请日：1997-12-24
申请人： James Douglas Dworkin , Michael John Torla , P. Michael Glaser , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
发明人： James Douglas Dworkin , Michael John Torla , P. Michael Glaser , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
IPC分类号： G06F700
CPC分类号： G06F9/30014 , G06F7/72 , G06F7/722 , G06F7/724 , G06F7/725 , G06F9/30036 , G06F2207/382
摘要： A finite field multiplier with intrinsic modular reduction includes an interface unit (1208) that translates an n bit wide data path to a m bit wide data path where n is less than m. Also included is a finite field data unit (1204) with m bit wide registers that is coupled to a finte field control unit (1202). The finite field control unit (1202) includes a microsequencer (1402) and a finite state machine multiplier (1404). The microsequencer (1402) controls the finite state machine multiplier (1404) which performs a finite field multiply operation with intrinsic modular reduction and presents a finite field multiplication product to the finite field data unit (1204).
摘要翻译：具有本征模块化减少的有限域乘法器包括将n位宽数据路径转换为n小于m的m位宽数据路径的接口单元（1208）。还包括具有m位宽寄存器的有限域数据单元（1204），其耦合到finte域控制单元（1202）。有限场控制单元（1202）包括微定序器（1402）和有限状态机乘法器（1404）。微定序器（1402）控制有限状态机乘法器（1404），其执行具有本征模块化减少的有限域乘法运算，并向有限场数据单元（1204）呈现有限域乘法乘积。

3. 发明授权

US6009450A Finite field inverse circuit 失效
标题翻译：有限域反向电路
公开(公告)号：US6009450A
公开(公告)日：1999-12-28
申请号：US997943
申请日：1997-12-24
申请人： James Douglas Dworkin , P. Michael Glaser , Michael John Torla , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
发明人： James Douglas Dworkin , P. Michael Glaser , Michael John Torla , Ashok Vadekar , Robert John Lambert , Scott Alexander Vanstone
IPC分类号： G06F7/72 , G06F7/00
CPC分类号： G06F7/726
摘要： A finite field inverse circuit has a finite field data unit (1112) and an inverse control unit (1110). The inverse control unit includes (1110) a k.sub.l and k.sub.u decrementer pair (1108, 1122), a k.sub.l -k.sub.u difference unit (1106), an inverse control finite state machine (1102), and a one-bit memory (1104) coupled to the inverse control finite state machine (1102). The finite field data unit (1112) includes four m bit wide registers that are shift registers designated as B (1120), A (1118), M (1114), and C (1116), where B- is a first register, A- is a second register, M- is a irreducible polynomial register, and C- is a field element register. An the irreducible polynomial is loaded left justified in the M-register, a field element to be inverted is loaded left justified in the C-register, and a single "1" is loaded in an LSB bit of the B-register. The field element is then inverted in 2n+2 system clock cycles where n is a field size associated with the field element.
摘要翻译：有限域逆电路具有有限场数据单元（1112）和逆控制单元（1110）。逆控制单元包括（1110）kl和ku减量器对（1108,1122），kl-ku差分单元（1106），逆控制有限状态机（1102）和耦合到一个比特存储器（1104）的一位存储器到反向有限状态机（1102）。有限域数据单元（1112）包括四个m位宽的寄存器，它们是指定为B（1120），A（1118），M（1114）和C（1116）的移位寄存器，其中B-是第一寄存器，A - 是第二寄存器，M-是不可约多项式寄存器，C是场元素寄存器。在M寄存器中左对齐加载不可约多项式，在C寄存器中左对齐加载要反相的场元素，并在B寄存器的LSB位中加载单个“1”。然后，在2n + 2个系统时钟周期中，场元素被反转，其中n是与场元素相关联的场大小。

4. 发明授权

US06266717B1 System for controlling data exchange between a host device and a processor 失效
标题翻译：用于控制主机设备和处理器之间的数据交换的系统
公开(公告)号：US06266717B1
公开(公告)日：2001-07-24
申请号：US08997964
申请日：1997-12-24
申请人： James Douglas Dworkin , Michael John Torla , Ashok Vadekar
发明人： James Douglas Dworkin , Michael John Torla , Ashok Vadekar
IPC分类号： G06F1314
CPC分类号： G06F9/30014 , G06F7/72 , G06F7/722 , G06F7/724 , G06F7/725 , G06F9/30036 , G06F2207/382
摘要： A system for efficiently controlling the exchange of data between a host bus (190) and an input/output (I/O) register (125) of an elliptic curve (EC) processor (120) having a much wider datapath than that of the host device (100) . A spreading/despreading pattern is determined which spans multiple bit positions of the input/output register (125). In one embodiment, a full combinational circuit (300) is provided to connect a bit position of the host bus (190) to a bit position of the input/output register (125). In another embodiment, a combinational circuit (300) and an intermediate register (410) are provided. In still another embodiment, a spreading-by shifting system (500) is provided which comprises a plurality of subfield modules (520) into which data from the host bus (190) is shifted. The spreading/despreading pattern is achieved through multiplexers (540) connected between the subfield modules (520). In yet another embodiment, a cross bar switch (600) is provided to connect any bit position of the host bus (190) to any bit position of the I/O register 125. In each embodiment, an EC control unit (123) is provided which stores information for the spreading/despreading pattern.
摘要翻译：一种用于有效控制主机总线（190）与椭圆曲线（EC）处理器（120）的输入/输出（I / O）寄存器（125）之间的数据交换的系统，其具有比主机设备（100）。确定跨越输入/输出寄存器（125）的多个位位置的扩展/解扩展模式。在一个实施例中，提供全组合电路（300）以将主机总线（190）的位位置连接到输入/输出寄存器（125）的位位置。在另一个实施例中，提供组合电路（300）和中间寄存器（410）。在另一个实施例中，提供了扩展移位系统（500），其包括多个子场模块（520），来自主机总线（190）的数据被移动到该子场模块中。扩展/解扩模式通过连接在子场模块（520）之间的多路复用器（540）来实现。在另一个实施例中，提供了一种横杆开关（600），用于将主机总线（190）的任何位位置连接到I / O寄存器125的任何位位置。在每个实施例中，EC控制单元（123）提供哪个存储用于扩展/解扩图案的信息。

5. 发明授权

US08462944B2 Method of public key generation 有权
标题翻译：公钥生成方法
公开(公告)号：US08462944B2
公开(公告)日：2013-06-11
申请号：US13181184
申请日：2011-07-12
申请人： Scott Alexander Vanstone , Ashok Vadekar , Robert John Lambert , Robert Philip Gallant , Daniel Richard L. Brown , Alfred John Menezes
发明人： Scott Alexander Vanstone , Ashok Vadekar , Robert John Lambert , Robert Philip Gallant , Daniel Richard L. Brown , Alfred John Menezes
IPC分类号： H04L9/30
CPC分类号： H04L9/0869 , H04L2209/26 , H04L2209/46
摘要： A potential bias in the generation of a private key is avoided by selecting the key and comparing it against the system parameters. If a predetermined condition is attained it is accepted. If not it is rejected and a new key is generated.
摘要翻译：通过选择密钥并将其与系统参数进行比较来避免私钥生成中的潜在偏差。如果达到预定条件，则被接受。如果不是，则被拒绝并生成新的密钥。

6. 发明授权

US08000470B2 Method of public key generation 有权
标题翻译：公钥生成方法
公开(公告)号：US08000470B2
公开(公告)日：2011-08-16
申请号：US12119248
申请日：2008-05-12
申请人： Scott Alexander Vanstone , Ashok Vadekar , Robert John Lambert , Robert Philip Gallant , Daniel Richard L. Brown , Alfred John Menezes
发明人： Scott Alexander Vanstone , Ashok Vadekar , Robert John Lambert , Robert Philip Gallant , Daniel Richard L. Brown , Alfred John Menezes
IPC分类号： H04L9/30 , G06F7/58
CPC分类号： H04L9/0869 , H04L2209/26 , H04L2209/46
摘要： A potential bias in the generation of a private key is avoided by selecting the key and comparing it against the system parameters. If a predetermined condition is attained it is accepted. If not it is rejected and a new key is generated.
摘要翻译：通过选择密钥并将其与系统参数进行比较来避免私钥生成中的潜在偏差。如果达到预定条件，则被接受。如果不是，则被拒绝并生成新的密钥。

7. 发明授权

US06487660B1 Two way authentication protocol 有权
标题翻译：双向认证协议
公开(公告)号：US06487660B1
公开(公告)日：2002-11-26
申请号：US09432166
申请日：1999-11-02
申请人： Scott Alexander Vanstone , Donald B. Johnson , Robert J. Lambert , Ashok Vadekar
发明人： Scott Alexander Vanstone , Donald B. Johnson , Robert J. Lambert , Ashok Vadekar
IPC分类号： G06F124
CPC分类号： G07F7/1008 , G06Q20/341 , G06Q20/40975 , H04L9/0841 , H04L9/3066 , H04L9/3273
摘要： A method of authenticating a pair of correspondents C,S to permit the exchange of information therebetween, each of the correspondents having a respective private key, e, d and a public key, Qu, and Qs derived from a generator element of a group and a respective ones of the private keys e,d, the method comprising the steps of: a first of the correspondents C generating a session value x; the first correspondent generating a private value t, a public value derived from the private value t and the generator and a shared secret value derived from the private value t and the public key Qs of the second correspondent; the second correspondent generating a challenge value y and transmitting the challenge value y to the first correspondent; the first correspondent in response thereto computing a value h by applying a function H to the challenge value y, the session value x, the public value an of the first correspondent; the first correspondent signing the value h utilizing the private key e; the first correspondent transmitting to the second correspondent the signature including the session value x, and the private value t; and the second correspondent verifying the signature utilizing the public key Qu of the first correspondent and whereby verification of the signature authenticates the first correspondent to the second correspondent.
摘要翻译：一种认证一对记者C，S以允许它们之间的信息交换的方法，每个通信对象具有从组的发生器元素导出的相应私钥，e，d和公钥Qu和Q，以及相应的私钥e，d，该方法包括以下步骤：生成会话值x的通信对象C中的第一个; 生成私有值t的第一通信对象，从私有值t和生成器导出的公有值和从私有值t和第二通信对方的公钥Qs导出的共享秘密值; 第二记者产生质询值y并将询问值y发送给第一通讯员; 响应于第一记者通过将函数H应用于质询值y，会话值x，第一记者的公开值a来计算值h; 第一个记者利用私钥e签名值h; 第一记者向第二记者发送包括会话值x和私有值t的签名; 以及第二记者利用第一记者的公钥Qu验证签名，由此签名的验证对第二通信对象的第一对应者进行认证。

8. 发明授权

US09485223B2 System and method for controlling features on a device 有权
公开(公告)号：US09485223B2
公开(公告)日：2016-11-01
申请号：US12314610
申请日：2008-12-12
申请人： Michael Daskalopoulos , Ashok Vadekar , David Wong , William Lattin , Daniel O'Loughlin , David R. Sequino
发明人： Michael Daskalopoulos , Ashok Vadekar , David Wong , William Lattin , Daniel O'Loughlin , David R. Sequino
IPC分类号： G06F21/10 , H04L29/06 , G06F21/57 , H04L29/08
CPC分类号： H04L63/0428 , G06F21/10 , G06F21/57 , G06F2221/0742 , G06F2221/2135 , H04L63/061 , H04L67/125
摘要： Trust between entities participating in an upgrade or enablement/disablement process is established and, to facilitate this remotely and securely, a highly tamper resistant point of trust in the system that is being produced is used. This point of trust enables a more efficient distribution system to be used. Through either a provisioning process or at later stages, i.e. subsequent to installation, manufacture, assembly, sale, etc.; the point of trust embodied as a feature controller on the device or system being modified is given a feature set (or updated feature set) that, when validated, is used to enable or disable entire features or to activate portions of the feature.

9. 发明授权

US08566791B2 Retrofitting authentication onto firmware 有权
标题翻译：将验证改装到固件上
公开(公告)号：US08566791B2
公开(公告)日：2013-10-22
申请号：US11418462
申请日：2006-05-05
申请人： Ashok Vadekar , Brian Neill
发明人： Ashok Vadekar , Brian Neill
IPC分类号： G06F9/44
CPC分类号： G06F21/57 , G06F21/572 , G06F21/79 , G06F2221/2129
摘要： The present invention provides an inexpensive, software-based security-retrofit solution to verify the integrity of program code in embedded systems, or accessories, without resorting to expensive hardware changes. All unused memory on an accessory that could be used to store a program code image is filled with random data. A host system also locally stores a copy of the accessory's program image containing the random data. The host system sends the accessory a list of memory addresses or memory ranges on the accessory, which is always different and random in nature. The accessory will then produce a digest using values stored in the memory addresses as inputs to a secure hash function. The host system verifies the integrity of the embedded program code by verifying the resulting digest produced by and returned from the accessory.
摘要翻译：本发明提供了一种廉价的基于软件的安全改进解决方案，用于在不诉诸昂贵的硬件改变的情况下验证嵌入式系统或附件中的程序代码的完整性。可用于存储程序代码图像的附件上的所有未使用的内存都填充有随机数据。主机系统还在本地存储包含随机数据的附件的节目图像的副本。主机系统向附件发送附件上的存储器地址或存储器范围列表，该列表本质上是随机的。然后，附件将使用存储在存储器地址中的值作为安全散列函数的输入来生成摘要。主机系统通过验证由附件生成和返回的结果摘要来验证嵌入式程序代码的完整性。

10. 再颁专利

USRE43792E1 Method and apparatus for computing a shared secret key 有权
标题翻译：用于计算共享密钥的方法和装置
公开(公告)号：USRE43792E1
公开(公告)日：2012-11-06
申请号：US13075988
申请日：2011-03-30
申请人： Robert Lambert , Ashok Vadekar
发明人： Robert Lambert , Ashok Vadekar
IPC分类号： H04L9/00 , H04L9/28 , H04L9/30
CPC分类号： H04L9/0844
摘要： A method of generating a key by a first correspondent. The key is computable by a second correspondent. The method comprises the steps of: a) making available to the second correspondent a first short term public key; b) obtaining a second short term public key from the second correspondent; c) computing a first exponent derived from the first short term private key, the first short term public key, and the first long term private key; d) computing a second exponent derived from the first short term private key, the first long short term public key, the second short term public key and the first long term private key; e) computing a simultaneous exponentiation of the first exponent with the second short term public key and the second exponent with the second long term public key.
摘要翻译：一种由第一通讯员产生密钥的方法。密钥可由第二个记者计算。该方法包括以下步骤：a）向第二记者提供第一短期公钥; b）从第二个记者处获得第二个短期公钥; c）计算从第一短期私钥，第一短期公钥和第一长期私钥导出的第一指数; d）计算从第一短期私钥，第一长短期公钥，第二短期公钥和第一长期私钥导出的第二指数; e）使用所述第二短期公钥和所述第二指数与所述第二长期公共密钥计算所述第一指数的同时取幂。

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