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1. 发明授权

US07354820B2 Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating 有权
标题翻译：具有介质辅助平面化触点的异质结双极晶体管及其制造方法
公开(公告)号：US07354820B2
公开(公告)日：2008-04-08
申请号：US11227858
申请日：2005-09-14
申请人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
发明人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L21/8249
CPC分类号： H01L29/66318 , H01L29/7371 , Y10S438/978
摘要： A method for fabricating an HBT is disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer. The epitaxial layers are etched to provide locations for contact metals and emitter, base and contact metals are deposited on the emitter, base and sub-collector epitaxial layers, respectively. A self-alignment material is deposited on the surface of the substrate around the epitaxial layers and a planarization material is deposited on and covers the top surface of the HBT. The planarization material is then etched so it has a planar surface about the same level as the surface of the self-alignment material and the contact metals protrude from the planar surface. The planar metals are then deposited over the protruding portions of the contact metals.
摘要翻译：公开了一种用于制造HBT的方法，其中连续的发射极，基极，集电极和次集电极外延层沉积在衬底上，衬底与子集电极层相邻。外延层被蚀刻以提供用于接触金属和发射极的位置，基极和接触金属分别沉积在发射极，基极和次集电极外延层上。自对准材料沉积在外延层周围的衬底表面上，平坦化材料沉积在HBT的顶表面上并覆盖其上表面。然后对平坦化材料进行蚀刻，使其具有与自对准材料的表面大致相同的平面，并且接触金属从平坦表面突出。然后将平面金属沉积在接触金属的突出部分上。

2. 发明授权

US06797995B2 Heterojunction bipolar transistor with InGaAs contact and etch stop layer for InP sub-collector 有权
标题翻译：具有InGaAs接触的异质结双极晶体管和InP子集电极的蚀刻停止层
公开(公告)号：US06797995B2
公开(公告)日：2004-09-28
申请号：US10075428
申请日：2002-02-14
申请人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
发明人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L310328
CPC分类号： H01L29/66318 , H01L29/0821 , H01L29/7371
摘要： A thin InGaAs contact layer is provided for the collector of a heterojunction bipolar transistor (HBT) above an InP sub-collector. The contact layer provides a low resistance contact mechanism and a high thermal conductivity path for removing device heat though the sub-collector, and also serves as an etch stop to protect the sub-collector during device fabrication. A portion of the sub-collector lateral to the remainder of the HBT is rendered electrically insulative, preferably by an ion implant, to provide electrical isolation for the device and improve its planarity by avoiding etching through the sub-collector.
摘要翻译：为InP子集电极之上的异质结双极晶体管（HBT）的集电极提供了一个薄的InGaAs接触层。接触层提供低电阻接触机构和高导热性路径，用于通过子集电器去除器件热，并且还用作在器件制造期间保护子集电极的蚀刻停止。在HBT的其余部分横向的子集电极的一部分被优选地通过离子注入电绝缘，以提供器件的电隔离，并通过避免通过子集电极的蚀刻来改善其平面度。

3. 发明授权

US06949776B2 Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating 有权
标题翻译：具有介质辅助平面化触点的异质结双极晶体管及其制造方法
公开(公告)号：US06949776B2
公开(公告)日：2005-09-27
申请号：US10256042
申请日：2002-09-26
申请人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
发明人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L21/331 , H01L29/737 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/66318 , H01L29/7371 , Y10S438/978
摘要： A heterojunction bipolar transistor (HBT) is disclosed that includes successive emitter, base and collector and sub-collector epitaxial layers and emitter, base and collector contact metals contacting the emitter, base and sub-collector layers respectively. A passivation material is included that covers the uncovered portions of the layers and covers substantially all of the contact metals. The passivation material has a planar surface and a portion of each of the contact metals protrudes from the surface. Planar metals are included on the planar surface, each being isolated from the others and in electrical contact with a respective contact metal. A method for fabricating an HBT is also disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer. The epitaxial layers are etched to provide locations for contact metals and emitter, base and contact metals are deposited on the emitter, base and sub-collector epitaxial layers, respectively. A self-alignment material is deposited on the surface of the substrate around the epitaxial layers and a planarization material is deposited on and covers the top surface of the HBT. The planarization material is then etched so it has a planar surface about the same level as the surface of the self-alignment material and the contact metals protrude from the planar surface. The planar metals are then deposited over the protruding portions of the contact metals.
摘要翻译：公开了一种异质结双极晶体管（HBT），其包括连续的发射极，基极和集电极和子集电极外延层以及分别与发射极，基极和子集电极层接触的发射极，基极和集电极接触金属。包括钝化材料，其覆盖层的未覆盖部分并覆盖基本上所有的接触金属。钝化材料具有平坦表面，并且每个接触金属的一部分从表面突出。平面金属包括在平面表面上，每个与其它表面分离，并与相应的接触金属电接触。还公开了制造HBT的方法，其中连续的发射极，基极，集电极和亚集电极外延层沉积在衬底上，衬底与子集电极层相邻。外延层被蚀刻以提供用于接触金属和发射极的位置，基极和接触金属分别沉积在发射极，基极和次集电极外延层上。自对准材料沉积在外延层周围的衬底表面上，平坦化材料沉积在HBT的顶表面上并覆盖其上表面。然后对平坦化材料进行蚀刻，使其具有与自对准材料的表面大致相同的平面，并且接触金属从平坦表面突出。然后将平面金属沉积在接触金属的突出部分上。

4. 发明授权

US06800531B2 Method of fabricating a bipolar transistor 有权
标题翻译：制造双极晶体管的方法
公开(公告)号：US06800531B2
公开(公告)日：2004-10-05
申请号：US10353208
申请日：2003-01-27
申请人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
发明人： Richard L. Pierson, Jr. , James Chingwei Li , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L21331
CPC分类号： H01L29/66318 , H01L29/0821 , H01L29/7371
摘要： A thin InGaAs contact layer is provided for the collector of a heterojunction bipolar transistor (HBT) above an InP sub-collector. The contact layer provides a low resistance contact mechanism and a high thermal conductivity path for removing device heat though the sub-collector, and also serves as an etch stop to protect the sub-collector during device fabrication. A portion of the sub-collector lateral to the remainder of the HBT is rendered electrically insulative, preferably by an ion implant, to provide electrical isolation for the device and improve its planarity by avoiding etching through the sub-collector.
摘要翻译：为InP子集电极之上的异质结双极晶体管（HBT）的集电极提供了一个薄的InGaAs接触层。接触层提供低电阻接触机构和高导热性路径，用于通过子集电器去除器件热，并且还用作在器件制造期间保护子集电极的蚀刻停止。在HBT的其余部分横向的子集电极的一部分被优选地通过离子注入电绝缘，以提供器件的电隔离，并通过避免通过子集电极的蚀刻来改善其平面度。

5. 发明授权

US06870184B2 Mechanically-stable BJT with reduced base-collector capacitance 有权
公开(公告)号：US06870184B2
公开(公告)日：2005-03-22
申请号：US10631380
申请日：2003-07-30
申请人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar , John A. Higgins
发明人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L23/482 , H01L29/423 , H01L29/73 , H01L29/732 , H01L29/737 , H01L29/40
CPC分类号： H01L29/7317 , H01L23/4821 , H01L23/4822 , H01L24/01 , H01L29/42304 , H01L29/732 , H01L29/7371 , H01L2924/1305 , H01L2924/00
摘要： A bipolar junction transistor (BJT) requires the fabrication of a BJT structure and of a support post which is adjacent to, but physically and electrically isolated from, the BJT structure. The BJT structure includes a semi-insulating substrate, a subcollector, a collector, a base, and an emitter. Metal contacts are formed on the subcollector and emitter to provide collector and emitter terminals. Contact to the structure's base is accomplished with a metal contact which extends from the top of the support post to the edge of the base nearest the support post. The contact bridges the physical and electrical separation between the support post and the base and provides a base terminal for the device. The base contact need extend over the edge of the base by no more than the transfer length associated with the fabrication process. This results in the smaller base contact area over the collector than would otherwise be necessary, and a consequent reduction in base-collector capacitance. The invention is particularly useful when forming heterojunction bipolar transistors (HBTs), built on a compound semiconductor substrate such as indium phosphide (InP).

6. 发明授权

US06858887B1 BJT device configuration and fabrication method with reduced emitter width 有权
标题翻译： BJT器件配置和制造方法，发射极宽度减小
公开(公告)号：US06858887B1
公开(公告)日：2005-02-22
申请号：US10632052
申请日：2003-07-30
申请人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar , John A. Higgins
发明人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar , John A. Higgins
IPC分类号： H01L21/331 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/737 , H01L31/0328
CPC分类号： H01L29/66318 , H01L29/0817 , H01L29/41708 , H01L29/42304 , H01L29/7371
摘要： A BJT device configuration includes an emitter finger and via arrangement which reduces emitter finger width, and is particularly suitable for use with compound semiconductor-based devices. Each emitter finger includes a cross-shaped metal contact which provides an emitter contact; each contact comprises two perpendicular arms which intersect at a central area. A via through an interlevel dielectric layer provides access to the emitter contact; the via is square-shaped, centered over the center point of the central area, and oriented at a 45° angle to the arms. This allows the via size to be equal to or greater than the minimum process dimension, while allowing the width of the emitter finger to be as narrow as possible with the alignment tolerances still being met.
摘要翻译： BJT器件配置包括发射极指和通孔布置，其减少发射极指宽度，并且特别适用于基于化合物半导体的器件。每个发射器指状物包括提供发射体接触的十字形金属触点; 每个接触件包括在中心区域相交的两个垂直臂。通过层间介质层的通孔提供对发射极接触的访问; 通孔是方形的，居中于中心区域的中心点，并且与臂成45°角定向。这允许通孔尺寸等于或大于最小处理尺寸，同时允许发射器指状物的宽度尽可能窄，并且仍然满足对准公差。

7. 发明授权

US06815237B1 Testing apparatus and method for determining an etch bias associated with a semiconductor-processing step 失效
标题翻译：用于确定与半导体处理步骤相关联的蚀刻偏压的测试装置和方法
公开(公告)号：US06815237B1
公开(公告)日：2004-11-09
申请号：US10675680
申请日：2003-09-29
申请人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar
发明人： James Chingwei Li , Richard L. Pierson, Jr. , Berinder P. S. Brar
IPC分类号： H01L2166
CPC分类号： H01L22/34 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A testing apparatus for determining the etch bias associated with a semiconductor-processing step includes a substrate, a first cathode finger with a first width on the substrate, a second cathode finger with a second width on the substrate, and a cathode large area on the substrate wherein the cathode large area has a third width W″ and a length L″ that are both substantially larger than either of the first and second widths.
摘要翻译：用于确定与半导体处理步骤相关联的蚀刻偏压的测试装置包括：衬底，在衬底上具有第一宽度的第一阴极指状物，在衬底上具有第二宽度的第二阴极指状物，以及位于衬底上的阴极大面积衬底，其中阴极大面积具有大于第一宽度和第二宽度中的任一个的第三宽度W“和长度L”。

8. 发明授权

US06605825B1 Bipolar transistor characterization apparatus with lateral test probe pads 失效
标题翻译：具有侧向测试探针焊盘的双极晶体管表征装置
公开(公告)号：US06605825B1
公开(公告)日：2003-08-12
申请号：US10075758
申请日：2002-02-14
申请人： Berinder P. S. Brar , James Chingwei Li , John A. Higgins
发明人： Berinder P. S. Brar , James Chingwei Li , John A. Higgins
IPC分类号： H01L2358
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： Test probe pads are located lateral to, and spaced from, the emitter, base or collector region of a bipolar transistor, preferably on separate pedestals, and connected to their respective transistor regions by air bridges. The probe pads, transistor contacts and air bridges are preferably formed as common metallizations. In the case of an HBT, a gap in the subcollector below the air bridges insulates the test transistor from capacitor loading by the probe pads. The test transistors can be used to characterize both themselves and functional circuit transistors fabricated with the same process on the same wafer by testing at an intermediate stage of manufacture, thus allowing wafers to be discarded without completing the manufacture if their transistors do not meet specifications.
摘要翻译：测试探针焊盘位于双极晶体管的发射极，基极或集电极区域的两侧并且与之隔开，优选地在独立的基座上，并通过气桥连接到它们各自的晶体管区域。探针焊盘，晶体管触点和气桥优选地形成为公共金属化。在HBT的情况下，空气桥下的子集电极的间隙使测试晶体管与探针焊盘的电容负载绝缘。测试晶体管可用于通过在制造的中间阶段进行测试，在同一晶片上以相同工艺制造的本身和功能电路晶体管进行表征，因此如果晶体管不符合规格，就可以丢弃晶片而不完成制造。

9. 发明授权

US06958491B1 Bipolar transistor test structure with lateral test probe pads 失效
标题翻译：双极晶体管测试结构，具有侧向测试探针焊盘
公开(公告)号：US06958491B1
公开(公告)日：2005-10-25
申请号：US10423676
申请日：2003-04-24
申请人： Berinder P. S. Brar , James Chingwei Li , John A. Higgins
发明人： Berinder P. S. Brar , James Chingwei Li , John A. Higgins
IPC分类号： H01L23/544 , H01L23/58
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： Test probe pads are located lateral to, and spaced from, the emitter, base or collector region of a bipolar transistor, preferably on separate pedestals, and connected to their respective transistor regions by air bridges. The probe pads, transistor contacts and air bridges are preferably formed as common metallizations. In the case of an HBT, a gap in the subcollector below the air bridges insulates the test transistor from capacitor loading by the probe pads. The test transistors can be used to characterize both themselves and functional circuit transistors fabricated with the same process on the same wafer by testing at an intermediate stage of manufacture, thus allowing wafers to be discarded without completing the manufacture if their transistors do not meet specifications.
摘要翻译：测试探针焊盘位于双极晶体管的发射极，基极或集电极区域的两侧并且与之隔开，优选地在独立的基座上，并通过气桥连接到它们各自的晶体管区域。探针焊盘，晶体管触点和气桥优选地形成为公共金属化。在HBT的情况下，空气桥下的子集电极的间隙使测试晶体管与探针焊盘的电容负载绝缘。测试晶体管可用于通过在制造的中间阶段进行测试，在同一晶片上以相同工艺制造的本身和功能电路晶体管进行表征，因此如果晶体管不符合规格，就可以丢弃晶片而不完成制造。

10. 发明授权

US08178946B1 Modulation doped super-lattice base for heterojunction bipolar transistors 有权
标题翻译：用于异质结双极晶体管的调制掺杂超晶格基极
公开(公告)号：US08178946B1
公开(公告)日：2012-05-15
申请号：US12623325
申请日：2009-11-20
申请人： James Chingwei Li , Marko Sokolich , Tahir Hussain , David H. Chow
发明人： James Chingwei Li , Marko Sokolich , Tahir Hussain , David H. Chow
IPC分类号： H01L29/00
CPC分类号： H01L29/155 , H01L29/201 , H01L29/7373
摘要： A heterojunction bipolar transistor (HBT) having an emitter, a base, and a collector, the base including a first semiconductor layer coupled to the collector, the first semiconductor layer having a first bandgap between a first conduction band and a first valence band and a second semiconductor layer coupled to the first semiconductor layer and having a second bandgap between a second conduction band and a second valence band, wherein the second valence band is higher than the first valence band and wherein the second semiconductor layer comprises a two dimensional hole gas and a third semiconductor layer coupled to the second semiconductor layer and having a third bandgap between a third conduction band and a third valence band, wherein the third valence band is lower than the second valence band and wherein the third semiconductor layer is coupled to the emitter.
摘要翻译：具有发射极，基极和集电极的异质结双极晶体管（HBT），所述基极包括耦合到集电极的第一半导体层，所述第一半导体层在第一导带和第一价带之间具有第一带隙，第二半导体层，其耦合到所述第一半导体层，并且在第二导带和第二价带之间具有第二带隙，其中所述第二价带高于所述第一价带，并且其中所述第二半导体层包括二维空穴气体，耦合到所述第二半导体层并且在第三导带和第三价带之间具有第三带隙的第三半导体层，其中所述第三价带低于所述第二价带，并且其中所述第三半导体层耦合到所述发射极。

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