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1. 发明申请

US20090128389A1 Multi-bit Per Stage Pipelined Analog to Digital Converters 失效
标题翻译：多级位流水线模数转换器
公开(公告)号：US20090128389A1
公开(公告)日：2009-05-21
申请号：US12025914
申请日：2008-02-05
申请人： James A. Bailey , Mingdeng Chen
发明人： James A. Bailey , Mingdeng Chen
IPC分类号： H03M1/38 , H03M1/12
CPC分类号： H03M1/167
摘要： Various embodiments of the present invention provide systems and circuits that provide for conversion of analog signals to digital signals. For example, various embodiments of the present invention provide pipelined analog to digital converters. Such converters include a sub-converter and a residue amplifier. The sub-converter receives an analog input, and provides a digital representation of the analog input including a number of bits. A gain of the residue amplifier is controlled by selectably setting a group of switches. Each of the number of bits output from the sub-converter electrically controls a respective one of the switches.
摘要翻译：本发明的各种实施例提供了提供将模拟信号转换成数字信号的系统和电路。例如，本发明的各种实施例提供流水线模数转换器。这种转换器包括子转换器和残留放大器。子转换器接收模拟输入，并且提供包括多个位的模拟输入的数字表示。通过可选择地设置一组开关来控制残余放大器的增益。从子转换器输出的每个位数电控制相应的一个开关。

2. 发明授权

US07573417B2 Multi-bit per stage pipelined analog to digital converters 失效
标题翻译：多级每级流水线模数转换器
公开(公告)号：US07573417B2
公开(公告)日：2009-08-11
申请号：US12025914
申请日：2008-02-05
申请人： James A. Bailey , Mingdeng Chen
发明人： James A. Bailey , Mingdeng Chen
IPC分类号： H03M1/38
CPC分类号： H03M1/167
摘要： Various embodiments of the present invention provide systems and circuits that provide for conversion of analog signals to digital signals. For example, various embodiments of the present invention provide pipelined analog to digital converters. Such converters include a sub-converter and a residue amplifier. The sub-converter receives an analog input, and provides a digital representation of the analog input including a number of bits. A gain of the residue amplifier is controlled by selectably setting a group of switches. Each of the number of bits output from the sub-converter electrically controls a respective one of the switches.
摘要翻译：本发明的各种实施例提供了提供将模拟信号转换成数字信号的系统和电路。例如，本发明的各种实施例提供流水线模数转换器。这种转换器包括子转换器和残留放大器。子转换器接收模拟输入，并且提供包括多个位的模拟输入的数字表示。通过可选择地设置一组开关来控制残余放大器的增益。从子转换器输出的每个位数电控制相应的一个开关。

3. 发明授权

US07551115B2 Systems and methods for pipelined analog to digital conversion 有权
标题翻译：用于流水线模数转换的系统和方法
公开(公告)号：US07551115B2
公开(公告)日：2009-06-23
申请号：US12025897
申请日：2008-02-05
申请人： James A. Bailey , Mingdeng Chen
发明人： James A. Bailey , Mingdeng Chen
IPC分类号： H03M1/38
CPC分类号： H03M1/168
摘要： Various embodiments of the present invention provide systems and circuits that provide for conversion of analog signals to digital signals. For example, various embodiments of the present invention provide methods for performing analog to digital conversions that include providing an analog to digital converter with a residue amplifier that is associated with a first capacitance set that includes a first feedback capacitor and first set of input capacitors, and a second capacitance set that includes a second feedback capacitor and second set of input capacitors. The methods further include performing a first sample of an analog input voltage by charging the first set of input capacitors from the analog voltage input during a first period; amplifying the first sample during a second period; performing a second sample of the analog input voltage by charging the second set of input capacitors from the analog voltage input during a third period; and amplifying the second sample during a fourth period.
摘要翻译：本发明的各种实施例提供了提供将模拟信号转换成数字信号的系统和电路。例如，本发明的各种实施例提供了用于执行模数转换的方法，其包括向模数转换器提供与第一电容组相关联的残余放大器，该第一电容组包括第一反馈电容器和第一组输入电容器，以及包括第二反馈电容器和第二组输入电容器的第二电容组。所述方法还包括通过在第一时段期间从所述模拟电压输入充电所述第一组输入电容器来执行模拟输入电压的第一采样; 在第二期间放大第一样品; 通过在第三周期期间从所述模拟电压输入充电所述第二组输入电容器来执行所述模拟输入电压的第二采样; 以及在第四周期期间放大第二样品。

4. 发明申请

US20090128391A1 SYSTEMS AND METHODS FOR PIPELINED ANALOG TO DIGITAL CONVERSION 有权
标题翻译：用于管道模拟到数字转换的系统和方法
公开(公告)号：US20090128391A1
公开(公告)日：2009-05-21
申请号：US12025897
申请日：2008-02-05
申请人： James A. Bailey , Mingdeng Chen
发明人： James A. Bailey , Mingdeng Chen
IPC分类号： H03M1/12
CPC分类号： H03M1/168
摘要： Various embodiments of the present invention provide systems and circuits that provide for conversion of analog signals to digital signals. For example, various embodiments of the present invention provide methods for performing analog to digital conversions that include providing an analog to digital converter with a residue amplifier that is associated with a first capacitance set that includes a first feedback capacitor and first set of input capacitors, and a second capacitance set that includes a second feedback capacitor and second set of input capacitors. The methods further include performing a first sample of an analog input voltage by charging the first set of input capacitors from the analog voltage input during a first period; amplifying the first sample during a second period; performing a second sample of the analog input voltage by charging the second set of input capacitors from the analog voltage input during a third period; and amplifying the second sample during a fourth period.
摘要翻译：本发明的各种实施例提供了提供将模拟信号转换成数字信号的系统和电路。例如，本发明的各种实施例提供了用于执行模数转换的方法，其包括向模数转换器提供与第一电容组相关联的残余放大器，该第一电容组包括第一反馈电容器和第一组输入电容器，以及包括第二反馈电容器和第二组输入电容器的第二电容组。所述方法还包括通过在第一时段期间从所述模拟电压输入充电所述第一组输入电容器来执行模拟输入电压的第一采样; 在第二期间放大第一样品; 通过在第三周期期间从所述模拟电压输入充电所述第二组输入电容器来执行所述模拟输入电压的第二采样; 以及在第四周期期间放大第二样品。

5. 发明授权

US07209068B1 Analog to digital converter elements and methods for using such 有权
标题翻译：模数转换器元件及其使用方法
公开(公告)号：US07209068B1
公开(公告)日：2007-04-24
申请号：US11347345
申请日：2006-02-03
申请人： Mingdeng Chen , James A. Bailey , Siamak Mortezapour
发明人： Mingdeng Chen , James A. Bailey , Siamak Mortezapour
IPC分类号： H03M1/12
CPC分类号： H03M1/167
摘要： Various systems and methods for converting a signal from the analog domain to the digital domain are disclosed herein. As one example, an analog-to-digital converter is disclosed that includes two pipelined analog-to-digital converter stages. The first analog-to-digital converter stage provides an encoded word output and the second analog-to-digital converter stage provides an unencoded word output. A summation device is provided to aggregate the encoded word output with the unencoded word output.
摘要翻译：本文公开了用于将来自模拟域的信号转换为数字域的各种系统和方法。作为一个示例，公开了包括两个流水线模数转换器级的模数转换器。第一模数转换器级提供编码字输出，第二模数转换器级提供未编码的字输出。提供了一个求和装置，用于将编码的字输出与未编码的字输出进行聚合。

6. 发明申请

US20130234874A1 Digital-to-Analog Converter 有权
标题翻译：数模转换器
公开(公告)号：US20130234874A1
公开(公告)日：2013-09-12
申请号：US13415898
申请日：2012-03-09
申请人： James A. Bailey , Abhishek Duggal
发明人： James A. Bailey , Abhishek Duggal
IPC分类号： H03M1/66
CPC分类号： H03M1/822 , H03F3/2175 , H03F3/45475 , H03F3/45928 , H03M1/0682
摘要： A digital-to-analog converter (DAC) has a pulse-width encoder that generates a charging pulse having a pulse width proportional to the DAC's digital input value. The charging pulse controls a charging switch that selectively connects a current source to a capacitor for the duration of the charging pulse. At the end of the charging pulse, a voltage corresponding to the charge stored in the capacitor forms the DAC's analog output signal. Such DACs can be configured (1) with negative-gain amplifiers across the capacitor to form a negative feedback loop, (2) with multiple parallel current sources, and/or (3) in differential architectures.
摘要翻译：数模转换器（DAC）具有脉冲宽度编码器，其产生具有与DAC数字输入值成比例的脉冲宽度的充电脉冲。充电脉冲控制在充电脉冲期间选择性地将电流源连接到电容器的充电开关。在充电脉冲结束时，对应于存储在电容器中的电荷的电压形成DAC的模拟输出信号。这样的DAC可以在电容器上配置（1）负增益放大器，以形成负反馈回路，（2）具有多个并联电流源和/或（3）在差分架构中。

7. 发明申请

US20120075011A1 Tunable Biquad Filter Circuit Including Phase Shift Detection and Methods for Using Such 有权
标题翻译：包括相移检测的可调整Biquad滤波电路及其使用方法
公开(公告)号：US20120075011A1
公开(公告)日：2012-03-29
申请号：US12889270
申请日：2010-09-23
申请人： James A. Bailey , Robert K. Chen , Richard T. Kaul
发明人： James A. Bailey , Robert K. Chen , Richard T. Kaul
IPC分类号： H03K5/00
CPC分类号： H03H11/0422 , G11B20/10009 , G11B20/10027 , G11B20/10046 , G11B2220/2516 , H03H11/0472 , H03H2210/012 , H03H2210/015 , H03H2210/021
摘要： Various embodiments of the present invention provide tunable filter circuits and methods for using such. As an example, a tunable biquad filter is disclosed that includes a tunable biquad circuit, a mixer circuit and a low pass filter. The tunable biquad circuit exhibits a cutoff frequency corresponding to an adjustment value, and is operable to receive an filter input and to provide a filter output. The mixer circuit is operable to provide a product of the filter input and the filter output. The product includes a time dependent component and a static component. The low pass filter is operable to receive the product and to provide the static component.
摘要翻译：本发明的各种实施例提供了可调谐滤波器电路及其使用方法。作为示例，公开了包括可调双二阶电路，混频器电路和低通滤波器的可调二阶滤波器。可调谐二次电路具有对应于调整值的截止频率，并且可操作以接收滤波器输入并提供滤波器输出。混频器电路可操作以提供滤波器输入和滤波器输出的乘积。该产品包括时间依赖组件和静态组件。低通滤波器可操作以接收产品并提供静态组件。

8. 发明授权

US07786037B2 Nanostructured metal-polyaniline composites 失效
标题翻译：纳米结构金属 - 聚苯胺复合材料
公开(公告)号：US07786037B2
公开(公告)日：2010-08-31
申请号：US11653004
申请日：2007-01-11
申请人： Hsing-Lin Wang , Wenguang Li , James A. Bailey , Yuan Gao
发明人： Hsing-Lin Wang , Wenguang Li , James A. Bailey , Yuan Gao
IPC分类号： B01J23/40 , B01J23/42 , H01B1/02 , H01B1/22 , G01J3/44
CPC分类号： G01N21/658 , B01J23/42 , B01J23/44 , B01J23/50 , B01J23/52 , B01J31/069 , B01J35/002 , B01J35/006 , B01J35/065 , B01J37/0203 , B01J2231/645 , B01J2531/17 , B01J2531/18 , B01J2531/824 , B01J2531/828 , C07C67/303 , C07C69/618 , C07C69/612
摘要： Metal-polyaniline (PANI) composites are provided together with a process of preparing such composites by an electrodeless process. The metal of the composite can have nanoscale structural features and the composites can be used in applications such as catalysis for hydrogenation reactions and for analytical detection methods employing SERS.
摘要翻译：金属 - 聚苯胺（PANI）复合材料与通过无电极工艺制备这种复合材料的方法一起提供。复合材料的金属可以具有纳米尺度的结构特征，并且该复合材料可用于氢化反应的催化和使用SERS的分析检测方法。

9. 发明申请

US20100060894A1 NANOSTRUCTURED METAL-POLYANILINE COMPOSITES AND APPLICATIONS THEREOF 有权
标题翻译：纳米结构金属 - 聚氨酯复合材料及其应用
公开(公告)号：US20100060894A1
公开(公告)日：2010-03-11
申请号：US12619328
申请日：2009-11-16
申请人： Hsing-Lin Wang , Wenguang Li , James A. Bailey , Yuan Gao
发明人： Hsing-Lin Wang , Wenguang Li , James A. Bailey , Yuan Gao
IPC分类号： G01J3/44 , C07C5/03 , C07F7/10 , C07C51/36 , B01J35/00
CPC分类号： G01N21/658 , B01J23/42 , B01J23/44 , B01J23/50 , B01J23/52 , B01J31/069 , B01J35/002 , B01J35/006 , B01J35/065 , B01J37/0203 , B01J2231/645 , B01J2531/17 , B01J2531/18 , B01J2531/824 , B01J2531/828 , C07C67/303 , C07C69/618 , C07C69/612
摘要： Metal-polyaniline (PANI) composites are provided together with a process of preparing such composites by an electrodeless process. The metal of the composite can have nanoscale structural features and the composites can be used in applications such as catalysis for hydrogenation reactions and for analytical detection methods employing SERS.
摘要翻译：金属 - 聚苯胺（PANI）复合材料与通过无电极工艺制备这种复合材料的方法一起提供。复合材料的金属可以具有纳米尺度的结构特征，并且该复合材料可用于氢化反应的催化和使用SERS的分析检测方法。

10. 发明授权

US08730077B2 Read channel with selective oversampled analog to digital conversion 有权
标题翻译：读取通道具有选择性过采样模数转换
公开(公告)号：US08730077B2
公开(公告)日：2014-05-20
申请号：US13215806
申请日：2011-08-23
申请人： James A. Bailey , Nayak Ratnakar Aravind , Robert H. Leonowich , Erich F. Haratsch
发明人： James A. Bailey , Nayak Ratnakar Aravind , Robert H. Leonowich , Erich F. Haratsch
IPC分类号： H03M1/12
CPC分类号： G11B20/10037 , G11B20/10027 , G11B20/10046 , G11B20/22 , G11B20/24 , G11B2220/2516
摘要： Methods and apparatus are provided for processing a signal in a read channel using a selective oversampled analog to digital conversion. The disclosed selective oversampled analog to digital conversion simplifies the analog design by transferring at least a portion of the equalization and/or filtering processes to the digital domain. An analog input signal in a read channel is converted to a digital signal to generate one or more digital samples corresponding to the analog input signal for a given bit interval. The analog input signal is selectively filtered in an analog domain in a first mode and the digital samples are selectively filtered in a digital domain in a second mode. A data detection algorithm is applied to the digital samples to obtain a detected output. The selection of the first mode and the second mode can be, for example, based on channel conditions. The analog to digital conversion can be performed at a baud rate in the first mode and at an oversampled rate in the second mode.
摘要翻译：提供了用于使用选择性过采样模数转换处理读通道中的信号的方法和装置。所公开的选择性过采样模数转换通过将均衡和/或滤波处理的至少一部分转移到数字域来简化了模拟设计。读取通道中的模拟输入信号被转换为数字信号，以在给定位间隔内产生对应于模拟输入信号的一个或多个数字采样。模拟输入信号在第一模式中以模拟域中选择性滤波，并且在第二模式中数字采样在数字域中有选择地滤波。将数据检测算法应用于数字样本以获得检测到的输出。第一模式和第二模式的选择可以是例如基于信道条件。模数转换可以在第一模式下的波特率和第二模式中的过采样速率下执行。

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