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1. 发明授权

US06281815B1 Method of allocating RLL code having enhanced DC suppression capability, modulation method, demodulation method, and demodulation apparatus therefor 有权
标题翻译：分配具有增强的DC抑制能力的RLL码的方法，调制方法，解调方法及其解调装置
公开(公告)号：US06281815B1
公开(公告)日：2001-08-28
申请号：US09556827
申请日：2000-04-21
申请人： Jae-seong Shim , Yong-kwang Won , Jung-wan Ko
发明人： Jae-seong Shim , Yong-kwang Won , Jung-wan Ko
IPC分类号： H03M700
CPC分类号： G11B20/14 , G11B20/1426 , H03M5/14 , H03M7/46
摘要： An allocating method of allocating a run length limited (RLL) code having enhanced direct current (DC) suppression capability, modulation and demodulation methods, and a demodulation apparatus are provided. In order to control DC suppression, a pair of code groups having suppression controlling capability are allocated, and a (1, 8, 8, 12) code having DC suppression capability, in which a code word of the pair of code groups has the sign of code word sum value (CSV) parameter, which represent DC value in a code word, and the characteristic of an INV parameter, which predicts the transition direction of digital sum value (DSV) of the succeeding code word, both opposite to those of the code word which belongs to the other code group and corresponds to the same source code, is used and is appropriate to high-density optical disc system.
摘要翻译：提供一种分配具有增强的直流（DC）抑制能力的游程长度限制（RLL）码，调制和解调方法以及解调装置的分配方法。为了控制DC抑制，分配具有抑制控制能力的一对代码组，以及具有DC抑制能力的（1,8,8,12）代码，其中该代码组对中的代码字具有符号表示代码字中的DC值的代码字和值（CSV）参数以及INV参数的特性，该参数预测后续代码字的数字和值（DSV）的转移方向，两者与使用属于其他代码组并且对应于相同源代码的代码字，并且适用于高密度光盘系统。

2. 发明授权

US06268810B1 Method of generating run length limited (RLL) code having improved DC suppression capability and modulation/demodulation method of the generated RLL code 有权
标题翻译：产生具有改善的DC抑制能力的行程限制（RLL）码和生成的RLL码的调制/解调方法的方法
公开(公告)号：US06268810B1
公开(公告)日：2001-07-31
申请号：US09522446
申请日：2000-03-09
申请人： Jae-seong Shim , Yong-kwang Won
发明人： Jae-seong Shim , Yong-kwang Won
IPC分类号： H03M700
CPC分类号： G11B20/1426 , H03M5/14 , H03M7/46
摘要： A method of generating a run length limited (RLL) code having improved direct current (DC) suppression capability and modulation and demodulation methods of the generated RLL code. According to the method of generating the RLL codes, code words that satisfy a (d, k) run length constraint are generated. By allocating main code groups, in which a code word can be duplicated depending on the characteristics of the generated codeword and code words of each main code group are allocated in consideration of a code word sum value (CSV) parameter, which represents the DC value in a code word, and an inverse characteristic of an INV parameter, which predicts the transition direction of digital sum value (DSV) of the next code word, and allocating decision groups for differentiating the duplicated code words, by using some of the code words, which are already used in main code group, as code words for DSV groups for the DC suppression, the number of code word bits can be reduced and the recording density increases, while improving the DC suppression capability.
摘要翻译：一种生成具有改进的直流（DC）抑制能力和生成的RLL码的调制和解调方法的游程长度限制（RLL）码的方法。根据生成RLL码的方法，生成满足（d，k）游程长度约束的码字。通过分配主代码组，其中可以根据所生成的代码字的特性和每个主代码组的代码字来复制代码字，这是考虑到代码字总和值（CSV）参数来分配的，其代表DC值在代码字中，以及INV参数的逆特性，其预测下一个代码字的数字和值（DSV）的转换方向，并且通过使用一些代码字来分配用于区分重复的代码字的决定组已经在主代码组中使用，作为用于DC抑制的DSV组的代码字，可以减少代码字比特的数量并且记录密度增加，同时提高DC抑制能力。

3. 发明授权

US06751178B1 Optical recording medium and recording/reproduction method thereof 失效
标题翻译：光记录介质及其记录/再现方法
公开(公告)号：US06751178B1
公开(公告)日：2004-06-15
申请号：US09553157
申请日：2000-04-20
申请人： Kyung-geun Lee , Seong-sin Joo , In-sik Park , Byung-in Ma , Jae-seong Shim , Du-seop Yoon , Byoung-ho Choi , Yong-kwang Won
发明人： Kyung-geun Lee , Seong-sin Joo , In-sik Park , Byung-in Ma , Jae-seong Shim , Du-seop Yoon , Byoung-ho Choi , Yong-kwang Won
IPC分类号： G11B700
CPC分类号： G11B27/24 , G11B7/007 , G11B7/00718 , G11B7/00745 , G11B7/0938 , G11B27/3027 , G11B2220/216 , G11B2220/2575 , G11B2220/2579
摘要： An optical recording medium and a recording/reproducing method therefor to stably and accurately address a basic recording and/or reproducing unit (a sector or a frame) when a track pitch is decreased for recording of a large capacity of data. The general information (e.g., a variable frequency oscillator, a sector number, a sector type, and error detection information) of a corresponding sector is read from a header, which has physical pits between adjacent land and/or groove tracks, before recording or reproducing. The arrangement of the header is in the form of physical pits, with a sector structure where 2-kilobyte minimum recording units are included in a user area within a basic recording unit of 4 kilobytes, which thereby reduces overhead and facilitates the generation of a servo control signal.
摘要翻译：一种光记录介质及其记录/再现方法，用于在轨道间距减小以稳定且精确地寻址基本记录和/或再现单元（扇区或帧）时记录大容量数据。从记录之前在相邻的纹间和/或凹槽轨道之间具有物理凹坑的标题读取相应扇区的一般信息（例如，可变频率振荡器，扇区号，扇区类型和错误检测信息）复制。头部的布置是物理凹坑的形式，具有扇区结构，其中2千字节的最小记录单元包括在4千字节的基本记录单元内的用户区域中，从而减少了开销，并且有助于生成伺服控制信号。

4. 发明授权

US06404363B1 Circuit for recovering digital clock signal and method thereof 失效
标题翻译：电路恢复数字时钟信号及其方法
公开(公告)号：US06404363B1
公开(公告)日：2002-06-11
申请号：US09566720
申请日：2000-05-09
申请人： Hyun-soo Park , Jae-seong Shim , Yong-kwang Won
发明人： Hyun-soo Park , Jae-seong Shim , Yong-kwang Won
IPC分类号： H03M100
CPC分类号： G11B20/10037 , G11B20/10203 , G11B20/1403 , H03L7/0807 , H03L7/087 , H03L7/113 , H04L7/033 , H04L7/0331 , H04L7/0334
摘要： A circuit for recovering a digital clock signal and a method therefor is disclosed. The digital clock recovery circuit includes an analog-to-digital (A/D) converter and asymmetry corrector for converting a received analog signal into digital data and providing corrected digital data corrected by a binarization level which traces the center value of the received signal, a frequency error detector for detecting a frequency error from the corrected digital data, a phase error detector for detecting a phase error from the corrected digital data, and a digital low pass filter (LPF) for providing the frequency error and the phase error as a control voltage. It is possible to trace the asymmetry of the received signal more sensitively than in the conventional technology by realizing an asymmetry corrector for correcting the asymmetry of the digital data which has undergone the analog-to-digital (A/D) conversion, the phase error detector, and the LPF by a digital circuit, thus generating a system clock signal and to improve the reliability of the system by stably generating the system clock signal.
摘要翻译：公开了一种用于恢复数字时钟信号的电路及其方法。数字时钟恢复电路包括模拟数字（A / D）转换器和不对称校正器，用于将接收到的模拟信号转换成数字数据，并提供校正的数字数据，该数字数据通过追踪接收信号的中心值的二值化电平进行校正，用于从校正的数字数据中检测频率误差的频率误差检测器，用于从校正的数字数据检测相位误差的相位误差检测器，以及用于将频率误差和相位误差提供为控制电压。通过实现用于校正经过模数（A / D）转换的数字数据的不对称性的不对称校正器，可以比常规技术更灵敏地追踪接收信号的不对称性，相位误差检测器和LPF，从而产生系统时钟信号，并通过稳定地产生系统时钟信号来提高系统的可靠性。

5. 发明授权

US08161141B2 Server, system and method for providing dynamic domain name service 有权
标题翻译：用于提供动态域名服务的服务器，系统和方法
公开(公告)号：US08161141B2
公开(公告)日：2012-04-17
申请号：US12425566
申请日：2009-04-17
申请人： Gwang-whoon Jang , Yong-kwang Won
发明人： Gwang-whoon Jang , Yong-kwang Won
IPC分类号： G06F15/177 , G06F15/173 , G06F15/16
CPC分类号： H04L61/1511 , H04L29/12066 , H04L29/12301 , H04L43/0817 , H04L43/10 , H04L61/2076
摘要： Provided are a server, a system, and a method of distributing a load caused by health checks in a dynamic domain name server (DDNS) by separating a health check unit which causes the most load on the dynamic domain name server and a unit for processing a client query and registering equipment. The dynamic domain name server (DDNS) includes a main dynamic domain name server (DDNS that registers an identifier and a dynamic IP address for a piece of the equipment and responds to a client query request with the dynamic IP address of the piece of equipment; and at least one sub-DDNS for updating a status of the piece of equipment in response to a status notifying message sent from the piece of equipment.
摘要翻译：提供了通过分离在动态域名服务器上造成最大负载的健康检查单元和用于处理的单元来分配由健康检查引起的负载在动态域名服务器（DDNS）中的服务器，系统和方法客户端查询和注册设备。动态域名服务器（DDNS）包括一个主动态域名服务器（DDNS，为一个设备注册一个标识符和一个动态IP地址，并用该设备的动态IP地址响应客户端查询请求; 以及至少一个子DDNS，用于响应于从该设备发送的状态通知消息来更新该设备的状态。

6. 发明申请

US20100057893A1 SERVER, SYSTEM AND METHOD FOR PROVIDING DYNAMIC DOMAIN NAME SERVICE 有权
标题翻译：提供动态域名服务的服务器，系统和方法
公开(公告)号：US20100057893A1
公开(公告)日：2010-03-04
申请号：US12425566
申请日：2009-04-17
申请人： Gwang-whoon Jang , Yong-kwang Won
发明人： Gwang-whoon Jang , Yong-kwang Won
IPC分类号： G06F15/177 , G06F17/30
CPC分类号： H04L61/1511 , H04L29/12066 , H04L29/12301 , H04L43/0817 , H04L43/10 , H04L61/2076
摘要： Provided are a server, a system, and a method of distributing a load caused by health checks in a dynamic domain name server (DDNS) by separating a health check unit which causes the most load on the dynamic domain name server and a unit for processing a client query and registering equipment. The dynamic domain name server (DDNS) includes a main dynamic domain name server (DDNS that registers an identifier and a dynamic IP address for a piece of the equipment and responds to a client query request with the dynamic IP address of the piece of equipment; and at least one sub-DDNS for updating a status of the piece of equipment in response to a status notifying message sent from the piece of equipment.
摘要翻译：提供了通过分离在动态域名服务器上造成最大负载的健康检查单元和用于处理的单元来分配由健康检查引起的负载在动态域名服务器（DDNS）中的服务器，系统和方法客户端查询和注册设备。动态域名服务器（DDNS）包括一个主动态域名服务器（DDNS，为一个设备注册一个标识符和一个动态IP地址，并用该设备的动态IP地址响应客户端查询请求; 以及至少一个子DDNS，用于响应于从该设备发送的状态通知消息来更新该设备的状态。

7. 发明授权

US5767798A Modulation code encoder and/or decoder 失效
标题翻译：调制码编码器和/或解码器
公开(公告)号：US5767798A
公开(公告)日：1998-06-16
申请号：US684213
申请日：1996-07-19
申请人： Yong-kwang Won
发明人： Yong-kwang Won
IPC分类号： G11B20/10 , H03M5/14 , H03M7/00
CPC分类号： H03M5/145
摘要： Modulation code encoder/decoder for a (2,9) RLL modulation code are provided. The modulation code encoder includes a serial-to-parallel converter, a controller, an inverter, a first and second memory and a multiplexer, and the modulation code decoder includes a serial-to-parallel converter, a controller, an inverter, a first and second memory, a first multiplexer, a delay circuit, a selection signal output portion, a second multiplexer and a parallel-to-serial converter. The modulation code encoder/decoder can be applied to a magneto-optical disk, magnetic tape and hard disk drive (HDD) in which high-density recording is required since the error correction capacity is enhanced by providing a decoder which performs an overlapped decoding operation with respect to the (2,9) RLL modulation code.
摘要翻译：提供了（2,9）RLL调制码的调制码编码器/解码器。调制码编码器包括串并转换器，控制器，反相器，第一和第二存储器和多路复用器，并且调制码解码器包括串并转换器，控制器，逆变器，第一第二存储器，第一多路复用器，延迟电路，选择信号输出部分，第二多路复用器和并 - 串行转换器。调制码编码器/解码器可以应用于需要高密度记录的磁光盘，磁带和硬盘驱动器（HDD），因为通过提供执行重叠解码操作的解码器来增强纠错能力相对于（2,9）RLL调制码。

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