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1. 发明授权

US07638995B2 Clocked ramp apparatus for voltage regulator softstart and method for softstarting voltage regulators 有权
标题翻译：用于稳压器软启动的时钟斜坡装置和软启动稳压器的方法
公开(公告)号：US07638995B2
公开(公告)日：2009-12-29
申请号：US11038746
申请日：2005-01-18
申请人： Brett J. Thompsen , Ira G. Miller , Eduardo Velarde, Jr.
发明人： Brett J. Thompsen , Ira G. Miller , Eduardo Velarde, Jr.
IPC分类号： G05F1/00
CPC分类号： G05F1/468 , Y10S323/901
摘要： Methods and apparatus for softstarting a voltage regulation circuit. A circuit for generating an output voltage at an output thereof includes a capacitor having a first terminal configured to be coupled to a reference potential and having a second terminal coupled to the output, and a switchable current source coupled to the capacitor for intermittently charging the capacitor until the output voltage is reached.
摘要翻译：软启动电压调节电路的方法和装置。用于在其输出处产生输出电压的电路包括电容器，其具有被配置为耦合到参考电位并且具有耦合到输出的第二端子的第一端子，以及耦合到电容器的可切换电流源，用于间歇地对电容器充电直到达到输出电压。

2. 发明授权

US07091712B2 Circuit for performing voltage regulation 有权
标题翻译：执行电压调节的电路
公开(公告)号：US07091712B2
公开(公告)日：2006-08-15
申请号：US10843805
申请日：2004-05-12
申请人： Ira G. Miller , Brett J. Thompsen , Eduardo Velarde, Jr.
发明人： Ira G. Miller , Brett J. Thompsen , Eduardo Velarde, Jr.
IPC分类号： G05F1/567
CPC分类号： G05F3/267
摘要： A circuit (10, 100) is used to perform voltage regulation. In one embodiment, a voltage regulator (11) is used in conjunction with an output transistor (24) to form a circuit (10) which operates to regulate the voltage drop from a first node (30) to a second node (28). This second node (28) may be used to provide power to circuitry (27). The areas of several transistors (20–25) in circuit (10) may be adjusted so that negative and positive temperature coefficients may be balanced such that the circuit (10) behaves as desired over a range of voltages and temperatures. Note that in one embodiment, circuit (10) is a 2-terminal device.
摘要翻译：电路（10,100）用于执行电压调节。在一个实施例中，电压调节器（11）与输出晶体管（24）结合使用以形成用于调节从第一节点（30）到第二节点（28）的电压降的电路（10）。该第二节点（28）可用于向电路（27）提供电力。可以调节电路（10）中的几个晶体管（20-25）的面积，使得负和正温度系数可以被平衡，使得电路（10）在电压和温度的范围内按照期望的方式工作。注意，在一个实施例中，电路（10）是2端子装置。

3. 发明申请

US20090184655A1 POWER MANAGEMENT SYSTEM FOR LIGHT EMITTING DIODES 审中-公开
标题翻译：用于发光二极管的电源管理系统
公开(公告)号：US20090184655A1
公开(公告)日：2009-07-23
申请号：US12017474
申请日：2008-01-22
申请人： Ira G. Miller , Eduardo Velarde
发明人： Ira G. Miller , Eduardo Velarde
IPC分类号： H05B37/02
CPC分类号： H05B33/0815
摘要： A power management system comprising: providing a one pin driver circuit; sourcing a managed current from the one pin driver circuit; and illuminating a light emitting diode by the managed current including reducing the managed current when the light emitting diode is not coupled.
摘要翻译：一种电源管理系统，包括：提供一个引脚驱动电路; 从一个引脚驱动器电路采集管理电流; 以及通过所述管理电流照射发光二极管，包括当所述发光二极管未耦合时降低所述管理电流。

4. 发明授权

US08598916B2 Circuit having gate drivers having a level shifter 有权
标题翻译：具有栅极驱动器的电路具有电平转换器
公开(公告)号：US08598916B2
公开(公告)日：2013-12-03
申请号：US12818235
申请日：2010-06-18
申请人： Ira G. Miller , Ricardo Takase Goncalves , Geoffrey W. Perkins
发明人： Ira G. Miller , Ricardo Takase Goncalves , Geoffrey W. Perkins
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K19/018521
摘要： A circuit comprises a first level shifting circuit. The level shifting circuit comprises a first and second latching differential pairs. The first latching differential pair has first and second inputs for receiving first and second input signals, first and second outputs, and first and second power supply voltage terminals for receiving a first power supply voltage. The second latching differential pair has first and second inputs coupled to the first and second outputs of the first latching differential pair, an output, and first and second power supply voltage terminals for receiving a second power supply voltage, the second power supply voltage being different from the first power supply voltage. In one embodiment, the level shifting circuit protects transistor gates of the circuit from an overvoltage.
摘要翻译：电路包括第一电平移位电路。电平移位电路包括第一和第二锁存差分对。第一锁存差分对具有用于接收第一和第二输入信号的第一和第二输入端，第一和第二输出端以及用于接收第一电源电压的第一和第二电源电压端子。第二锁存差分对具有耦合到第一锁存差分对的第一和第二输出的第一和第二输入，输出以及用于接收第二电源电压的第一和第二电源电压端子，第二电源电压是不同的从第一个电源电压。在一个实施例中，电平移位电路保护电路的晶体管栅极免受过电压。

5. 发明申请

US20100007316A1 Current Sensing In a Buck-Boost Switching Regulator Using Integrally Embedded PMOS Devices 有权
标题翻译：使用整体嵌入式PMOS器件的降压 - 升压型开关稳压器中的电流检测
公开(公告)号：US20100007316A1
公开(公告)日：2010-01-14
申请号：US12169485
申请日：2008-07-08
申请人： Ira G. Miller , Eduardo Velarde
发明人： Ira G. Miller , Eduardo Velarde
IPC分类号： G05F1/00 , H01L29/80 , H01L27/07
CPC分类号： H01L27/088 , H01L27/0207 , H01L29/41758 , H01L29/78
摘要： A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of the power transistor being used as sense transistor cells. The sense transistor cells are evenly distributed throughout the cellular array where the source terminal of each sense transistor cell is electrically connected to a first node through a metal line in the first metal layer and through a metal line in the second metal layer where the metal lines are electrically isolated from the metal lines connecting the transistor cells of the power transistor. The sense transistor cells measure a small portion of the current flowing through the power transistor based on the size ratio of the current sense device and the power transistor.
摘要翻译：描述了用于功率晶体管的电流检测器件。功率晶体管形成在包括晶体管单元的蜂窝阵列的蜂窝结构中。电流检测器件包括用作检测晶体管单元的功率晶体管的晶体管单元的蜂窝阵列中的多个晶体管单元。感测晶体管单元均匀分布在整个蜂窝阵列中，其中每个感测晶体管单元的源极端通过第一金属层中的金属线电连接到第一节点，并通过第二金属层中的金属线，金属线与连接功率晶体管的晶体管单元的金属线电隔离。感测晶体管单元基于电流检测器件和功率晶体管的尺寸比来测量流过功率晶体管的电流的一小部分。

6. 发明授权

US08754626B2 Switching regulator with input current limiting capabilities 有权
标题翻译：具有输入电流限制功能的开关稳压器
公开(公告)号：US08754626B2
公开(公告)日：2014-06-17
申请号：US12818270
申请日：2010-06-18
申请人： Ira G. Miller , Ricardo Takase Goncalves , John M. Pigott
发明人： Ira G. Miller , Ricardo Takase Goncalves , John M. Pigott
IPC分类号： G05F1/56 , G05F1/565 , G05F1/575 , G05F1/595
CPC分类号： H02M1/32 , H02M3/1588 , H02M2001/0009 , Y02B70/1466
摘要： A switching regulator includes a capacitor, a charge control circuit, a discharge detector, a switch circuit, and a feedback circuit. The charge control circuit charges and discharges the capacitor. The discharge detector has an input coupled to the capacitor to detect when the capacitor has discharged to a predetermined level to indicate an over-current condition. The switch circuit is coupled to receive an input voltage. The switch circuit is made conductive and non conductive by a switching signal for supplying an output voltage at a regulated voltage level. The duty cycle of the switching signal is reduced in response to an indication of an over-current condition. The feedback circuit is for controlling a discharge rate of the capacitor.
摘要翻译：开关稳压器包括电容器，充电控制电路，放电检测器，开关电路和反馈电路。充电控制电路对电容器进行充电和放电。放电检测器具有耦合到电容器的输入，以检测电容器何时放电到预定电平以指示过电流状态。开关电路被耦合以接收输入电压。开关电路通过用于以稳定电压电平提供输出电压的开关信号导通和不导通。响应于过电流状态的指示，开关信号的占空比被减小。反馈电路用于控制电容器的放电率。

7. 发明申请

US20110309812A1 SWITCHING REGULATOR WITH INPUT CURRENT LIMITING CAPABILITIES 有权
标题翻译：具有输入电流限制能力的开关稳压器
公开(公告)号：US20110309812A1
公开(公告)日：2011-12-22
申请号：US12818270
申请日：2010-06-18
申请人： Ira G. Miller , Ricardo Takase Goncalves , John M. Pigott
发明人： Ira G. Miller , Ricardo Takase Goncalves , John M. Pigott
IPC分类号： G05F1/10
CPC分类号： H02M1/32 , H02M3/1588 , H02M2001/0009 , Y02B70/1466
摘要： A switching regulator includes a capacitor, a charge control circuit, a discharge detector, a switch circuit, and a feedback circuit. The charge control circuit charges and discharges the capacitor. The discharge detector has an input coupled to the capacitor to detect when the capacitor has discharged to a predetermined level to indicate an over-current condition. The switch circuit is coupled to receive an input voltage. The switch circuit is made conductive and non conductive by a switching signal for supplying an output voltage at a regulated voltage level. The duty cycle of the switching signal is reduced in response to an indication of an over-current condition. The feedback circuit is for controlling a discharge rate of the capacitor.
摘要翻译：开关稳压器包括电容器，充电控制电路，放电检测器，开关电路和反馈电路。充电控制电路对电容器进行充电和放电。放电检测器具有耦合到电容器的输入，以检测电容器何时放电到预定电平以指示过电流状态。开关电路被耦合以接收输入电压。开关电路通过用于以稳定电压电平提供输出电压的开关信号导通和不导通。响应于过电流状态的指示，开关信号的占空比被减小。反馈电路用于控制电容器的放电率。

8. 发明授权

US07432689B2 Buck-boost control logic for PWM regulator 有权
标题翻译：用于PWM调节器的降压 - 升压控制逻辑
公开(公告)号：US07432689B2
公开(公告)日：2008-10-07
申请号：US11429613
申请日：2006-05-05
申请人： Ira G. Miller , Eduardo Velarde
发明人： Ira G. Miller , Eduardo Velarde
IPC分类号： G05F1/62 , G05F1/595 , G05F3/16
CPC分类号： H02M3/1582
摘要： A PWM regulator is operated either a buck mode or a boost mode depending on whether the input voltage is above or below the desired regulated output voltage. The technique uses two sawtooth ramps 180 degrees out of phase. Where the two ramps cross each other is a buck/boost transition level. An error voltage, corresponding to a required duty cycle to achieve a regulated voltage, is compared to the two ramps. The transition from one mode to the other occurs when the error voltage passes the buck/boost transition level of the two ramps. A logic circuit supplies PWM pulses to either buck switching transistors or the boost switching transistors in a power stage of the regulator, depending on the whether the error voltage is above or below the buck/boost transition level, to achieve the regulated voltage.
摘要翻译：根据输入电压是否高于或低于所需的稳压输出电压，PWM调节器工作在降压模式或升压模式。该技术使用两个相位相差180度的锯齿形斜坡。两个斜坡交叉的地方是降压/升压转换水平。将对应于实现调节电压的所需占空比的误差电压与两个斜坡进行比较。当错误电压通过两个斜坡的降压/升压转换电平时，从一种模式转换到另一种模式发生。逻辑电路根据误差电压是否高于或低于降压/升压转换电平，在调节器的功率级中降压开关晶体管或升压开关晶体管，从而实现调节电压。

9. 发明授权

US06362770B1 Dual input switched capacitor gain stage 失效
标题翻译：双路输入开关电容器增益级
公开(公告)号：US06362770B1
公开(公告)日：2002-03-26
申请号：US09659972
申请日：2000-09-12
申请人： Ira G. Miller , Douglas A. Garrity , Thierry Cassagnes
发明人： Ira G. Miller , Douglas A. Garrity , Thierry Cassagnes
IPC分类号： H03M100
CPC分类号： H03M1/1225 , H03M1/442
摘要： A gain stage using switched capacitor architecture and suitable for a pipelined analog to digital converters provides for three pairs of switched capacitor banks whose use may be alternated so as to provide simultaneous sampling of two input channels for sequential gain operation without the interposition of additional circuitry in the signal chain from input to output of the gain stage.
摘要翻译：使用开关电容器架构并适用于流水线模数转换器的增益级提供了三对开关电容器组，其使用可以交替，以便提供两个输入通道的同时采样用于顺序增益操作，而不需要插入附加电路信号链从增益级的输入到输出。

10. 发明授权

US08970285B2 Dual supply level shifter circuits 有权
标题翻译：双电源电平转换电路
公开(公告)号：US08970285B2
公开(公告)日：2015-03-03
申请号：US13831828
申请日：2013-03-15
申请人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
发明人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
IPC分类号： H03L5/00
CPC分类号： H03K19/018528 , H03K19/018521
摘要： A dual supply level shifter circuit includes a switching circuit and a set of level shifter circuits coupled to the switching circuit. The switching circuit includes a first set of coupled transistors, wherein the supply switching circuit is coupled to a first supply source that is configured to provide a first power supply voltage and is coupled to a second supply source that is configured to provide a second power supply voltage. The set of level shifter circuits includes a second set of coupled transistors, wherein the set of level shifter circuits is configured to receive a voltage input signal at an input node from a first circuit and to supply to an output node of the dual supply level shifter circuit an output signal having a value that is a highest voltage value between the first power supply voltage and the second power supply voltage.
摘要翻译：双电源电平移位器电路包括开关电路和耦合到开关电路的一组电平移位器电路。开关电路包括第一组耦合的晶体管，其中电源开关电路耦合到第一电源，该第一电源被配置为提供第一电源电压并被耦合到第二电源，该第二电源被配置为提供第二电源电压。该组电平移位器电路包括第二组耦合晶体管，其中该组电平移位器电路被配置为从第一电路接收输入节点处的电压输入信号并提供给双电源电平移位器的输出节点对具有第一电源电压和第二电源电压之间的最高电压值的值的输出信号进行电路化。

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