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    • 1. 发明授权
    • Current sensing in a buck-boost switching regulator using integrally embedded PMOS devices
    • 使用整体嵌入式PMOS器件的降压 - 升压开关稳压器中的电流检测
    • US07759923B2
    • 2010-07-20
    • US12169485
    • 2008-07-08
    • Ira G. MillerEduardo Velarde
    • Ira G. MillerEduardo Velarde
    • G05F1/40G05F1/56
    • H01L27/088H01L27/0207H01L29/41758H01L29/78
    • A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of the power transistor being used as sense transistor cells. The sense transistor cells are evenly distributed throughout the cellular array where the source terminal of each sense transistor cell is electrically connected to a first node through a metal line in the first metal layer and through a metal line in the second metal layer where the metal lines are electrically isolated from the metal lines connecting the transistor cells of the power transistor. The sense transistor cells measure a small portion of the current flowing through the power transistor based on the size ratio of the current sense device and the power transistor.
    • 描述了用于功率晶体管的电流检测器件。 功率晶体管形成在包括晶体管单元的蜂窝阵列的蜂窝结构中。 电流检测器件包括用作检测晶体管单元的功率晶体管的晶体管单元的蜂窝阵列中的多个晶体管单元。 感测晶体管单元均匀分布在整个蜂窝阵列中,其中每个感测晶体管单元的源极端通过第一金属层中的金属线电连接到第一节点,并通过第二金属层中的金属线,金属线 与连接功率晶体管的晶体管单元的金属线电隔离。 感测晶体管单元基于电流检测器件和功率晶体管的尺寸比来测量流过功率晶体管的电流的一小部分。
    • 4. 发明申请
    • Buck-boost control logic for PWM regulator
    • 用于PWM调节器的降压 - 升压控制逻辑
    • US20070273340A1
    • 2007-11-29
    • US11429613
    • 2006-05-05
    • Ira MillerEduardo Velarde
    • Ira MillerEduardo Velarde
    • G05F1/613
    • H02M3/1582
    • A PWM regulator is operated either a buck mode or a boost mode depending on whether the input voltage is above or below the desired regulated output voltage. The technique uses two sawtooth ramps 180 degrees out of phase. Where the two ramps cross each other is a buck/boost transition level. An error voltage, corresponding to a required duty cycle to achieve a regulated voltage, is compared to the two ramps. The transition from one mode to the other occurs when the error voltage passes the buck/boost transition level of the two ramps. A logic circuit supplies PWM pulses to either buck switching transistors or the boost switching transistors in a power stage of the regulator, depending on the whether the error voltage is above or below the buck/boost transition level, to achieve the regulated voltage.
    • 根据输入电压是否高于或低于所需的稳压输出电压,PWM调节器工作在降压模式或升压模式。 该技术使用两个相位相差180度的锯齿形斜坡。 两个斜坡交叉的地方是降压/升压转换水平。 将对应于实现调节电压的所需占空比的误差电压与两个斜坡进行比较。 当错误电压通过两个斜坡的降压/升压转换电平时,从一种模式转换到另一种模式发生。 逻辑电路根据误差电压是否高于或低于降压/升压转换电平,在调节器的功率级中降压开关晶体管或升压开关晶体管,从而实现调节电压。
    • 5. 发明授权
    • Circuit for performing voltage regulation
    • 执行电压调节的电路
    • US07091712B2
    • 2006-08-15
    • US10843805
    • 2004-05-12
    • Ira G. MillerBrett J. ThompsenEduardo Velarde, Jr.
    • Ira G. MillerBrett J. ThompsenEduardo Velarde, Jr.
    • G05F1/567
    • G05F3/267
    • A circuit (10, 100) is used to perform voltage regulation. In one embodiment, a voltage regulator (11) is used in conjunction with an output transistor (24) to form a circuit (10) which operates to regulate the voltage drop from a first node (30) to a second node (28). This second node (28) may be used to provide power to circuitry (27). The areas of several transistors (20–25) in circuit (10) may be adjusted so that negative and positive temperature coefficients may be balanced such that the circuit (10) behaves as desired over a range of voltages and temperatures. Note that in one embodiment, circuit (10) is a 2-terminal device.
    • 电路(10,100)用于执行电压调节。 在一个实施例中,电压调节器(11)与输出晶体管(24)结合使用以形成用于调节从第一节点(30)到第二节点(28)的电压降的电路(10)。 该第二节点(28)可用于向电路(27)提供电力。 可以调节电路(10)中的几个晶体管(20-25)的面积,使得负和正温度系数可以被平衡,使得电路(10)在电压和温度的范围内按照期望的方式工作。 注意,在一个实施例中,电路(10)是2端子装置。
    • 9. 发明申请
    • Circuit for performing voltage regulation
    • 执行电压调节的电路
    • US20050253570A1
    • 2005-11-17
    • US10843805
    • 2004-05-12
    • Ira MillerBrett ThompsenEduardo Velarde
    • Ira MillerBrett ThompsenEduardo Velarde
    • G05F3/04G05F3/26
    • G05F3/267
    • A circuit (10, 100) is used to perform voltage regulation. In one embodiment, a voltage regulator (11) is used in conjunction with an output transistor (24) to form a circuit (10) which operates to regulate the voltage drop from a first node (30) to a second node (28). This second node (28) may be used to provide power to circuitry (27). The areas of several transistors (20-25) in circuit (10) may be adjusted so that negative and positive temperature coefficients may be balanced such that the circuit (10) behaves as desired over a range of voltages and temperatures. Note that in one embodiment, circuit (10) is a 2-terminal device.
    • 电路(10,100)用于执行电压调节。 在一个实施例中,电压调节器(11)与输出晶体管(24)结合使用以形成用于调节从第一节点(30)到第二节点(28)的电压降的电路(10)。 该第二节点(28)可用于向电路(27)提供电力。 可以调节电路(10)中的几个晶体管(20-25)的面积,使得负和正温度系数可以平衡,使得电路(10)在电压和温度的范围内按照期望的方式工作。 注意,在一个实施例中,电路(10)是2端子装置。
    • 10. 发明授权
    • Buck-boost control logic for PWM regulator
    • 用于PWM调节器的降压 - 升压控制逻辑
    • US07432689B2
    • 2008-10-07
    • US11429613
    • 2006-05-05
    • Ira G. MillerEduardo Velarde
    • Ira G. MillerEduardo Velarde
    • G05F1/62G05F1/595G05F3/16
    • H02M3/1582
    • A PWM regulator is operated either a buck mode or a boost mode depending on whether the input voltage is above or below the desired regulated output voltage. The technique uses two sawtooth ramps 180 degrees out of phase. Where the two ramps cross each other is a buck/boost transition level. An error voltage, corresponding to a required duty cycle to achieve a regulated voltage, is compared to the two ramps. The transition from one mode to the other occurs when the error voltage passes the buck/boost transition level of the two ramps. A logic circuit supplies PWM pulses to either buck switching transistors or the boost switching transistors in a power stage of the regulator, depending on the whether the error voltage is above or below the buck/boost transition level, to achieve the regulated voltage.
    • 根据输入电压是否高于或低于所需的稳压输出电压,PWM调节器工作在降压模式或升压模式。 该技术使用两个相位相差180度的锯齿形斜坡。 两个斜坡交叉的地方是降压/升压转换水平。 将对应于实现调节电压的所需占空比的误差电压与两个斜坡进行比较。 当错误电压通过两个斜坡的降压/升压转换电平时,从一种模式转换到另一种模式发生。 逻辑电路根据误差电压是否高于或低于降压/升压转换电平,在调节器的功率级中降压开关晶体管或升压开关晶体管,从而实现调节电压。