专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2015199682A1 TECHNIQUES FOR FORMING A COMPACTED ARRAY OF FUNCTIONAL CELLS 审中-公开
标题翻译：形成功能性细胞压制阵列的技术
公开(公告)号：WO2015199682A1
公开(公告)日：2015-12-30
申请号：PCT/US2014/044105
申请日：2014-06-25
申请人： INTEL CORPORATION , ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ASKSAMIT, Randy, J.
发明人： ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ASKSAMIT, Randy, J.
IPC分类号： H01L21/027 , H01L21/768
CPC分类号： H01L27/0207 , G06F17/5068 , H01L21/0274 , H01L21/0277 , H01L21/823475 , H01L27/11 , H01L27/11807 , H01L29/16 , H01L2027/11853 , H01L2027/11866 , H01L2027/11875 , H03K19/00
摘要： Techniques are disclosed for forming a compacted array of functional cells using next-generation lithography (NGL) processes, such as electron-beam direct write (EBDW) and extreme ultraviolet lithography (EUVL), to form the boundaries of the cells in the array. The compacted array of cells may be used for field-programmable gate array (FPGA) structures configured with logic cells, static random-access memory (SRAM) structures configured with bit cells, or other memory or logic devices having cell-based structures. The techniques can be used to gain a reduction in area of 10 to 50 percent, for example, for the array of functional cells, because the NGL processes allow for higher precision and closer cuts for the cell boundaries, as compared to conventional 193 nm photolithography. In addition, the use of NGL processes to form the boundaries for the cells may also reduce lithography induced variations that would otherwise be present with conventional 193 nm photolithography.
摘要翻译：公开了用于使用下一代光刻（NGL）工艺（例如电子束直写（EBDW）和极紫外光刻（EUVL））形成功能电池的压实阵列的技术，以形成阵列中的电池的边界。紧凑的单元阵列可以用于配置有逻辑单元，配置有位单元的静态随机存取存储器（SRAM）结构或具有基于单元的结构的其他存储器或逻辑器件的现场可编程门阵列（FPGA）结构。与常规的193nm光刻相比，这些技术可以用于获得10至50％的面积减少，例如对于功能单元阵列，因为NGL工艺允许更高的精度和更小的细胞边界切割。此外，使用NGL工艺来形成单元的边界也可以减少光刻引起的变化，否则将以传统的193nm光刻法存在。

2. 发明申请

WO2015199679A1 TECHNIQUES FOR FORMING INTEGRATED PASSIVE DEVICES 审中-公开
标题翻译：形成集成无源器件的技术
公开(公告)号：WO2015199679A1
公开(公告)日：2015-12-30
申请号：PCT/US2014/044101
申请日：2014-06-25
申请人： INTEL CORPORATION , ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ROY, Anshumali , YIP, Joseph, C.
发明人： ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ROY, Anshumali , YIP, Joseph, C.
IPC分类号： H01F17/00 , H01G4/32 , H01F41/04
CPC分类号： H01L23/66 , G03F7/2059 , H01F17/0006 , H01F41/042 , H01G4/012 , H01G4/40 , H01L28/10 , H01L28/60 , H01L2223/6672
摘要： Techniques are disclosed for forming integrated passive devices, such as inductors and capacitors, using next-generation lithography (NGL) processes, such as electron-beam direct write (EBDW) and extreme ultraviolet lithography (EUVL). The techniques can be used to form various different integrated passive devices, such as inductors (e.g., spiral inductors) and capacitors (e.g., metal finger capacitors), having higher density, precision, and quality factor (Q) values than if such devices were formed using 193 nm photolithography. The high Q and dense passive devices formed can be used in radio frequency (RF) and analog circuits to boost the performance of such circuits. The increased precision may be realized based on an improvement in, for example, line edge roughness (LER), achievable resolution/critical dimensions, sharpness of corners, and/or density of the formed structures.
摘要翻译：公开了使用诸如电子束直接写入（EBDW）和极紫外光刻（EUVL）的下一代光刻（NGL）工艺来形成诸如电感器和电容器的集成无源器件的技术。这些技术可以用于形成各种不同的集成无源器件，例如电感器（例如螺旋电感器）和电容器（例如，金属制电容器），其具有比如果这些器件的密度，精度和品质因数（Q）值更高的密度，精度和品质因数使用193nm光刻法形成。形成的高Q和致密无源器件可用于射频（RF）和模拟电路，以提高这种电路的性能。可以基于例如线边缘粗糙度（LER），可实现的分辨率/临界尺寸，拐角的锐度和/或形成的结构的密度的改进来实现提高的精度。

3. 发明公开

EP3161854A1 TECHNIQUES FOR FORMING A COMPACTED ARRAY OF FUNCTIONAL CELLS 审中-公开
标题翻译：法制造密度泛函单元的排列
公开(公告)号：EP3161854A1
公开(公告)日：2017-05-03
申请号：EP14896073.5
申请日：2014-06-25
申请人： Intel Corporation
发明人： ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ASKSAMIT, Randy, J.
IPC分类号： H01L21/027 , H01L21/768
CPC分类号： H01L27/0207 , G06F17/5068 , H01L21/0274 , H01L21/0277 , H01L21/823475 , H01L27/11 , H01L27/11807 , H01L29/16 , H01L2027/11853 , H01L2027/11866 , H01L2027/11875 , H03K19/00
摘要： Techniques are disclosed for forming a compacted array of functional cells using next-generation lithography (NGL) processes, such as electron-beam direct write (EBDW) and extreme ultraviolet lithography (EUVL), to form the boundaries of the cells in the array. The compacted array of cells may be used for field-programmable gate array (FPGA) structures configured with logic cells, static random-access memory (SRAM) structures configured with bit cells, or other memory or logic devices having cell-based structures. The techniques can be used to gain a reduction in area of 10 to 50 percent, for example, for the array of functional cells, because the NGL processes allow for higher precision and closer cuts for the cell boundaries, as compared to conventional 193 nm photolithography. In addition, the use of NGL processes to form the boundaries for the cells may also reduce lithography induced variations that would otherwise be present with conventional 193 nm photolithography.
摘要翻译：技术是圆盘游离缺失用于形成使用下一代光刻（NGL）的过程，：例如电子束直写（EBDW）和极紫外光刻（EUVL），以形成所述阵列中的单元的边界功能性细胞的压实的阵列。细胞的压实的阵列可用于现场可编程门阵列（FPGA）与逻辑单元配置的结构，静态随机存取存储器（SRAM）与位单元，或其它存储器或具有基于细胞的结构逻辑器件配置结构。的技术可以用来获得在10面积％至50％的降低，例如，对于功能单元的阵列，因为NGL工艺允许更高的精度和对小区边界更靠近切割，相比于传统的193nm光刻，此外，使用NGL工艺，以形成用于细胞因此可以减少光刻引起的变化，否则也将存在与常规的193nm的光刻法的边界。

4. 发明公开

EP3161840A1 TECHNIQUES FOR FORMING INTEGRATED PASSIVE DEVICES 审中-公开
标题翻译：形成集成无源器件的技术
公开(公告)号：EP3161840A1
公开(公告)日：2017-05-03
申请号：EP14895620.4
申请日：2014-06-25
申请人： Intel Corporation
发明人： ELSAYED, Rany, T. , GOEL, Niti , BOU-GHAZALE, Silvio, E. , ROY, Anshumali , YIP, Joseph, C.
IPC分类号： H01F17/00 , H01G4/32 , H01F41/04
CPC分类号： H01L23/66 , G03F7/2059 , H01F17/0006 , H01F41/042 , H01G4/012 , H01G4/40 , H01L28/10 , H01L28/60 , H01L2223/6672
摘要： Techniques are disclosed for forming integrated passive devices, such as inductors and capacitors, using next-generation lithography (NGL) processes, such as electron-beam direct write (EBDW) and extreme ultraviolet lithography (EUVL). The techniques can be used to form various different integrated passive devices, such as inductors (e.g., spiral inductors) and capacitors (e.g., metal finger capacitors), having higher density, precision, and quality factor (Q) values than if such devices were formed using 193 nm photolithography. The high Q and dense passive devices formed can be used in radio frequency (RF) and analog circuits to boost the performance of such circuits. The increased precision may be realized based on an improvement in, for example, line edge roughness (LER), achievable resolution/critical dimensions, sharpness of corners, and/or density of the formed structures.
摘要翻译：公开了使用诸如电子束直写（EBDW）和极紫外光刻（EUVL）的下一代光刻（NGL）工艺来形成诸如电感器和电容器的集成无源器件的技术。这些技术可用于形成各种不同的集成无源器件，例如电感器（例如螺旋电感器）和电容器（例如金属指状电容器），其密度，精度和品质因数（Q）值高于如果这样的器件是使用193纳米光刻法形成。所形成的高Q和密集无源器件可用于射频（RF）和模拟电路，以提高此类电路的性能。可以基于例如线边缘粗糙度（LER），可实现的分辨率/关键尺寸，拐角的锐度和/或所形成的结构的密度的改进来实现提高的精确度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式