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1. 发明申请

WO2013032809A1 ATOMIC LAYER DEPOSITION OF METAL OXIDE MATERIALS FOR MEMORY APPLICATIONS 审中-公开
标题翻译：用于存储器应用的金属氧化物材料的原子层沉积
公开(公告)号：WO2013032809A1
公开(公告)日：2013-03-07
申请号：PCT/US2012/051865
申请日：2012-08-22
申请人： INTERMOLECULAR, INC. , WANG, Yun , GOPAL, Vidyut , HASHIM, Imran , PRAMANIK, Dipankar , CHIANG, Tony
发明人： WANG, Yun , GOPAL, Vidyut , HASHIM, Imran , PRAMANIK, Dipankar , CHIANG, Tony
IPC分类号： H01L21/20 , B82Y40/00
CPC分类号： H01L45/145 , C23C16/40 , C23C16/45525 , H01L21/02175 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L27/2463 , H01L45/08 , H01L45/1266 , H01L45/146 , H01L45/1608 , H01L45/1616
摘要： Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.
摘要翻译：本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。设置在金属氧化物层之间的界面有助于氧空位移动。在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对准的晶界，其包含平行于电极界面延伸的许多晶界。因此，氧空缺在切换期间被捕获和释放，而空位明显损失。因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

2. 发明申请

WO2013043561A1 ATOMIC LAYER DEPOSITION OF HAFNIUM AND ZIRCONIUM OXIDES FOR MEMORY APPLICATIONS 审中-公开
标题翻译：用于存储器应用的铪和氧化锆的原子层沉积
公开(公告)号：WO2013043561A1
公开(公告)日：2013-03-28
申请号：PCT/US2012/055851
申请日：2012-09-18
申请人： INTERMOLECULAR, INC. , WANG, Yun , GOPAL, Vidyut , HASHIM, Imran , PRAMANIK, Dipankar , CHIANG, Tony
发明人： WANG, Yun , GOPAL, Vidyut , HASHIM, Imran , PRAMANIK, Dipankar , CHIANG, Tony
IPC分类号： H01L21/20
CPC分类号： H01L45/146 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/1616
摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack having a metal oxide buffer layer disposed on or over a metal oxide bulk layer. The metal oxide bulk layer contains a metal-rich oxide material and the metal oxide buffer layer contains a metal-poor oxide material. The metal oxide bulk layer is less electrically resistive than the metal oxide buffer layer since the metal oxide bulk layer is less oxidized or more metallic than the metal oxide buffer layer. In one example, the metal oxide bulk layer contains a metal- rich hafnium oxide material and the metal oxide buffer layer contains a metal-poor zirconium oxide material.
摘要翻译：本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其具有设置在金属氧化物本体层上或其上的金属氧化物缓冲层。金属氧化物本体层含有富金属氧化物材料，金属氧化物缓冲层含有贫金属氧化物。由于金属氧化物本体层比金属氧化物缓冲层氧化较少或更金属，所以金属氧化物本体层的电阻小于金属氧化物缓冲层的电阻。在一个实例中，金属氧化物本体层含有富含金属的氧化铪材料，金属氧化物缓冲层含有贫金属氧化锆材料。

3. 发明申请

WO2009134677A2 REDUCTION OF FORMING VOLTAGE IN SEMICONDUCTOR DEVICES 审中-公开
标题翻译：减少半导体器件中的成形电压
公开(公告)号：WO2009134677A2
公开(公告)日：2009-11-05
申请号：PCT/US2009/041582
申请日：2009-04-23
申请人： INTERMOLECULAR, INC. , WANG, Yun , KUMAR, Pragati , CHIANG, Tony, P. , PHATAK, Prashant
发明人： WANG, Yun , KUMAR, Pragati , CHIANG, Tony, P. , PHATAK, Prashant
IPC分类号： G11C5/14 , G11C16/00 , H01L27/115
CPC分类号： H01L45/146 , G11C13/0002 , G11C2013/0083 , G11C2213/51 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/1625 , H01L45/1641
摘要： This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (RRAM) that use techniques to provide a memory device with more predictable operation. In particular, forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or through the use of an anneal in a reducing environment. One or more of these techniques may be applied, depending on desired application and results.
摘要翻译：本公开提供了一种非易失性存储器件及相关的制造和操作方法。该设备可以包括使用技术来向存储器设备提供更可预测的操作的一个或多个电阻随机存取存储器（RRAM）。特别地，可以通过使用阻挡层，反极性形成电压脉冲，形成电压脉冲（其中电子从下功能电极注入）或通过使用退火进行退火来降低特定设计所需的形成电压减少环境。可以根据期望的应用和结果应用这些技术中的一种或多种。

5. 发明公开

EP2669174A1 LARGE-SIZE FLOATING STATE MANUFACTURING METHOD FOR MARINE ENGINEERING EQUIPMENT 审中-公开
标题翻译： GROSSANGELEGTES HERSTELLUNGSVERFAHREN IM SCHWIMMENDEN ZUSTANDFÜRSCHIFFSMASCHINENBAU
公开(公告)号：EP2669174A1
公开(公告)日：2013-12-04
申请号：EP11875748.3
申请日：2011-12-16
申请人： Jiangsu University , Wang, Fei , Wang, Yun , Gu, Yongyu , Cui, Chengyun , Tong, Yanqun
发明人： WANG, Fei , WANG, Yun , GU, Yongyu , CUI, Chengyun , TONG, Yanqun , ZHANG, Yongkang , ZHANG, Chaoyang
IPC分类号： B63B9/06
CPC分类号： B63B9/065
摘要： A large-size floating state manufacturing method for marine engineering equipment comprises: using a submersible long working platform (5) as a floating platform for constructing marine engineering equipment, each section of a bottom layer block (1) being carried and integrated on the working platform; submerging the submersible long working platform (5) after the bottom layer block (1) is constructed, so as to use the buoyancy of water to make the bottom layer block (1) be separated from the working platform (5) and go into the water; and then, using the bottom layer block (1) as the floating platform, and constructing a main hull (2, 3) and a deck (4) of the marine engineering platform and performing outfitting thereon. In the method, manufacturing is performed in sections in allowance-free sectional construction manner on the floating working platform, and then superposition is performed layer by layer; in the manufacturing process, dynamic measurement and anti-deformation control technologies are adopted, so as to ensure quality and precision of floating state manufacturing, and finally realize construction of large-scale marine engineering equipment.
摘要翻译：海洋工程设备的大型浮式制造方法包括：使用潜水长工作平台（5）作为构建海洋工程设备的浮动平台，底层块（1）的每个部分承载并整合在工作中平台; 在底层块（1）构造后，浸没潜水长工作平台（5），以利用水的浮力使底层块（1）与工作平台（5）分离，并进入水; 然后使用底层块（1）作为浮动平台，并构建海洋工程平台的主船体（2,3）和甲板（4），并对其进行装备。在该方法中，在浮动工作平台上以无余量的构造方式进行制造，然后逐层叠加; 在制造过程中，采取动态测量和抗变形控制技术，确保浮式制造的质量和精度，最终实现大型海洋工程设备的建设。

6. 发明申请

WO2014159629A1 CONFINED DEFECT PROFILING WITHIN RESISTIVE RANDOM MEMORY ACCESS CELLS 审中-公开
标题翻译：在电阻随机存储器访问单元中进行限制缺陷分析
公开(公告)号：WO2014159629A1
公开(公告)日：2014-10-02
申请号：PCT/US2014/024500
申请日：2014-03-12
申请人： KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC , INTERMOLECULAR, INC.
发明人： WANG, Yun , GOPAL, Vidyut , HSUEH, Chien-Lan
IPC分类号： H01L45/00
CPC分类号： H01L45/10 , G11C13/0002 , G11C13/0007 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/71 , G11C2213/77 , H01L45/08 , H01L45/1253 , H01L45/1266 , H01L45/145 , H01L45/146 , H01L45/1616 , H01L45/1625 , H01L45/1641
摘要： Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A stack including a defect source layer, a defect blocking layer, and a defect acceptor layer disposed between the defect source layer and the defect blocking layer may be subjected to annealing. During the annealing, defects are transferred in a controllable manner from the defect source layer to the defect acceptor layer. At the same time, the defects are not transferred into the defect blocking layer thereby creating a lowest concentration zone within the defect acceptor layer. This zone is responsible for resistive switching. The precise control over the size of the zone and the defect concentration within the zone allows substantially improvement of resistive switching characteristics of the ReRAM cell. In some embodiments, the defect source layer includes aluminum oxynitride, the defect blocking layer includes titanium nitride, and the defect acceptor layer includes aluminum oxide.
摘要翻译：提供了电阻随机存取存储器（ReRAM）单元及其制造方法。可以对包括缺陷源层，缺陷阻挡层和设置在缺陷源层和缺陷阻挡层之间的缺陷受主层的堆叠进行退火。在退火过程中，缺陷以可控的方式从缺陷源层转移到缺陷受体层。同时，缺陷不会转移到缺陷阻挡层中，从而在缺陷受体层内形成最低浓度区。该区域负责电阻交换。精确控制区域的尺寸和区域内的缺陷浓度允许ReRAM单元的电阻开关特性得到显着改善。在一些实施例中，缺陷源层包括氮氧化铝，缺陷阻挡层包括氮化钛，缺陷受主层包括氧化铝。

7. 发明申请

WO2014043630A1 EMBEDDED NONVOLATILE MEMORY ELEMENTS HAVING RESISTIVE SWITCHING CHARACTERISTICS 审中-公开
标题翻译：嵌入式非易失性存储器元件具有电阻开关特性
公开(公告)号：WO2014043630A1
公开(公告)日：2014-03-20
申请号：PCT/US2013/059963
申请日：2013-09-16
申请人： INTERMOLECULAR, INC
发明人： HASHIM, Imran , CHIANG, Tony , GOPAL, Vidyut , WANG, Yun
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , G11C13/0007 , G11C13/0069 , G11C2213/32 , G11C2213/51 , G11C2213/52 , G11C2213/74 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： Provided are nonvolatile memory assemblies each including a resistive switching layer and current steering element. The steering element may be a transistor connected in series with the switching layer. Resistance control provided by the steering element allows using switching layers requiring low switching voltages and currents. Memory assemblies including such switching layers are easier to embed into integrated circuit chips having other low voltage components, such as logic and digital signal processing components, than, for example, flash memory requiring much higher switching voltages. In some embodiments, provided nonvolatile memory assemblies operate at switching voltages less than about 3.0V and corresponding currents less than 50 microamperes. A memory element may include a metal rich hafnium oxide disposed between a titanium nitride electrode and doped polysilicon electrode. One electrode may be connected to a drain or source of the transistor, while another electrode is connected to a signal line.
摘要翻译：提供了各自包括电阻式开关层和电流控制元件的非易失性存储器组件。转向元件可以是与开关层串联连接的晶体管。由转向元件提供的电阻控制允许使用需要低开关电压和电流的开关层。包括这种开关层的存储器组件比例如需要高得多的开关电压的闪速存储器更容易嵌入到具有其它低电压组件（例如逻辑和数字信号处理组件）的集成电路芯片中。在一些实施例中，所提供的非易失性存储器组件在小于约3.0V的开关电压和小于50微安的相应电流下工作。存储元件可以包括设置在氮化钛电极和掺杂多晶硅电极之间的富含金属的氧化铪。一个电极可以连接到晶体管的漏极或源极，而另一个电极连接到信号线。

8. 发明申请

WO2013089940A1 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A METAL NITRIDE CONTAINING SWITCHING LAYER 审中-公开
标题翻译：带有金属氮化物的非易失性电阻记忆元件包含切换层
公开(公告)号：WO2013089940A1
公开(公告)日：2013-06-20
申请号：PCT/US2012/063513
申请日：2012-11-05
申请人： INTERMOLECULAR, INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： WANG, Yun , CHIANG, Tony P. , HASHIM, Imran , MINVIELLE, Tim , YAMAGUCHI, Takeshi
IPC分类号： H01L47/02 , H01L49/02 , H01L29/94
CPC分类号： H01L45/145 , B82Y10/00 , H01L27/2409 , H01L27/2463 , H01L45/10 , H01L45/1233 , H01L45/147 , H01L45/1608
摘要： A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.
摘要翻译：非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

9. 发明申请

WO2011002832A1 BIOMASS HYDROLYSIS PROCESS 审中-公开
标题翻译：生物质水解过程
公开(公告)号：WO2011002832A1
公开(公告)日：2011-01-06
申请号：PCT/US2010/040518
申请日：2010-06-30
申请人： NOVOZYMES A/S , NOVOZYMES NORTH AMERICA, INC. , REN, Haiyu , HUANG, Hong, Zhi , WANG, Yun , HIGGINS, Don
发明人： REN, Haiyu , HUANG, Hong, Zhi , WANG, Yun , HIGGINS, Don
IPC分类号： C12N1/22 , C12P7/10 , C12P19/02 , C12P19/14
CPC分类号： C12P7/10 , C12N1/22 , C12P19/02 , C12P19/14 , Y02E50/16 , Y02E50/343
摘要： The invention relates to a biomass process comprising removal and/or inactivation of an enzyme inhibitor from recycled washing solution.
摘要翻译：本发明涉及生物质过程，其包括从再循环的洗涤溶液中除去和/或灭活酶抑制剂。

10. 发明申请

WO2007016808A1 A COMPILING AND TRANSLATING METHOD AND APPARATUS 审中-公开
标题翻译：编译和翻译方法和装置
公开(公告)号：WO2007016808A1
公开(公告)日：2007-02-15
申请号：PCT/CN2005/001204
申请日：2005-08-05
申请人： INTEL CORPORATION , LI, Jianhui , WANG, Yun , HUANG, Bo , LE, Yongnian , LIU, Jiangning , YE, Jinyun
发明人： LI, Jianhui , WANG, Yun , HUANG, Bo , LE, Yongnian , LIU, Jiangning , YE, Jinyun
IPC分类号： G06F9/45
CPC分类号： G06F8/447
摘要： Methods and apparatus are described to compile and translate source code. In some embodiments, source code is compiled into source binary code for a source platform; an annotation section associated with the source binary code is generated, wherein the annotation section comprises an annotation for a scope, the scope comprising at least one dock of the source binary code having at least one attribute to aid a translator optimization. If the scope comprises a plurality of blocks, the blocks have consecutive addresses with each other and have the at least one attribute in common. In the embodiments, the source binary code is further translated into target binary code for a target platform by utilizing the annotation section.
摘要翻译：描述了编译和翻译源代码的方法和设备。在一些实施例中，源代码被编译为源平台的源二进制代码; 生成与源二进制代码相关联的注释部分，其中注释部分包括范围的注释，所述范围包括具有至少一个属性的源二进制代码的至少一个基座，以帮助翻译器优化。如果范围包括多个块，则这些块具有彼此的连续地址并具有共同的至少一个属性。在实施例中，源二进制码通过利用注释部分进一步转换为目标平台的目标二进制代码。

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