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1. 发明申请

US20130099240A1 THIN FILM TRANSISTOR, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20130099240A1
公开(公告)日：2013-04-25
申请号：US13650528
申请日：2012-10-12
申请人： Hyun-Jung LEE , Sung-Haeng CHO , Woo-Geun LEE , Jang-Hoon HA , Hee-Jun BYEON , Ji-Yun HONG , Ji-Soo OH
发明人： Hyun-Jung LEE , Sung-Haeng CHO , Woo-Geun LEE , Jang-Hoon HA , Hee-Jun BYEON , Ji-Yun HONG , Ji-Soo OH
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L29/78693 , H01L27/1225 , H01L29/41733 , H01L29/78606 , H01L29/7869
摘要： A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

2. 发明申请

US20110168997A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US20110168997A1
公开(公告)日：2011-07-14
申请号：US13006591
申请日：2011-01-14
申请人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/124 , H01L21/76834 , H01L27/1225 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L29/7869 , H01L29/78693
摘要： A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
摘要翻译：提供薄膜晶体管（TFT）阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线，包括栅极线和栅电极，设置在栅电极上的氧化物半导体层图案，设置在氧化物半导体层图案上的数据线，并且包括源电极和薄膜晶体管（TFT）的漏电极和栅电极以及沿着与栅极线交叉的方向延伸的数据线，以及蚀刻停止图案，设置在源极/漏极之间形成TFT的区域，以及氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。

3. 发明申请

US20120037906A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US20120037906A1
公开(公告)日：2012-02-16
申请号：US13115088
申请日：2011-05-24
申请人： Hye-Young RYU , Woo-Geun LEE , Young-Joo CHOI , Kyoung-Jae CHUNG , Jin-Won LEE , Seung-Ha CHOI , Hee-Jun BYEON , Pil-Sang YUN
发明人： Hye-Young RYU , Woo-Geun LEE , Young-Joo CHOI , Kyoung-Jae CHUNG , Jin-Won LEE , Seung-Ha CHOI , Hee-Jun BYEON , Pil-Sang YUN
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L27/1214 , H01L27/1225 , H01L27/1255
摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.
摘要翻译：提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案图案，以及形成在防蚀刻图案上的源电极和漏电极。氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

4. 发明申请

US20110272696A1 THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF 有权
标题翻译：薄膜晶体管面板及其制作方法
公开(公告)号：US20110272696A1
公开(公告)日：2011-11-10
申请号：US13092882
申请日：2011-04-22
申请人： Hye-Young RYU , Jin-Won LEE , Woo-Geun LEE , Hee-Jun BYEON , Xun ZHU
发明人： Hye-Young RYU , Jin-Won LEE , Woo-Geun LEE , Hee-Jun BYEON , Xun ZHU
IPC分类号： H01L29/786 , H01L33/08 , H01L21/44
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L27/1248 , H01L27/3272 , H01L51/5253 , H01L2227/323
摘要： A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.
摘要翻译：薄膜晶体管面板包括基板，基板上的阻光层，遮光层上的第一保护膜，第一保护膜上的第一电极和第二电极，第一保护膜的一部分上的氧化物半导体层在第一电极和第二电极之间暴露的保护膜，绝缘层，与氧化物半导体层重叠的绝缘层和绝缘层上的第四电极。遮光层包括第一侧壁，并且第一保护膜包括第二侧壁。第一和第二侧壁沿着基本相同的线设置。

5. 发明申请

US20120018720A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US20120018720A1
公开(公告)日：2012-01-26
申请号：US13177783
申请日：2011-07-07
申请人： Jae-Woo PARK , Dong-Hoon LEE , Sung-Haeng CHO , Woo-Geun LEE , Hye-Young RYU , Young-Joo CHOI
发明人： Jae-Woo PARK , Dong-Hoon LEE , Sung-Haeng CHO , Woo-Geun LEE , Hye-Young RYU , Young-Joo CHOI
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/458
摘要： A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.
摘要翻译：显示基板包括在基底基板上沿第一方向延伸的栅极线，在基底基板上的数据线，并且沿与第一方向交叉的第二方向延伸，栅极线上的栅极绝缘层，薄膜晶体管和像素电极。薄膜晶体管包括栅电极，电极连接栅极线，氧化物半导体图案以及氧化物半导体图案上的源电极和漏电极并彼此间隔开。氧化物半导体图案包括包括氧化铟的第一半导体图案和包含无铟氧化物的第二半导体图案。像素电极与漏电极电连接。

6. 发明申请

US20120286259A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20120286259A1
公开(公告)日：2012-11-15
申请号：US13431448
申请日：2012-03-27
申请人： Jae-Woo PARK , Dong-Hoon LEE , Sung-Haeng CHO , Woo-Geun LEE , Kap-Soo YOON
发明人： Jae-Woo PARK , Dong-Hoon LEE , Sung-Haeng CHO , Woo-Geun LEE , Kap-Soo YOON
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1288 , H01L29/66969
摘要： Exemplary embodiments of the present invention provide a display substrate including a gate electrode, an oxide semiconductor pattern, a source electrode, a drain electrode, and an etch stop pattern. The gate electrode may be disposed on a base substrate. The oxide semiconductor pattern may be disposed over the gate electrode. The source electrode may be disposed on the oxide semiconductor pattern. The drain electrode may be disposed on the oxide semiconductor pattern and spaced apart from the source electrode. The etch stop pattern may be disposed over the gate electrode, the etch stop pattern may be overlapping a space between the source electrode and the drain electrode and may include a metal oxide. The reliability of the display substrate may, therefore, be improved.
摘要翻译：本发明的示例性实施例提供了包括栅电极，氧化物半导体图案，源电极，漏电极和蚀刻停止图案的显示基板。栅电极可以设置在基底基板上。氧化物半导体图案可以设置在栅极上。源极可以设置在氧化物半导体图案上。漏极可以设置在氧化物半导体图案上并与源电极间隔开。蚀刻停止图案可以设置在栅电极之上，蚀刻停止图案可以与源电极和漏电极之间的空间重叠，并且可以包括金属氧化物。因此，可以提高显示基板的可靠性。

7. 发明申请

US20120211753A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权
标题翻译：显示基板和制造显示基板的方法
公开(公告)号：US20120211753A1
公开(公告)日：2012-08-23
申请号：US13328658
申请日：2011-12-16
申请人： Ki-Won KIM , Je-Hun LEE , Sung-Haeng CHO , Woo-Geun LEE , Kap-Soo YOON , Do-Hyun KIM , Seung-Ha CHOI
发明人： Ki-Won KIM , Je-Hun LEE , Sung-Haeng CHO , Woo-Geun LEE , Kap-Soo YOON , Do-Hyun KIM , Seung-Ha CHOI
IPC分类号： H01L29/786 , H01L21/336 , H01L33/00
CPC分类号： H01L27/1225 , H01L27/1288
摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.
摘要翻译：在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。数据线沿着基底基板上的方向延伸。通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。通道图案与输入电极和输出电极上的输出电极接触。绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

8. 发明申请

US20110227063A1 THIN-FILM TRANSISTOR, METHOD OF FABRICATING THE THIN-FILM TRANSISTOR, AND DISPLAY SUBSTRATE USING THE THIN-FILM TRANSISTOR 有权
标题翻译：薄膜晶体管，薄膜晶体管的制造方法和使用薄膜晶体管显示衬底
公开(公告)号：US20110227063A1
公开(公告)日：2011-09-22
申请号：US13046130
申请日：2011-03-11
申请人： Pil-Sang YUN , Young-Wook LEE , Woo-Geun LEE
发明人： Pil-Sang YUN , Young-Wook LEE , Woo-Geun LEE
IPC分类号： H01L29/786 , H01L33/00
CPC分类号： H01L21/467 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/7869
摘要： Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
摘要翻译：提供了可以通过简单的处理来提高显示装置的显示质量的氧化物薄膜晶体管（TFT）基板及其制造方法。氧化物TFT基板包括：基板，栅极线，数据线，氧化物TFT和像素电极。氧化物TFT的氧化物层包括具有半导体特性的第一区域和沟道，以及导电并围绕第一区域的第二区域。第一区域的一部分电连接到像素电极，并且第二区域电连接到数据线。

9. 发明申请

US20100065841A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US20100065841A1
公开(公告)日：2010-03-18
申请号：US12555824
申请日：2009-09-09
申请人： Je-Hun LEE , Ki-Won KIM , Do-Hyun KIM , Woo-Geun LEE , Kap-Soo YOON
发明人： Je-Hun LEE , Ki-Won KIM , Do-Hyun KIM , Woo-Geun LEE , Kap-Soo YOON
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在半导体氧化物层和栅电极。栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。

10. 发明申请

US20080299712A1 MANUFACTURING METHOD OF A THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
标题翻译：薄膜晶体管阵列的制造方法
公开(公告)号：US20080299712A1
公开(公告)日：2008-12-04
申请号：US12192531
申请日：2008-08-15
申请人： Woo-Geun LEE , Hye-Young RYU , Sang-Gab KIM , Jang-Soo KIM
发明人： Woo-Geun LEE , Hye-Young RYU , Sang-Gab KIM , Jang-Soo KIM
IPC分类号： H01L21/336
CPC分类号： H01L27/1288 , H01L21/32134 , H01L21/76838 , H01L27/1214 , H01L29/66765
摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion.
摘要翻译：制造薄膜晶体管阵列面板的方法包括：形成包括栅电极的栅极线，在栅极线上形成栅绝缘层，在栅绝缘层上形成半导体条; 在半导体条上形成欧姆接触，在欧姆接触上形成包括源电极和漏电极的数据线，在数据线和漏电极上沉积钝化层，并形成连接到漏电极的像素电极。数据线和漏电极，欧姆接触和半导体条纹的形成包括在栅绝缘层上沉积本征硅层，非本征硅层和导体层，形成光致抗蚀剂，其包括对应于源极电极和漏极电极之间的沟道区域，以及对应于数据线和漏极电极的导线区域的第一部分，其中第一部分比第二部分厚，蚀刻对应于剩余区域的导体层除了使用光致抗蚀剂作为蚀刻掩模的导线和沟道区域之外，去除第二部分以暴露沟道区域上的导体层，蚀刻剩余区域上的本征硅层和非本征硅层，蚀刻导体层和在通道区域上的非本征硅层，以及去除第一部分。

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