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1. 发明申请

US20130267073A1 Method of Manufacturing Fin Field Effect Transistor 审中-公开
标题翻译：制造鳍场效应晶体管的方法
公开(公告)号：US20130267073A1
公开(公告)日：2013-10-10
申请号：US13577252
申请日：2012-06-07
申请人： Huaxiang Yin , Wei He , Huicai Zhong , Chao Zhao , Dapeng Chen
发明人： Huaxiang Yin , Wei He , Huicai Zhong , Chao Zhao , Dapeng Chen
IPC分类号： H01L21/336
CPC分类号： H01L21/823431 , H01L21/845 , H01L29/66795 , H01L29/785
摘要： The present invention discloses a method of manufacturing a fin field effect transistor, which comprises the steps of forming a plurality of first fin structures on a substrate, which extend along a first direction parallel to the substrate; forming a plurality of second fin structures on a substrate, which extend along a second direction parallel to the substrate and the second direction intersecting with the first direction; selectively removing a part of the second fin structures to form a plurality of gate lines; and selectively removing a part of the first fin structures to form a plurality of substrate lines. In the method of manufacturing a fin field effect transistor according to the present invention, the gate lines and substrate lines are formed simultaneously by first making uniform silicon wing lines and gate wing lines using a limiting photolithography patternizing technique and then performing a centralized cutting of the corresponding specific regions, thereby increasing uniformity and reducing process difficulty and cost.
摘要翻译：本发明公开了一种制造鳍状场效应晶体管的方法，其特征在于包括以下步骤：沿着平行于衬底的第一方向延伸的衬底上形成多个第一鳍结构; 在基板上形成多个第二翅片结构，所述第二鳍结构沿着平行于所述基板的第二方向延伸并且所述第二方向与所述第一方向相交; 选择性地去除所述第二鳍结构的一部分以形成多个栅极线; 以及选择性地去除所述第一鳍结构的一部分以形成多条基片线。在根据本发明的鳍状场效应晶体管的制造方法中，通过首先使用限制光刻图案化技术首先制造均匀的硅翼线和栅翼线，然后进行集中切割，同时形成栅极线和衬底线相应的特定区域，从而增加均匀性，降低工艺难度和成本。

2. 发明授权

US08946071B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08946071B2
公开(公告)日：2015-02-03
申请号：US14364950
申请日：2012-03-23
申请人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
发明人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
IPC分类号： H01L21/00 , H01L21/8238 , H01L21/84 , H01L29/417 , H01L29/45
CPC分类号： H01L21/823814 , H01L21/2255 , H01L21/28518 , H01L21/823418 , H01L21/823443 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L29/41725 , H01L29/45 , H01L29/456 , H01L29/665
摘要： The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a substrate; forming a source/drain region and a gate sidewall spacer at both sides of the gate stacked structure; depositing a Nickel-based metal layer at least in the source/drain region; performing a first annealing so that the silicon in the source/drain region reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase metal silicide is transformed into a Nickel-based metal silicide, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide and the source/drain region. The method according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH of the metal-semiconductor contact between the Nickel-based metal silica and the source/drain region is effectively reduced, the contact resistance is decreased, and the driving capability of the device is improved.
摘要翻译：本发明公开了一种半导体器件的制造方法，包括：在基板上形成栅叠层结构; 在栅极层叠结构的两侧形成源极/漏极区域和栅极侧壁间隔物; 至少在源/漏区中沉积镍基金属层; 进行第一退火，使得源极/漏极区中的硅与镍基金属层反应形成金属硅化物的富Ni相; 通过将掺杂离子注入到金属硅化物的富Ni相中来进行离子注入; 进行第二退火，使富Ni相的金属硅化物转变为镍系金属硅化物，同时在镍基金属硅化物与源极/漏极区之间的界面处形成掺杂离子的偏析区域。根据本发明的方法在将掺杂离子注入到金属硅化物的富Ni相中之后执行退火，从而提高掺杂离子的固溶度并形成高度浓缩的掺杂离子的偏析区，因此SBH 镍基金属二氧化硅和源极/漏极区域之间的金属 - 半导体接触被有效地降低，接触电阻降低，并且器件的驱动能力得到改善。

3. 发明授权

US08987127B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08987127B2
公开(公告)日：2015-03-24
申请号：US14361944
申请日：2012-03-23
申请人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
发明人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
IPC分类号： H01L21/00 , H01L21/28 , H01L29/66 , H01L29/78 , H01L21/283
CPC分类号： H01L21/28097 , H01L21/283 , H01L29/66477 , H01L29/665 , H01L29/6659 , H01L29/66772 , H01L29/7833
摘要： The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a silicic substrate; depositing a Nickel-based metal layer on the substrate and the gate stacked structure; performing a first annealing so that the silicon in the substrate reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase of metal to silicide is transformed into a Nickel-based metal silicide source/drain, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide source/drain and the substrate. The method for manufacturing the semiconductor device according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH between the Nickel-based metal silicide and the silicon channel is effectively reduced, and the driving capability of the device is improved.
摘要翻译：本发明公开了一种制造半导体器件的方法，包括：在硅衬底上形成栅层叠结构; 在基板上沉积镍基金属层和栅极堆叠结构; 进行第一退火，使得衬底中的硅与镍基金属层反应形成金属硅化物的富Ni相; 通过将掺杂离子注入到金属硅化物的富Ni相中来进行离子注入; 进行第二退火，使得金属与硅化物的富Ni相转变为镍基金属硅化物源极/漏极，同时在镍基金属硅化物源之间的界面处形成掺杂离子的偏析区域 /漏极和衬底。根据本发明的制造半导体器件的方法在将掺杂离子注入到金属硅化物的富Ni相中之后进行退火，从而提高掺杂离子的固溶度并形成高浓度掺杂离子的偏析区域，因此有效地降低了镍基金属硅化物与硅通道之间的SBH，提高了器件的驱动能力。

4. 发明申请

US20140302644A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20140302644A1
公开(公告)日：2014-10-09
申请号：US14361944
申请日：2012-03-23
申请人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
发明人： Jun Luo , Chao Zhao , Huicai Zhong , Junfeng Li , Dapeng Chen
IPC分类号： H01L21/28 , H01L21/283 , H01L29/66
CPC分类号： H01L21/28097 , H01L21/283 , H01L29/66477 , H01L29/665 , H01L29/6659 , H01L29/66772 , H01L29/7833
摘要： The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a silicic substrate; depositing a Nickel-based metal layer on the substrate and the gate stacked structure; performing a first annealing so that the silicon in the substrate reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase of metal to silicide is transformed into a Nickel-based metal silicide source/drain, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide source/drain and the substrate. The method for manufacturing the semiconductor device according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH between the Nickel-based metal silicide and the silicon channel is effectively reduced, and the driving capability of the device is improved.
摘要翻译：本发明公开了一种制造半导体器件的方法，包括：在硅衬底上形成栅层叠结构; 在基板上沉积镍基金属层和栅极堆叠结构; 进行第一退火，使得衬底中的硅与镍基金属层反应形成金属硅化物的富Ni相; 通过将掺杂离子注入到金属硅化物的富Ni相中来进行离子注入; 进行第二退火，使得金属与硅化物的富Ni相转变为镍基金属硅化物源极/漏极，同时在镍基金属硅化物源之间的界面处形成掺杂离子的偏析区域 /漏极和衬底。根据本发明的制造半导体器件的方法在将掺杂离子注入到金属硅化物的富Ni相中之后进行退火，从而提高掺杂离子的固溶度并形成高浓度掺杂离子的偏析区域，因此有效地降低了镍基金属硅化物与硅通道之间的SBH，提高了器件的驱动能力。

5. 发明授权

US08846488B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08846488B2
公开(公告)日：2014-09-30
申请号：US13578598
申请日：2011-11-30
申请人： Qingqing Liang , Huaxiang Yin , Huicai Zhong , Huilong Zhu
发明人： Qingqing Liang , Huaxiang Yin , Huicai Zhong , Huilong Zhu
IPC分类号： H01L21/76 , H01L29/78 , H01L21/762 , H01L21/265
CPC分类号： H01L21/76224 , H01L21/26506 , H01L29/7842 , H01L29/7847
摘要： The invention relates to a semiconductor device and a method for manufacturing such a semiconductor device. A semiconductor device according to an embodiment of the invention may comprise: a substrate; a device region located on the substrate; and at least one stress introduction region separated from the device region by an isolation structure, with stress introduced into at least a portion of the at least one stress introduction region, wherein the stress introduced into the at least a portion of the at least one stress introduction region is produced by utilizing laser to illuminate an amorphized portion comprised in the at least one stress introduction region to recrystallize the amorphized portion. The semiconductor device according to an embodiment of the invention produces stress in a simpler manner and thereby improves the performance of the device.
摘要翻译：本发明涉及半导体器件及其制造方法。根据本发明的实施例的半导体器件可以包括：衬底; 位于所述基板上的器件区域; 以及至少一个应力引入区域，其通过隔离结构从所述器件区域分离，其中所述应力引入所述至少一个应力引入区域的至少一部分，其中所述应力引入所述至少一个应力的至少一部分引入区域通过利用激光照射包含在至少一个应力导入区域中的非晶化部分以使非晶化部分重结晶而产生。根据本发明的实施例的半导体器件以更简单的方式产生应力，从而提高器件的性能。

6. 发明申请

US20130093041A1 Semiconductor Device and Method for Manufacturing the Same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20130093041A1
公开(公告)日：2013-04-18
申请号：US13578598
申请日：2011-11-30
申请人： Qingqing Liang , Huaxiang Yin , Huicai Zhong , Huilong Zhu
发明人： Qingqing Liang , Huaxiang Yin , Huicai Zhong , Huilong Zhu
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L21/76224 , H01L21/26506 , H01L29/7842 , H01L29/7847
摘要： The invention relates to a semiconductor device and a method for manufacturing such a semiconductor device. A semiconductor device according to an embodiment of the invention may comprise: a substrate; a device region located on the substrate; and at least one stress introduction region separated from the device region by an isolation structure, with stress introduced into at least a portion of the at least one stress introduction region, wherein the stress introduced into the at least a portion of the at least one stress introduction region is produced by utilizing laser to illuminate an amorphized portion comprised in the at least one stress introduction region to recrystallize the amorphized portion. The semiconductor device according to an embodiment of the invention produces stress in a simpler manner and thereby improves the performance of the device.
摘要翻译：本发明涉及半导体器件及其制造方法。根据本发明的实施例的半导体器件可以包括：衬底; 位于所述基板上的器件区域; 以及至少一个应力引入区域，其通过隔离结构从所述器件区域分离，其中所述应力引入所述至少一个应力引入区域的至少一部分，其中所述应力引入所述至少一个应力的至少一部分引入区域通过利用激光照射包含在至少一个应力导入区域中的非晶化部分以使非晶化部分重结晶而产生。根据本发明的实施例的半导体器件以更简单的方式产生应力，从而提高器件的性能。

7. 发明授权

US09070719B2 Semiconductor device structure, method for manufacturing the same, and method for manufacturing Fin 有权
标题翻译：半导体装置结构及其制造方法以及制造方法
公开(公告)号：US09070719B2
公开(公告)日：2015-06-30
申请号：US13577942
申请日：2011-11-18
申请人： Huicai Zhong , Qingqing Liang , Jun Luo , Chao Zhao
发明人： Huicai Zhong , Qingqing Liang , Jun Luo , Chao Zhao
IPC分类号： H01L21/762 , H01L21/336 , H01L29/78 , H01L29/66 , H01L21/8234 , H01L21/8238 , H01L29/06 , H01L21/84
CPC分类号： H01L29/66795 , H01L21/823431 , H01L21/823481 , H01L21/823821 , H01L21/823878 , H01L21/845 , H01L29/0649 , H01L29/66545 , H01L29/785
摘要： A semiconductor device structure, a method for manufacturing the same, and a method for manufacturing a semiconductor fin are disclosed. In one embodiment, the method for manufacturing the semiconductor device structure comprises: forming a fin in a first direction on a semiconductor substrate; forming a gate line in a second direction, the second direction crossing the first direction on the semiconductor substrate, and the gate line intersecting the fin with a gate dielectric layer sandwiched between the gate line and the fin; forming a dielectric spacer surrounding the gate line; and performing inter-device electrical isolation at a predetermined position, wherein isolated portions of the gate line form independent gate electrodes of respective devices.
摘要翻译：公开了一种半导体器件结构，其制造方法和半导体鳍片的制造方法。在一个实施例中，制造半导体器件结构的方法包括：在半导体衬底上沿第一方向形成翅片; 在第二方向上形成栅极线，在半导体衬底上与第一方向交叉的第二方向和与鳍状物交叉的栅极线与夹在栅极线和鳍之间的栅极电介质层形成栅极线; 形成围绕所述栅极线的介电隔离层; 以及在预定位置执行器件间电隔离，其中所述栅极线的隔离部分形成各个器件的独立栅电极。

8. 发明授权

US09024435B2 Semiconductor device, formation method thereof, and package structure 有权
标题翻译：半导体器件，其形成方法和封装结构
公开(公告)号：US09024435B2
公开(公告)日：2015-05-05
申请号：US13379347
申请日：2011-08-12
申请人： Huicai Zhong , Qingqing Liang , Jiang Yan , Chao Zhao
发明人： Huicai Zhong , Qingqing Liang , Jiang Yan , Chao Zhao
IPC分类号： H01L23/34 , H01L23/522 , H01L23/467 , H01L23/473
CPC分类号： H01L23/522 , H01L23/467 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, a formation method thereof, and a package structure are provided. The semiconductor device comprises: a semiconductor substrate in which a metal-oxide-semiconductor field-effect transistor (MOSFET) is formed; a dielectric layer, provided on the semiconductor substrate and covering the MOSFET, wherein a plurality of interconnection structures are formed in the dielectric layer; and at least one heat dissipation path, embedded in the dielectric layer between the interconnection structures, for liquid or gas to circulate in the heat dissipation path, wherein openings of the heat dissipation path are exposed on the surface of the dielectric layer. The present invention can improve heat dissipation efficiency, and prevent chips from overheating.
摘要翻译：提供半导体器件，其形成方法和封装结构。半导体器件包括：形成金属氧化物半导体场效应晶体管（MOSFET）的半导体衬底; 介电层，设置在所述半导体衬底上并覆盖所述MOSFET，其中在所述电介质层中形成多个互连结构; 以及嵌入在互连结构之间的电介质层中的至少一个散热路径，用于使液体或气体在散热路径中循环，其中散热路径的开口暴露在介电层的表面上。本发明可以提高散热效率，防止芯片过热。

9. 发明授权

US08420492B2 MOS transistor and method for forming the same 有权
标题翻译： MOS晶体管及其形成方法
公开(公告)号：US08420492B2
公开(公告)日：2013-04-16
申请号：US13143591
申请日：2011-01-27
申请人： Huicai Zhong , Qingqing Liang , Da Yang , Chao Zhao
发明人： Huicai Zhong , Qingqing Liang , Da Yang , Chao Zhao
IPC分类号： H01L21/336
CPC分类号： H01L29/4983 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/78 , H01L29/7845
摘要： The invention provides a MOS transistor and a method for forming the MOS transistor. The MOS transistor includes a semiconductor substrate; a gate stack on the semiconductor substrate, and including a gate dielectric layer and a gate electrode on the semiconductor substrate in sequence; a source region and a drain region, respectively at sidewalls of the gate stack sidewalls of the gate stack and in the semiconductor; sacrificial metal spacers on sidewalls of the gate stack sidewalls of the gate stack, and having tensile stress or compressive stress. This invention scales down the equivalent oxide thickness, improves uniformity of device performance, raises carrier mobility and promotes device performance.
摘要翻译：本发明提供一种MOS晶体管和一种用于形成MOS晶体管的方法。 MOS晶体管包括半导体衬底; 半导体衬底上的栅极堆叠，并且在半导体衬底上依次包括栅极介电层和栅电极; 源极区和漏极区，分别位于栅极堆叠的栅极堆叠侧壁的侧壁和半导体中; 牺牲金属间隔物在栅堆叠的栅堆叠侧壁的侧壁上，并且具有拉应力或压应力。本发明缩小了等效氧化物厚度，改善了器件性能的均匀性，提高了载流子迁移率并提高了器件性能。

10. 发明申请

US20130020618A1 SEMICONDUCTOR DEVICE, FORMATION METHOD THEREOF, AND PACKAGE STRUCTURE 有权
标题翻译：半导体器件，其形成方法和封装结构
公开(公告)号：US20130020618A1
公开(公告)日：2013-01-24
申请号：US13379347
申请日：2011-08-12
申请人： Huicai Zhong , Qingqing Liang , Jiang Yan , Chao Zhao
发明人： Huicai Zhong , Qingqing Liang , Jiang Yan , Chao Zhao
IPC分类号： H01L29/78 , H01L21/50
CPC分类号： H01L23/522 , H01L23/467 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, a formation method thereof, and a package structure are provided. The semiconductor device comprises: a semiconductor substrate in which a metal-oxide-semiconductor field-effect transistor (MOSFET) is formed; a dielectric layer, provided on the semiconductor substrate and covering the MOSFET, wherein a plurality of interconnection structures are formed in the dielectric layer; and at least one heat dissipation path, embedded in the dielectric layer between the interconnection structures, for liquid or gas to circulate in the heat dissipation path, wherein openings of the heat dissipation path are exposed on the surface of the dielectric layer. The present invention can improve heat dissipation efficiency, and prevent chips from overheating.
摘要翻译：提供半导体器件，其形成方法和封装结构。半导体器件包括：形成金属氧化物半导体场效应晶体管（MOSFET）的半导体衬底; 介电层，设置在所述半导体衬底上并覆盖所述MOSFET，其中在所述电介质层中形成多个互连结构; 以及嵌入在互连结构之间的电介质层中的至少一个散热路径，用于使液体或气体在散热路径中循环，其中散热路径的开口暴露在介电层的表面上。本发明可以提高散热效率，防止芯片过热。

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