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1. 发明授权

US08119992B2 System for overlay measurement in semiconductor manufacturing 有权
标题翻译：半导体制造中覆盖测量系统
公开(公告)号：US08119992B2
公开(公告)日：2012-02-21
申请号：US12537410
申请日：2009-08-07
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
IPC分类号： G01J1/42 , H01L23/544 , H01L21/76
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： Provided is a system for overlay measurement in semiconductor manufacturing that includes a generator for exposing an overlay target to radiation and a detector for detecting reflected beams of the overlay target. The reflected beams are for overlay measurement and include at least two different beams.
摘要翻译：提供了一种用于半导体制造中的覆盖测量的系统，其包括用于将覆盖目标曝光于辐射的发生器和用于检测覆盖目标的反射光束的检测器。反射光束用于重叠测量，并且包括至少两个不同的光束。

2. 发明申请

US20090294685A1 SYSTEM FOR OVERLAY MEASUREMENT IN SEMICONDUCTOR MANUFACTURING 有权
标题翻译：半导体制造中超导测量系统
公开(公告)号：US20090294685A1
公开(公告)日：2009-12-03
申请号：US12537410
申请日：2009-08-07
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
IPC分类号： G01J1/42 , G01N21/55
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： Provided is a system for overlay measurement in semiconductor manufacturing that includes a generator for exposing an overlay target to radiation and a detector for detecting reflected beams of the overlay target. The reflected beams are for overlay measurement and include at least two different beams.
摘要翻译：提供了一种用于半导体制造中的覆盖测量的系统，其包括用于将覆盖目标曝光于辐射的发生器和用于检测覆盖目标的反射光束的检测器。反射光束用于重叠测量，并且包括至少两个不同的光束。

3. 发明授权

US07582538B2 Method of overlay measurement for alignment of patterns in semiconductor manufacturing 有权
标题翻译：半导体制造中图形对齐的覆盖测量方法
公开(公告)号：US07582538B2
公开(公告)日：2009-09-01
申请号：US11099966
申请日：2005-04-06
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
IPC分类号： H01L21/76
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： A method for semiconductor manufacturing includes forming an overlay target having a pattern formed by a first mask layer and an adjacent layer. The overlay target is exposed to radiation. As a result, reflective beams can be detected from the pattern and the adjacent layer and the location of the pattern can be identified based on the reflective beams.
摘要翻译：一种用于半导体制造的方法包括形成具有由第一掩模层和相邻层形成的图案的覆盖目标。覆盖目标暴露于辐射。结果，可以从图案和相邻层检测反射光束，并且可以基于反射光束来识别图案的位置。

4. 发明申请

US20060228816A1 System and method for overlay measurement in semiconductor manufacturing 有权
标题翻译：半导体制造中覆盖测量的系统和方法
公开(公告)号：US20060228816A1
公开(公告)日：2006-10-12
申请号：US11099966
申请日：2005-04-06
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Chen
IPC分类号： H01L21/00 , G01B11/00
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： A method for semiconductor manufacturing includes forming an overlay target having a pattern formed by a first mask layer and an adjacent layer. The overlay target is exposed to radiation. As a result, reflective beams can be detected from the pattern and the adjacent layer and the location of the pattern can be identified based on the reflective beams.
摘要翻译：一种用于半导体制造的方法包括形成具有由第一掩模层和相邻层形成的图案的覆盖目标。覆盖目标暴露于辐射。结果，可以从图案和相邻层检测反射光束，并且可以基于反射光束来识别图案的位置。

5. 发明申请

US20060211237A1 Method and apparatus for planarizing gap-filling material 审中-公开
标题翻译：用于平坦化间隙填充材料的方法和装置
公开(公告)号：US20060211237A1
公开(公告)日：2006-09-21
申请号：US11085295
申请日：2005-03-21
申请人： Kuei-Shun Chen , Chin-Hsiang Lin , T. Lin , Chia-Hsiang Lin
发明人： Kuei-Shun Chen , Chin-Hsiang Lin , T. Lin , Chia-Hsiang Lin
IPC分类号： H01L21/4763 , B30B9/00
CPC分类号： H01L21/76819 , H01L21/76808
摘要： A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filling material is planarized using a template to create a substantially planarized surface.
摘要翻译：一种用于制造互连结构的装置的方法。衬底上设置有介电层。电介质层包括至少一个开口。在填充至少一个开口的基板上施加间隙填充材料。间隙填充材料使用模板进行平面化，以形成基本平坦的表面。

6. 发明申请

US20080060534A1 METHOD AND APPARATUS FOR PLANARIZING GAP-FILLING MATERIAL 有权
标题翻译：用于平面填充材料的方法和装置
公开(公告)号：US20080060534A1
公开(公告)日：2008-03-13
申请号：US11927779
申请日：2007-10-30
申请人： Kuei-Shun Chen , Chin-Hsiang Lin , T.H. Lin , Chia-Hsiang Lin
发明人： Kuei-Shun Chen , Chin-Hsiang Lin , T.H. Lin , Chia-Hsiang Lin
IPC分类号： B30B9/00
CPC分类号： H01L21/76819 , H01L21/76808
摘要： A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filling material is planarized using a template to create a substantially planarized surface.
摘要翻译：一种用于制造互连结构的装置的方法。衬底上设置有介电层。电介质层包括至少一个开口。在填充至少一个开口的基板上施加间隙填充材料。间隙填充材料使用模板进行平面化，以形成基本平坦的表面。

7. 发明授权

US08132503B2 Method and apparatus for planarizing gap-filling material 有权
标题翻译：用于平坦化间隙填充材料的方法和装置
公开(公告)号：US08132503B2
公开(公告)日：2012-03-13
申请号：US11927779
申请日：2007-10-30
申请人： Kuei-Shun Chen , Chin-Hsiang Lin , T. H. Lin , Chia-Hsiang Lin
发明人： Kuei-Shun Chen , Chin-Hsiang Lin , T. H. Lin , Chia-Hsiang Lin
IPC分类号： B30B9/28
CPC分类号： H01L21/76819 , H01L21/76808
摘要： A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filling material is planarized using a template to create a substantially planarized surface.
摘要翻译：一种用于制造互连结构的装置的方法。衬底上设置有介电层。电介质层包括至少一个开口。在填充至少一个开口的基板上施加间隙填充材料。间隙填充材料使用模板进行平面化，以形成基本平坦的表面。

8. 发明授权

US07226873B2 Method of improving via filling uniformity in isolated and dense via-pattern regions 有权
标题翻译：改善隔离和致密通孔图案区域中填充均匀性的方法
公开(公告)号：US07226873B2
公开(公告)日：2007-06-05
申请号：US10992668
申请日：2004-11-22
申请人： Yung-Sung Yen , Kuei-Shun Chen , Chia-Hsiang Lin , Lawrence Lin , Tsung Hsien Lin
发明人： Yung-Sung Yen , Kuei-Shun Chen , Chia-Hsiang Lin , Lawrence Lin , Tsung Hsien Lin
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76808 , H01L21/02126 , H01L21/02164 , H01L21/312 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An isotropic-diffusion filling method uses a thermal process on a result structure comprising a photoresist layer and an organic material layer to create a cross-linking layer there between, which minimizes step height differences between isolated and dense via-pattern regions for optimizing a subsequent trench process and simplifying process steps.
摘要翻译：各向同性扩散填充方法对包括光致抗蚀剂层和有机材料层的结果结构使用热处理，以在其之间形成交联层，这使隔离和密集的通孔图案区域之间的步长差最小化，以优化随后的沟槽工艺和简化工艺步骤。

9. 发明申请

US20060110941A1 Method of improving via filling uniformity in isolated and dense via-pattern regions 有权
标题翻译：改善隔离和致密通孔图案区域中填充均匀性的方法
公开(公告)号：US20060110941A1
公开(公告)日：2006-05-25
申请号：US10992668
申请日：2004-11-22
申请人： Yung-Sung Yen , Kuei-Shun Chen , Chia-Hsiang Lin , Lawrence Lin , T. Lin
发明人： Yung-Sung Yen , Kuei-Shun Chen , Chia-Hsiang Lin , Lawrence Lin , T. Lin
IPC分类号： H01L21/31
CPC分类号： H01L21/76808 , H01L21/02126 , H01L21/02164 , H01L21/312 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An isotropic-diffusion filling method uses a thermal process on a result structure comprising a photoresist layer and an organic material layer to create a cross-linking layer there between, which minimizes step height differences between isolated and dense via-pattern regions for optimizing a subsequent trench process and simplifying process steps.
摘要翻译：各向同性扩散填充方法对包括光致抗蚀剂层和有机材料层的结果结构使用热处理，以在其之间形成交联层，这使隔离和密集的通孔图案区域之间的步长差最小化，以优化随后的沟槽工艺和简化工艺步骤。

10. 发明授权

US08917062B2 Charging control circuit 有权
标题翻译：充电控制电路
公开(公告)号：US08917062B2
公开(公告)日：2014-12-23
申请号：US13597653
申请日：2012-08-29
申请人： Chien-Ping Lu , Nien-Hui Kung , Li-Wei Lee , Chia-Hsiang Lin , Chen-Hsiang Hsiao , Ko-Ching Su
发明人： Chien-Ping Lu , Nien-Hui Kung , Li-Wei Lee , Chia-Hsiang Lin , Chen-Hsiang Hsiao , Ko-Ching Su
IPC分类号： H02J7/00 , H02J7/16 , H02J7/06
CPC分类号： H02J7/0072
摘要： The present invention discloses a charge control circuit for supplying power from an external power source to a first common node and charging a second common node from the first common node. A regulator circuit is coupled between the external power source and the first common node, and a transistor is coupled between the first common node and the second common node. The present invention detects an operation parameter of the transistor and controls an internal voltage source to generate a non-predetermined voltage difference accordingly. When the sum of the voltage at the second common node and the non-predetermined voltage is equal to or higher than the reference voltage, the voltage at the first common node is regulated to a level higher than the voltage at the second common node, and the transistor is in an optimum conductive state.
摘要翻译：本发明公开了一种用于从外部电源向第一公共节点提供电力并从第一公共节点对第二公共节点充电的充电控制电路。调节器电路耦合在外部电源和第一公共节点之间，并且晶体管耦合在第一公共节点和第二公共节点之间。本发明检测晶体管的操作参数，并且控制内部电压源以相应地产生非预定的电压差。当第二公共节点和非预定电压之间的电压之和等于或高于参考电压时，第一公共节点处的电压被调节到高于第二公共节点处的电压的电平，以及晶体管处于最佳导通状态。

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