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1. 发明申请

US20110133150A1 Phase Change Memory Cell with Filled Sidewall Memory Element and Method for Fabricating the Same 有权
标题翻译：具有填充侧壁存储元件的相变存储器单元及其制造方法
公开(公告)号：US20110133150A1
公开(公告)日：2011-06-09
申请号：US12978846
申请日：2010-12-27
申请人： Hsiang Lan Lung , Chieh Fang Chen
发明人： Hsiang Lan Lung , Chieh Fang Chen
IPC分类号： H01L45/00
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625 , H01L45/1641 , H01L45/1691
摘要： Memory cells are described along with methods for manufacturing. A memory cell described herein includes a bottom electrode, a top electrode overlying the bottom electrode, a via having a sidewall extending from a bottom electrode to a top electrode, and a memory element electrically coupling the bottom electrode to the top electrode. The memory element has an outer surface contacting a dielectric sidewall spacer that is on the sidewall of the via, and comprises a stem portion on the bottom electrode and a cup portion on the stem portion. A fill material is within an interior defined by an inner surface of the cup portion of the memory element.
摘要翻译：描述存储单元以及制造方法。本文所述的存储单元包括底部电极，覆盖底部电极的顶部电极，具有从底部电极延伸到顶部电极的侧壁的通孔，以及将底部电极电连接到顶部电极的存储元件。存储元件具有接触通孔侧壁上的电介质侧壁间隔件的外表面，并且包括底部电极上的杆部分和杆部分上的杯部分。填充材料在由存储元件的杯部的内表面限定的内部内。

2. 发明授权

US07884343B2 Phase change memory cell with filled sidewall memory element and method for fabricating the same 有权
标题翻译：具有填充侧壁存储元件的相变存储单元及其制造方法
公开(公告)号：US07884343B2
公开(公告)日：2011-02-08
申请号：US12016842
申请日：2008-01-18
申请人： Hsiang Lan Lung , Chieh-Fang Chen
发明人： Hsiang Lan Lung , Chieh-Fang Chen
IPC分类号： H01L49/00
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625 , H01L45/1641 , H01L45/1691
摘要： Memory cells are described along with methods for manufacturing. A memory cell described herein includes a bottom electrode, a top electrode overlying the bottom electrode, a via having a sidewall extending from a bottom electrode to a top electrode, and a memory element electrically coupling the bottom electrode to the top electrode. The memory element has an outer surface contacting a dielectric sidewall spacer that is on the sidewall of the via, and comprises a stem portion on the bottom electrode and a cup portion on the stem portion. A fill material is within an interior defined by an inner surface of the cup portion of the memory element.
摘要翻译：描述存储单元以及制造方法。本文所述的存储单元包括底部电极，覆盖底部电极的顶部电极，具有从底部电极延伸到顶部电极的侧壁的通孔，以及将底部电极电连接到顶部电极的存储元件。存储元件具有接触通孔侧壁上的电介质侧壁间隔件的外表面，并且包括底部电极上的杆部分和杆部分上的杯部分。填充材料在由存储元件的杯部的内表面限定的内部内。

3. 发明授权

US08138028B2 Method for manufacturing a phase change memory device with pillar bottom electrode 有权
标题翻译：具有柱底电极的相变存储器件的制造方法
公开(公告)号：US08138028B2
公开(公告)日：2012-03-20
申请号：US11764678
申请日：2007-06-18
申请人： Hsiang Lan Lung , Chieh Fang Chen , Yi Chou Chen , Shih Hung Chen , Chung Hon Lam , Eric Andrew Joseph , Alejandro Gabriel Schrott , Matthew J. Breitwisch , Geoffrey William Burr , Thomas D. Happ , Jan Boris Philipp
发明人： Hsiang Lan Lung , Chieh Fang Chen , Yi Chou Chen , Shih Hung Chen , Chung Hon Lam , Eric Andrew Joseph , Alejandro Gabriel Schrott , Matthew J. Breitwisch , Geoffrey William Burr , Thomas D. Happ , Jan Boris Philipp
IPC分类号： H01L45/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/14 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including an array of conductive contacts in electrical communication with access circuitry. A layer of electrode material is deposited making reliable electrical contact with the array of conductive contacts. Electrode material is etched to form a pattern of electrode pillars on corresponding conductive contacts. Next, a dielectric material is deposited over the pattern and planarized to provide an electrode surface exposing top surfaces of the electrode pillars. Next, a layer of programmable resistive material, such as a chalcogenide or other phase change material, is deposited, followed by deposition of a layer of a top electrode material. A device including bottom electrode pillars with larger bottom surfaces than top surfaces is described.
摘要翻译：用于制造蘑菇细胞型相变存储器的方法是基于在包括与接入电路电连通的导电触点阵列的基板上制造底部电极材料的柱。沉积一层电极材料，使其与导电触点阵列可靠地电接触。蚀刻电极材料以在对应的导电触点上形成电极柱的图案。接下来，将介电材料沉积在图案上并且被平坦化以提供暴露电极柱顶表面的电极表面。接下来，沉积诸如硫族化物或其它相变材料的可编程电阻材料层，随后沉积顶层电极材料层。描述了包括具有比顶表面更大的底表面的底部电极柱的装置。

4. 发明授权

US07514367B2 Method for manufacturing a narrow structure on an integrated circuit 有权
标题翻译：在集成电路上制造窄结构的方法
公开(公告)号：US07514367B2
公开(公告)日：2009-04-07
申请号：US11382739
申请日：2006-05-11
申请人： Hsiang Lan Lung , Chiahua Ho , Shih Hung Chen , Chieh Fang Chen
发明人： Hsiang Lan Lung , Chiahua Ho , Shih Hung Chen , Chieh Fang Chen
IPC分类号： H01L21/302
CPC分类号： H01L45/1226 , G11C13/0004 , H01L45/04 , H01L45/06 , H01L45/14 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1641 , H01L45/1675 , H01L45/1691 , Y10S438/947
摘要： A method of manufacturing for providing a narrow line, such as a phase change bridge, on a substrate having a top surface, includes first forming a layer of first material on the substrate. Then, a layer of a pattern material is applied on the layer of first material, and a pattern is defined. The pattern includes a ledge having a sidewall extending substantially to the layer of first material. A sidewall etch mask is formed on the ledge, and used to define a line of the first material on the substrate having a width substantially determined by the width of the sidewall etch mask.
摘要翻译：一种用于在具有顶表面的基底上提供诸如相变桥的窄线的制造方法包括首先在基底上形成第一材料层。然后，将图案材料层施加在第一材料层上，并且限定图案。该图案包括具有基本上延伸到第一材料层的侧壁的凸缘。侧壁蚀刻掩模形成在凸缘上，并且用于限定基板上的第一材料的线，其宽度基本上由侧壁蚀刻掩模的宽度决定。

5. 发明申请

US20110263075A1 Vacuum Jacket For Phase Change Memory Element 有权
标题翻译：相变存储元件真空护套
公开(公告)号：US20110263075A1
公开(公告)日：2011-10-27
申请号：US12911554
申请日：2010-10-25
申请人： Hsiang Lan Lung
发明人： Hsiang Lan Lung
IPC分类号： H01L21/06
CPC分类号： H01L45/148 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675 , Y10S438/90
摘要： A memory device including a phase change element and a vacuum jacket. The device includes a first electrode element; a phase change element in contact with the first electrode element; an upper electrode element in contact with the phase change element; a bit line electrode in contact with the upper electrode element; and a dielectric fill layer surrounding the phase change element and the upper electrode element, spaced from the same and sealed by the bit line electrode to define a vacuum jacket around the phase change element and upper electrode element.
摘要翻译：一种包括相变元件和真空护套的存储器件。该装置包括第一电极元件; 与所述第一电极元件接触的相变元件; 与所述相变元件接触的上电极元件; 与上电极元件接触的位线电极; 以及围绕所述相变元件和所述上电极元件的介电填充层，与所述相位元件和所述上电极元件间隔开并且由所述位线电极密封以在所述相变元件和上电极元件周围限定真空护套。

6. 发明授权

US07902538B2 Phase change memory cell with first and second transition temperature portions 有权
标题翻译：具有第一和第二转变温度部分的相变存储器单元
公开(公告)号：US07902538B2
公开(公告)日：2011-03-08
申请号：US12266200
申请日：2008-11-06
申请人： Hsiang Lan Lung
发明人： Hsiang Lan Lung
IPC分类号： H01L47/00
CPC分类号： G11C8/08 , G11C8/10 , G11C13/0004 , G11C13/0028 , G11C2213/79 , H01L27/2436 , H01L45/06 , H01L45/1226 , H01L45/144 , H01L45/1625 , H01L45/165 , H01L45/1675 , H01L45/1691
摘要： A phase change memory cell includes first and second electrodes having generally coplanar surfaces spaced apart by a gap and a phase change bridge electrically coupling the first and second electrodes. The phase change bridge may extend over the generally coplanar surfaces and across the gap. The phase change bridge has a higher transition temperature bridge portion and a lower transition temperature portion. The lower transition temperature portion comprises a phase change region which can be transitioned from generally crystalline to generally amorphous states at a lower temperature than the higher transition temperature portion. A method for making a phase change memory cell is also disclosed.
摘要翻译：相变存储单元包括具有通过间隙间隔开的大致共面的第一和第二电极以及电耦合第一和第二电极的相变桥。相变桥可以在大致共面的表面上并跨越间隙延伸。相变桥具有较高的转变温度桥接部分和较低的转变温度部分。较低的转变温度部分包括可在比较高转变温度部分低的温度下从一般结晶转变为通常非晶态的相变区。还公开了一种制造相变存储单元的方法。

7. 发明申请

US20100151652A1 MULTI-LEVEL MEMORY CELL HAVING PHASE CHANGE ELEMENT AND ASYMMETRICAL THERMAL BOUNDARY 有权
标题翻译：具有相变元件和非对称热边界的多级存储单元
公开(公告)号：US20100151652A1
公开(公告)日：2010-06-17
申请号：US12715323
申请日：2010-03-01
申请人： Hsiang Lan Lung , Yi-Chou Chen
发明人： Hsiang Lan Lung , Yi-Chou Chen
IPC分类号： H01L21/02
CPC分类号： H01L45/143 , G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1625 , H01L45/1641 , H01L45/1675 , H01L45/1683 , Y10T29/49117
摘要： A multi-level, phase change memory cell has first and second thermal isolation materials having different thermal conductivity properties situated in heat-conducting relation to first and second boundaries of the phase change material. Accordingly, when an electrical current is applied to raise the temperature of the memory material, heat is drawn away from the memory material asymmetrically along a line orthogonal to electric field lines between the electrodes.
摘要翻译：多级相变存储器单元具有第一和第二热隔离材料，该材料具有不同的导热性质，其位于与相变材料的第一和第二边界的导热关系中。因此，当施加电流以提高存储材料的温度时，沿着与电极之间的电场线正交的线不对称地将热量从存储材料拉出。

8. 发明授权

US07579613B2 Thin film fuse phase change RAM and manufacturing method 有权
标题翻译：薄膜保险丝相变RAM及制造方法
公开(公告)号：US07579613B2
公开(公告)日：2009-08-25
申请号：US11959708
申请日：2007-12-19
申请人： Hsiang Lan Lung , Shih-Hung Chen
发明人： Hsiang Lan Lung , Shih-Hung Chen
IPC分类号： H01L29/02
CPC分类号： H01L45/1226 , G11C13/0004 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/144 , H01L45/1675 , H01L45/1691
摘要： A memory device comprising a first electrode having a top side, a second electrode having a top side and an insulating member between the first electrode and the second electrode. The insulating member has a thickness between the first and second electrodes near the top side of the first electrode and the top side of the second electrode. A bridge of memory material crosses the insulating member, and defines an inter-electrode path between the first and second electrodes across the insulating member. An array of such memory cells is provided. In the array, a plurality of electrode members and insulating members therebetween comprise an electrode layer on an integrated circuit. The bridges of memory material have sub-lithographic dimensions.
摘要翻译：一种存储器件，包括具有顶侧的第一电极，具有顶侧的第二电极和位于第一电极和第二电极之间的绝缘构件。绝缘构件在第一电极的顶侧附近和第二电极的顶侧之间具有在第一和第二电极之间的厚度。记忆材料桥跨越绝缘构件，并且在绝缘构件之间限定了第一和第二电极之间的电极间路径。提供这样的存储单元阵列。在阵列中，多个电极构件和绝缘构件包括集成电路上的电极层。记忆材料的桥梁具有亚光刻尺寸。

9. 发明申请

US20090072216A1 PHASE CHANGE MEMORY CELL ARRAY WITH SELF-CONVERGED BOTTOM ELECTRODE AND METHOD FOR MANUFACTURING 有权
标题翻译：相变式存储单元阵列与自适应底层电极及其制造方法
公开(公告)号：US20090072216A1
公开(公告)日：2009-03-19
申请号：US11855983
申请日：2007-09-14
申请人： Hsiang Lan Lung , Chung Hon Lam , Matthew J. Breitwisch
发明人： Hsiang Lan Lung , Chung Hon Lam , Matthew J. Breitwisch
IPC分类号： H01L45/00
CPC分类号： H01L45/144 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： An array of phase change memory cells is manufactured by forming a separation layer over an array of contacts, forming a patterning layer on the separation layer and forming an array of mask openings in the patterning layer using lithographic process. Etch masks are formed within the mask openings by a process that compensates for variation in the size of the mask openings that result from the lithographic process. The etch masks are used to etch through the separation layer to define an array of electrode openings exposing the underlying contacts. Electrode material is deposited within the electrode openings; and memory elements are formed over the bottom electrodes. Finally, bit lines are formed over the memory elements to complete the memory cells. In the resulting memory array, the critical dimension of the top surface of bottom electrode varies less than the width of the memory elements in the mask openings.
摘要翻译：通过在触点阵列上形成分离层，在分离层上形成图形层并使用光刻工艺在图案形成层中形成掩模开口阵列来制造相变存储器单元的阵列。通过补偿由平版印刷工艺产生的掩模开口的尺寸变化的过程，在掩模开口内形成蚀刻掩模。蚀刻掩模用于蚀刻通过分离层以限定暴露下面的触点的电极开口的阵列。电极材料沉积在电极开口内; 并且存储元件形成在底部电极上。最后，在存储器元件上形成位线以完成存储器单元。在所得到的存储器阵列中，底部电极的顶表面的临界尺寸小于掩模开口中存储元件的宽度。

10. 发明授权

US07479649B2 Vacuum jacketed electrode for phase change memory element 有权
标题翻译：用于相变存储元件的真空夹套电极
公开(公告)号：US07479649B2
公开(公告)日：2009-01-20
申请号：US11408596
申请日：2006-04-21
申请人： Hsiang Lan Lung
发明人： Hsiang Lan Lung
IPC分类号： H01L47/00
CPC分类号： H01L45/06 , G11C13/0004 , H01L45/126 , H01L45/1293 , H01L45/144
摘要： A memory device having a vacuum jacket around the first electrode element for improved thermal isolation. The memory unit includes a first electrode element; a phase change memory element in contact with the first electrode element; a dielectric fill layer surrounding the phase change memory element and the first electrode element, wherein the dielectric layer is spaced from the first electrode element to define a chamber between the first electrode element and the dielectric fill layer; and wherein the phase change memory layer is sealed to the dielectric fill layer to define a thermal isolation jacket around the first electrode element.
摘要翻译：具有围绕第一电极元件的真空护套的存储器件，用于改善热隔离。存储单元包括第一电极元件; 与所述第一电极元件接触的相变存储元件; 围绕所述相变存储元件和所述第一电极元件的电介质填充层，其中所述电介质层与所述第一电极元件间隔开以限定所述第一电极元件和所述电介质填充层之间的室; 并且其中所述相变存储层被密封到所述电介质填充层以限定围绕所述第一电极元件的热隔离套。

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