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1. 发明申请

US20060043478A1 Semiconductor device having super junction structure and method for manufacturing the same 有权
标题翻译：具有超结结构的半导体器件及其制造方法
公开(公告)号：US20060043478A1
公开(公告)日：2006-03-02
申请号：US11211524
申请日：2005-08-26
申请人： Hitoshi Yamaguchi , Tomoatsu Makino , Yoshiyuki Hattori , Kyoko Okada
发明人： Hitoshi Yamaguchi , Tomoatsu Makino , Yoshiyuki Hattori , Kyoko Okada
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/0696 , H01L29/41741 , H01L29/66734 , H01L29/7813
摘要： A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The periphery region includes an utmost outer and an utmost inner periphery pairs. The utmost outer periphery pair has a difference between the second and the first impurity amounts, which is smaller than a maximum difference in the periphery region. The utmost inner periphery pair has a difference between the second and the first impurity amounts, which is larger than a difference in the center region.
摘要翻译：半导体器件包括：中心区域; 外围区域以及包括具有第一杂质量的第一区域和具有第二杂质量的第二区域的对的半导体层。第一和第二区域在平面中交替排列。周边区域包括最外部的和最外部的内周边对。最外周边对具有第二和第一杂质量之间的差异，其小于周边区域的最大差异。最大的内周对具有第二和第一杂质量之间的差异，其大于中心区域的差。

2. 发明授权

US07317213B2 Semiconductor device having super junction structure and method for manufacturing the same 有权
标题翻译：具有超结结构的半导体器件及其制造方法
公开(公告)号：US07317213B2
公开(公告)日：2008-01-08
申请号：US11211524
申请日：2005-08-26
申请人： Hitoshi Yamaguchi , Tomoatsu Makino , Yoshiyuki Hattori , Kyoko Okada
发明人： Hitoshi Yamaguchi , Tomoatsu Makino , Yoshiyuki Hattori , Kyoko Okada
IPC分类号： H01L29/74 , H01L29/417 , H01L31/111 , H01L29/36
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/0696 , H01L29/41741 , H01L29/66734 , H01L29/7813
摘要： A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The periphery region includes an utmost outer and an utmost inner periphery pairs. The utmost outer periphery pair has a difference between the second and the first impurity amounts, which is smaller than a maximum difference in the periphery region. The utmost inner periphery pair has a difference between the second and the first impurity amounts, which is larger than a difference in the center region.
摘要翻译：半导体器件包括：中心区域; 外围区域以及包括具有第一杂质量的第一区域和具有第二杂质量的第二区域的对的半导体层。第一和第二区域在平面中交替排列。周边区域包括最外部的和最外部的内周边对。最外周边对具有第二和第一杂质量之间的差异，其小于周边区域的最大差异。最大的内周对具有第二和第一杂质量之间的差异，其大于中心区域的差。

3. 发明授权

US07633123B2 Semiconductor device having super junction structure 有权
标题翻译：具有超结结构的半导体器件
公开(公告)号：US07633123B2
公开(公告)日：2009-12-15
申请号：US11645792
申请日：2006-12-27
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Yoshiyuki Hattori , Kyoko Okada
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Yoshiyuki Hattori , Kyoko Okada
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/36
摘要： A semiconductor device includes: two main electrodes; multiple first regions; and multiple second regions. The first region having a first impurity concentration and a first width and the second region having a second impurity concentration and a second width are alternately repeated. A product of the first impurity concentration and the first width is equal to a product of the second impurity concentration and the second width. The first width is equal to or smaller than 4.5 μm. The first impurity concentration is lower than a predetermined concentration satisfying a RESURF condition. A ratio between on-state resistances of the device at 27° C. and at 150° C. is smaller than 1.8.
摘要翻译：半导体器件包括：两个主电极; 多个第一区域; 和多个第二区域。交替重复具有第一杂质浓度和第一宽度的第一区域和具有第二杂质浓度和第二宽度的第二区域。第一杂质浓度和第一宽度的乘积等于第二杂质浓度与第二宽度的乘积。第一宽度等于或小于4.5μm。第一杂质浓度低于满足RESURF条件的预定浓度。器件在27°C和150°C的导通电阻之间的比值小于1.8。

4. 发明申请

US20070145479A1 Semiconductor device having super junction structure 有权
标题翻译：具有超结结构的半导体器件
公开(公告)号：US20070145479A1
公开(公告)日：2007-06-28
申请号：US11645792
申请日：2006-12-27
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Yoshiyuki Hattori , Kyoko Okada
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Yoshiyuki Hattori , Kyoko Okada
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/36
摘要： A semiconductor device includes: two main electrodes; multiple first regions; and multiple second regions. The first region having a first impurity concentration and a first width and the second region having a second impurity concentration and a second width are alternately repeated. A product of the first impurity concentration and the first width is equal to a product of the second impurity concentration and the second width. The first width is equal to or smaller than 4.5 μm. The first impurity concentration is lower than a predetermined concentration satisfying a RESURF condition. A ratio between on-state resistances of the device at 27° C. and at 150° C. is smaller than 1.8.
摘要翻译：半导体器件包括：两个主电极; 多个第一区域; 和多个第二区域。交替重复具有第一杂质浓度和第一宽度的第一区域和具有第二杂质浓度和第二宽度的第二区域。第一杂质浓度和第一宽度的乘积等于第二杂质浓度与第二宽度的乘积。第一宽度等于或小于4.5μm。第一杂质浓度低于满足RESURF条件的预定浓度。器件在27°C和150°C的导通电阻之间的比值小于1.8。

5. 发明授权

US07601603B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07601603B2
公开(公告)日：2009-10-13
申请号：US11094782
申请日：2005-03-31
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率，其比沟槽的开口更深。

6. 发明申请

US20050221547A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20050221547A1
公开(公告)日：2005-10-06
申请号：US11094782
申请日：2005-03-31
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L29/06 , H01L21/20 , H01L21/205 , H01L21/336 , H01L21/338 , H01L21/8234 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率，其比沟槽的开口更深。

7. 再颁专利

USRE44236E1 Method for manufacturing semiconductor device 有权
公开(公告)号：USRE44236E1
公开(公告)日：2013-05-21
申请号：US13271485
申请日：2011-10-12
申请人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
发明人： Shoichi Yamauchi , Hitoshi Yamaguchi , Tomoatsu Makino , Syouji Nogami , Tomonori Yamaoka
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634 , H01L29/7811
摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.

8. 发明申请

US20050006717A1 Semiconductor device having super junction construction and method for manufacturing the same 有权
标题翻译：具有超结结构的半导体器件及其制造方法
公开(公告)号：US20050006717A1
公开(公告)日：2005-01-13
申请号：US10872789
申请日：2004-06-22
申请人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
发明人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L21/8242
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/1095
摘要： A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to the first part. The trench gate electrode penetrates the body region and reaches the drift region so that the trench gate electrode faces the body region and the drift region through an insulation layer. The trench gate electrode extends in a direction crossing with the extending direction of the first and second parts. The first part includes a portion near the trench gate electrode, which has an impurity concentration equal to or lower than that of the body region.
摘要翻译：半导体器件包括主体区域，具有第一部分和第二部分的漂移区域以及沟槽栅电极。身体区域设置在漂移区域上。第一和第二部分沿延伸方向延伸，使得第二部分与第一部分相邻。沟槽栅电极穿透体区并到达漂移区，使得沟槽栅电极通过绝缘层面向体区和漂移区。沟槽栅电极沿与第一和第二部分的延伸方向交叉的方向延伸。第一部分包括沟槽栅电极附近的部分，其杂质浓度等于或低于体区的杂质浓度。

9. 发明授权

US07112519B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US07112519B2
公开(公告)日：2006-09-26
申请号：US10950526
申请日：2004-09-28
申请人： Hitoshi Yamaguchi , Yoshiyuki Hattori
发明人： Hitoshi Yamaguchi , Yoshiyuki Hattori
IPC分类号： H01L21/04
CPC分类号： H01L29/7813 , H01L29/0634
摘要： A semiconductor device includes: an n+ type drain region; an n type drift region that connects with the n+ type drain region; a p type body region; a n+ type source region that connects with the p type body region; and a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the p type body region. The semiconductor further includes: a p type silicon region that adjoins the n type drift region; and an n type silicon region provided in a region almost including a carrier passage that connects the n type drift region and the p type body region. Here, the p type silicon region and the p type body region directly connect with each other.
摘要翻译：半导体器件包括：n + +型漏区; 与n + +型漏极区域连接的n型漂移区域; p型体区; 与p型体区域连接的n + SUP +型源极区域; 以及栅极电极，其被栅极绝缘膜覆盖在穿过p型体区域的栅极沟槽中。半导体还包括：邻接n型漂移区的p型硅区; 以及设置在几乎包括连接n型漂移区域和p型体区域的载体通道的区域中的n型硅区域。这里，p型硅区域和p型体区域直接连接。

10. 发明申请

US20120025874A1 SEMICONDUCTOR DEVICE HAVING SWITCHING ELEMENT AND FREE WHEEL DIODE AND METHOD FOR CONTROLLING THE SAME 有权
标题翻译：具有切换元件和自由轮二极管的半导体器件及其控制方法
公开(公告)号：US20120025874A1
公开(公告)日：2012-02-02
申请号：US13190798
申请日：2011-07-26
申请人： Hirotaka Saikaku , Tsuyoshi Yamamoto , Shoji Mizuno , Masakiyo Sumitomo , Tetsuo Fujii , Jun Sakakibara , Hitoshi Yamaguchi , Yoshiyuki Hattori , Rie Taguchi , Makoto Kuwahara
发明人： Hirotaka Saikaku , Tsuyoshi Yamamoto , Shoji Mizuno , Masakiyo Sumitomo , Tetsuo Fujii , Jun Sakakibara , Hitoshi Yamaguchi , Yoshiyuki Hattori , Rie Taguchi , Makoto Kuwahara
IPC分类号： H03K17/06 , H01L29/739
CPC分类号： H01L29/7813 , H01L27/0629 , H01L27/0635 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4983 , H01L29/66734 , H01L29/7391 , H01L29/7393 , H01L29/7397 , H01L29/7398 , H01L29/7805 , H01L29/7819 , H01L29/7825 , H01L29/7831 , H01L29/861 , H01L2924/0002 , H02M7/003 , H01L2924/00
摘要： A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate.
摘要翻译：一种半导体器件包括：具有漂移层的开关元件; 基地区在基极区域中的元件侧第一杂质区域; 夹在所述第一杂质区域和所述漂移层之间的元件侧栅电极; 接触漂移层的第二杂质区; 与元件侧第一杂质区域和基极区域耦合的元件侧第一电极; 以及与所述第二杂质区域耦合的元件侧第二电极以及具有：第一导电层的FWD; 第二导电层; 耦合到所述第二导电层的二极管侧第一电极; 耦合到所述第一导电层的二极管侧第二电极; 第二导电层中的二极管侧第一杂质区; 以及夹在第一杂质区域和第一导电层之间的第二导电层中的二极管侧栅电极，并具有作为过剩载流子注入抑制栅极的第一栅极电极。

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