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1. 发明专利

JP2003289122A Ball-grid-array type semiconductor device 审中-公开
标题翻译：球形阵列型半导体器件
公开(公告)号：JP2003289122A
公开(公告)日：2003-10-10
申请号：JP2003123531
申请日：2003-04-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YAGUCHI AKIHIRO , HARUTA AKIRA , ICHITANI MASAHIRO , TANAKA TADAYOSHI
IPC分类号： H01L23/12
CPC分类号： H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To realize a highly reliable BGA-type semiconductor device by suppressing the disconnection of conductive wiring and breakage of an external terminal. SOLUTION: Respective insulating films 3 covering respective lands 2b are separated from each other, and a dummy wiring 10 in addition to conductive wiring 2 connected to the lands 2 is projected from a side face 3b of the insulating film 3 covering the lands 2b. Thus, it is possible to increase the rate of wiring materials whose rigidity is large inside the insulating film 3, and to strengthen the constraint of the thermal deformation of the insulating film 3 itself by the dummy wiring 10. Also, it is possible to suppress the peeling of the side face 3b of the insulating film by the conductive wiring 2 and the dummy wiring 10, and to reduce the increase of the thermal deformation quantity of the insulating film 3 due to the generation of the peeling of the side face 3b. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：通过抑制导电布线的断开和外部端子的断裂来实现高可靠性的BGA型半导体器件。解决方案：覆盖相应焊盘2b的各绝缘膜3彼此分离，并且除了连接到焊盘2的导电布线2之外的虚设布线10从覆盖该焊盘的绝缘膜3的侧面3b突出 2b。因此，能够提高绝缘膜3内部的刚性大的布线材料的使用率，并且通过虚设布线10来加强绝缘膜3本身的热变形的约束。另外，也可以抑制通过导电布线2和虚拟布线10剥离绝缘膜的侧面3b，并且由于产生侧面3b的剥离而减少绝缘膜3的热变形量的增加。版权所有（C）2004，JPO

2. 发明专利

DE69120356T2 未知
公开(公告)号：DE69120356T2
公开(公告)日：1997-01-23
申请号：DE69120356
申请日：1991-09-04
申请人： HITACHI LTD
发明人： NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , YONEDA NAE , KOHNO RYUJI , MURAKAMI GEN , ANJOH ICHIRO
IPC分类号： H01L25/18 , H01L23/28 , H01L23/495 , H01L25/065 , H01L25/07
摘要： A semiconductor device comprises a plurality of semiconductor chips (1a, 1b, 1c), electrodes formed on circuit surfaces of said plurality of semiconductor chips (1a, 1b, 1c); inner leads (3a, 3b) made of a metal foil and bonded at one ends thereof to the electrodes, outer leads (4, 4a, 4b, 4c) bonded at one ends thereof to the other ends of the inner leads (3a, 3b), and a sealing material (5) sealing said plurality of semiconductor chips (1a, 1b, 1c), the electrodes, the inner leads, and part of each of the outer leads. The semiconductor chips (1a, 1b, 1c) are laminated in such a manner that those surfaces of the semiconductor chips (1a, 1b, 1c) on which their respective circuits are formed are disposed in facing relation to each other. This provides a semiconductor device which is excellent in assembling efficiency.

3. 发明专利

DE69534483D1 未知
公开(公告)号：DE69534483D1
公开(公告)日：2006-02-09
申请号：DE69534483
申请日：1995-05-12
申请人： HITACHI LTD
发明人： TANAKA NAOTAKA , YAGUCHI AKIHIRO , KITANO MAKOTO , NAGATA TATSUYA , KUMAZAWA TETSUO , NAKAMURA ATSUSHI , SUZUKI HIROMICHI , TSUGANE MASAYOSHI
IPC分类号： H01L21/48 , H01L21/56 , H01L23/31 , H01L23/495 , H01L23/498
摘要： A lead frame for use with a plastic encapsulated semiconductor device includes a tab (4) on which the semiconductor chip (9) is mounted, chip pad supporting leads (5), inner leads (2a) to be electrically coupled with the semiconductor chip, outer leads (2b) formed in a monoblock structure together with the inner leads, and a frame (1) for supporting the chip pad supporting leads and outer leads. In the lead frame, there is disposed a dam member (3) only between the outer leads. Alternatively, dummy outer leads are formed between the frame and leads adjacent thereto so as to connect the dummy leads to the outer leads by the dam member. The frame is removed after the semiconductor device is assembled.

4. 发明专利

DE69127587T2 未知
公开(公告)号：DE69127587T2
公开(公告)日：1998-04-23
申请号：DE69127587
申请日：1991-06-12
申请人： HITACHI LTD
发明人： KITANO MAKOTO , NISHIMURA ASAO , YAGUCHI AKIHIRO , KOHNO RYUJI , YONEDA NAE
IPC分类号： H01L23/31 , H01L23/495 , H01L25/065 , H01L25/07 , H01L25/18 , H01L23/498
摘要： A plastic-molded-type semiconductor device comprises two semiconductor chips (1a, 1b) having main surfaces on which electrodes and circuits are formed and which face each other; a lead frame (2) placed between these two semiconductor chips (1a, 1b) and electrically connected to their electrodes; a plastic package (6) formed by plastic-sealing the above components; and wiring patterns (4) provided on the main surfaces of the semiconductor chips (1a, 1b) through the intermediation of insulating films (3). The wiring patterns (4) are electrically connected to the electrodes of the semiconductor chips (1a, 1b) and to the lead frame (2). With this structure, it is possible for two large-sized semiconductor chips (1a, 1b) having electrodes in their middle sections to be encased in a single, relatively thin package (6).

5. 发明专利

DE69127587D1 未知
公开(公告)号：DE69127587D1
公开(公告)日：1997-10-16
申请号：DE69127587
申请日：1991-06-12
申请人： HITACHI LTD
发明人： KITANO MAKOTO , NISHIMURA ASAO , YAGUCHI AKIHIRO , KOHNO RYUJI , YONEDA NAE
IPC分类号： H01L23/31 , H01L23/495 , H01L25/065 , H01L25/07 , H01L25/18 , H01L23/498
摘要： A plastic-molded-type semiconductor device comprises two semiconductor chips (1a, 1b) having main surfaces on which electrodes and circuits are formed and which face each other; a lead frame (2) placed between these two semiconductor chips (1a, 1b) and electrically connected to their electrodes; a plastic package (6) formed by plastic-sealing the above components; and wiring patterns (4) provided on the main surfaces of the semiconductor chips (1a, 1b) through the intermediation of insulating films (3). The wiring patterns (4) are electrically connected to the electrodes of the semiconductor chips (1a, 1b) and to the lead frame (2). With this structure, it is possible for two large-sized semiconductor chips (1a, 1b) having electrodes in their middle sections to be encased in a single, relatively thin package (6).

6. 发明专利

MY128860A SEMICONDUCTOR DEVICE 未知
公开(公告)号：MY128860A
公开(公告)日：2007-02-28
申请号：MYPI20001004
申请日：2000-03-14
申请人： HITACHI LTD
发明人： YAGUCHI AKIHIRO , HARUTA RYO , ICHITANI MASAHIRO
IPC分类号： H01L23/02 , H01L23/12 , H01L23/16 , H01L23/28 , H01L23/31 , H05K1/18
摘要： IN A BALL GRID ARRAY TYPE SEMICONDUCTOR DEVICE MOUNTED ON A PRINTED WIRING BOARD, THE EXTERNAL TERMINALS (10) CAN BE PREVENTED FROM BEING BROKEN DOWN EVEN WHEN THE AMBIENT TEMPERATURE ON THE DEVICE IS REPEATEDLY CHANGED. A FLEXIBLE ADHESIVE MEMBER (8) FOR GLUING THE SEMICONDUCTOR CHIP (1) TO AN INSULATING TAPE (2) IS PROVIDED TO COVER UP TO A REGION INCLUDING THE LANDS (5) TO WHICH THE EXTERNAL TERMINALS (10) ARE BONDED AND WHICH ARE PROVIDED ON THE INSULATING TAPE SURFACE. THE FLEXIBLE ADHESIVE MEMBER (8) FOR COVERING THE LANDS (5) MAY BE REPLACED BY A FLEXIBLE LOW-ELASTICITY MEMBER (3).(FIG 1)

7. 发明专利

DE69534483T2 未知
公开(公告)号：DE69534483T2
公开(公告)日：2006-07-06
申请号：DE69534483
申请日：1995-05-12
申请人： HITACHI LTD
发明人： TANAKA NAOTAKA , YAGUCHI AKIHIRO , KITANO MAKOTO , NAGATA TATSUYA , KUMAZAWA TETSUO , NAKAMURA ATSUSHI , SUZUKI HIROMICHI , TSUGANE MASAYOSHI
IPC分类号： H01L23/498 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/495
摘要： A lead frame for use with a plastic encapsulated semiconductor device includes a tab (4) on which the semiconductor chip (9) is mounted, chip pad supporting leads (5), inner leads (2a) to be electrically coupled with the semiconductor chip, outer leads (2b) formed in a monoblock structure together with the inner leads, and a frame (1) for supporting the chip pad supporting leads and outer leads. In the lead frame, there is disposed a dam member (3) only between the outer leads. Alternatively, dummy outer leads are formed between the frame and leads adjacent thereto so as to connect the dummy leads to the outer leads by the dam member. The frame is removed after the semiconductor device is assembled.

8. 发明专利

MY125460A SEMICONDUCTOR DEVICE 未知
公开(公告)号：MY125460A
公开(公告)日：2006-08-30
申请号：MYPI9700332
申请日：1997-01-29
申请人： HITACHI LTD
发明人： KITANO MAKOTO , NAGAI AKIRA , MITA MAMORU , KOHNO RYUJI , TANAKA NAOTAKA , YAGUCHI AKIHIRO , KUMAZAWA TETSUO , ANJO ICHIRO , TANAKA HIDEKI , NISHIMURA ASAO , EGUCHI SHUJI
IPC分类号： H01L21/60 , H01L23/04 , H01L23/34 , H01L23/12 , H01L23/31 , H01L23/495
摘要： A SEMICONDUCTOR DEVICE, IS PROVIDED WILL SEMICONDUCTOR CHIPS(1) HAVING A PLURALITY OF ELECTRODES (10)FOR EXTERNAL CONNECTION, ELASTOMER RESIN PORTIONS FORMED OF AN ELASTOMER RESIN(2), WHICH ARE BONDED TO THE SEMICONDUCTOR CHIP (1)EXCEPTING AT LEAST SOME OF THE PLURALITY OF ELECTRODES, A TAPE LAYER (3)OF RESIN INCLUDING TAPE WIRING PATTERNS(5) ON THE SURFACE THEREOF, A PLURALITY OF SOLDER BUMPS (7)FOR BONDING THE PRINTED WIRING PATTERN (9)TO THE TAPE WIRING PATTERNS(5), LEADS FOR CONNECTING THE PLURALITY OF ELECTRODES(10) OF THE SEMICONDUCTOR CHIPS TO THE TAPE WIRING PATTERNS, AND SEAL RESIN FOR COVERING THE LEADS AND THE PLURALITY OF ELECTRODES WHICH ARE CONNECTED BY THE LEADS. THE ELASTOMER RESIN HAS A MODULUS OF TRANSVERSE ELASTICITY NOT LESS THAN 50 MPA AND NOT MORE THAN 750 MPA.(FIG. 1)

9. 发明专利

SG63690A1 Semiconductor device 未知
公开(公告)号：SG63690A1
公开(公告)日：1999-03-30
申请号：SG1997000231
申请日：1997-02-01
申请人： HITACHI LTD
发明人： KITANO MAKOTO , KONO RYUJI , TANAKA NAOTAKA , YAGUCHI AKIHIRO , KUMAZAWA TETSUO , ANJO ICHIRO , TANAKA HIDEKI , NISHIMURA ASAO , EGUCHI SHUJI , NAGAI AKIRA , MITA MAMORU
IPC分类号： H01L23/04 , H01L23/12 , H01L23/31 , H01L23/495 , H01L21/60 , H01L23/29
摘要： A semiconductor device, is provided will semiconductor chips having a plurality of electrodes for external connection, elastomer resin portions formed of an elastomer resin, which are bonded to the semiconductor chip excepting at least some of the plurality of electrodes, a tape layer of resin including tape wiring patterns on the surface thereof, a plurality of solder bumps for bonding the printed wiring pattern to the tape wiring patterns, leads for connecting the plurality of electrodes of the semiconductor chips to the tape wiring patterns, and seal resin for covering the leads and the plurality of electrodes which are connected by the leads. The elastomer resin has a modulus of transverse elasticity not less than 50 MPa and not more than 750 MPa.

10. 发明专利

DE69120356D1 未知
公开(公告)号：DE69120356D1
公开(公告)日：1996-07-25
申请号：DE69120356
申请日：1991-09-04
申请人： HITACHI LTD
发明人： NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , YONEDA NAE , KOHNO RYUJI , MURAKAMI GEN , ANJOH ICHIRO
IPC分类号： H01L25/18 , H01L23/28 , H01L23/495 , H01L25/065 , H01L25/07
摘要： A semiconductor device comprises a plurality of semiconductor chips (1a, 1b, 1c), electrodes formed on circuit surfaces of said plurality of semiconductor chips (1a, 1b, 1c); inner leads (3a, 3b) made of a metal foil and bonded at one ends thereof to the electrodes, outer leads (4, 4a, 4b, 4c) bonded at one ends thereof to the other ends of the inner leads (3a, 3b), and a sealing material (5) sealing said plurality of semiconductor chips (1a, 1b, 1c), the electrodes, the inner leads, and part of each of the outer leads. The semiconductor chips (1a, 1b, 1c) are laminated in such a manner that those surfaces of the semiconductor chips (1a, 1b, 1c) on which their respective circuits are formed are disposed in facing relation to each other. This provides a semiconductor device which is excellent in assembling efficiency.

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