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1. 发明专利

JP2009272793A Frequency abnormality detecting circuit 有权
标题翻译：频率异常检测电路
公开(公告)号：JP2009272793A
公开(公告)日：2009-11-19
申请号：JP2008120189
申请日：2008-05-02
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YOSHIDA KATSUMI , BANDO AKIRA , OGURA MAKOTO , ISHIKAWA MASAKAZU , KOBAYASHI EIJI , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , UMEHARA TAKASHI , FURUTA YASUYUKI , OTANI TATSUYUKI
IPC分类号： H03K5/19 , G01R23/15 , H03K5/26
摘要： PROBLEM TO BE SOLVED: To solve the problem that a conventional frequency abnormality detecting circuit, in which a monitoring clock uses a frequency higher than that of a clock to be monitored, is expensive, requires a countermeasure against noise, and is difficult to mount on a substrate, and also, a conventional frequency abnormality detecting circuit, in which the monitoring clock uses a frequency lower than that of a clock to be monitored, is not only unable to detect an abnormality depending on timing of clock fixing but requires a separate configuration that prevents a warning from being issued since all register outputs constituting a shift register become "0" during a reset.
SOLUTION: An upper-limit abnormality of a clock frequency is detected by comparing the magnitude of a count value of the number of clocks to be monitored with that of an upper-limit value. A lower-limit abnormality is detected by an output of a logical AND of a positive pulse outputted at a rising edge of synchronized monitoring clocks, an initial edge hold circuit output that outputs "High" by the pulse output, and a comparator output that compares the magnitude of a lower-limit value and that of the count value of the number of clocks to be monitored.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：为了解决监视时钟使用比要监视的时钟频率高的频率的现有的频率异常检测电路的问题，需要对抗噪声的对策，并且是困难的而且，监视时钟使用比要监视的时钟低的频率的常规频率异常检测电路，不仅不能根据时钟固定的定时检测到异常，而且需要由于构成移位寄存器的所有寄存器输出在复位期间变为“0”，因此可以防止发出警告的单独配置。解决方案：通过将要监视的时钟数的计数值与上限值的大小进行比较来检测时钟频率的上限异常。通过在同步监视时钟的上升沿输出的正脉冲的逻辑AND的输出，通过脉冲输出输出“高”的初始边沿保持电路输出和比较器输出比较来检测下限异常下限值的大小以及要监视的时钟数的计数值的大小。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2008009794A Programmable electronic controller, and communication control method for programmable electronic apparatus 审中-公开
标题翻译：可编程电子控制器和可编程电子设备的通信控制方法
公开(公告)号：JP2008009794A
公开(公告)日：2008-01-17
申请号：JP2006180648
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： UMEHARA TAKASHI , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , OGURA MAKOTO , KOBAYASHI EIJI , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , SASAKI WATARU , OTSUKA YUSAKU , NAKANO AKIHIRO , OZAWA SHOICHI , MASUKO NAOYA , FUNAKI SATORU , KASAHARA TAKENORI , SEKI YUSUKE , IWASAKI YU
IPC分类号： G05B9/03 , G05B19/05 , G06F11/20 , H04L29/04
摘要： PROBLEM TO BE SOLVED: To provide a programmable electronic apparatus which operates at higher speed while satisfying requirements as functional safety (normal operation of apparatus) and has synchronism during start and stop, and multiple system switching.
SOLUTION: A state-switching signal from a central processing storage device to a system is simultaneously notified even to input-output devices connected through a serial line 1. The state-switching signal has a safety stop request signal and a system switching request signal during hardware redundancy. Further, two state-switching signals are provided, and respective polarities are inverted. Alternatively, the state-switching signals are pulse-shaped. The common part of a frame of the serial line is provided with a bit for safety stop request, or a command is provided with a new state-switching code, and its command instruction achieves simultaneous broadcast communication. According to the invention, it is possible to achieve safety as well as system synchronism. Further, it is possible to achieve control suitable for the functional safety use by using safe communication.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种在满足作为功能安全（装置的正常运行）的要求并且在启动和停止期间具有同步以及多系统切换的高速运行的可编程电子装置。解决方案：即使对于通过串行线路1连接的输入输出设备，也将来自中央处理存储设备的系统的状态切换信号同时通知。状态切换信号具有安全停止请求信号和系统切换在硬件冗余期间请求信号。此外，提供两个状态切换信号，并且各极性反转。或者，状态切换信号是脉冲形的。串行线路的公共部分被提供有安全停止请求的位，或者指令被提供有新的状态切换代码，并且其命令指令实现同时的广播通信。根据本发明，可以实现安全性和系统同步性。此外，可以通过使用安全通信来实现适合于功能安全用途的控制。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2008009793A Control device, control method and control program 有权
标题翻译：控制装置，控制方法和控制程序
公开(公告)号：JP2008009793A
公开(公告)日：2008-01-17
申请号：JP2006180645
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： ONOZUKA AKIHIRO , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , OGURA MAKOTO , UMEHARA TAKASHI , KOBAYASHI EIJI , FUNAKI SATORU , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , NAKANO AKIHIRO , MASUKO NAOYA , OZAWA SHOICHI , KASAHARA TAKENORI , SEKI YUSUKE , OTANI TATSUYUKI , IWASAKI YU
IPC分类号： G05B23/02 , H04L13/08
摘要： PROBLEM TO BE SOLVED: To provide a communication control device, transferring by wire a plurality of input modules, in a process control system, without addition of counters or deterioration of transfer performance.
SOLUTION: A communication control device of a receiver is provided with a clock counter, an input buffer for temporarily storing input data and a clock buffer for temporarily storing a clock value of the clock counter, in which update of the buffers are simultaneously permitted. Further, the communication control device of the receiver includes a means for transmitting one clock value and a plurality of input values, and a communication control device of a transmitter includes a means for developing one clock value to a plurality of input values.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供通信控制装置，在过程控制系统中通过线路传送多个输入模块，而不增加计数器或转移性能的劣化。解决方案：接收机的通信控制装置设置有时钟计数器，用于临时存储输入数据的输入缓冲器和用于临时存储时钟计数器的时钟值的时钟缓冲器，其中缓冲器的更新同时允许的。此外，接收机的通信控制装置包括用于发送一个时钟值和多个输入值的装置，并且发射机的通信控制装置包括用于将多个输入值显示一个时钟值的装置。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2006338426A Calculator system 审中-公开
标题翻译：计算机系统
公开(公告)号：JP2006338426A
公开(公告)日：2006-12-14
申请号：JP2005163425
申请日：2005-06-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ENDO HIROMICHI , NAGAYAMA HISAO , OGURA MAKOTO , FUNAKI SATORU , YAMADA TSUTOMU , BANDO AKIRA , MASUKO NAOYA , UMEHARA TAKASHI , KOBAYASHI MASAMITSU , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO
IPC分类号： G06F12/00 , G06F12/14
摘要： PROBLEM TO BE SOLVED: To solve a problem of increase in device weight in a conventional controller generally constructed of a component device responsible for usability and a component device responsible for safety separately.
SOLUTION: When an access control state from a processor side and that from an input/output device side to a shared resource is changed in a switch between a normal control mode and a safe control mode, the both control modes coexist on the same calculator system. Therefore, in this calculator system capable of operating a plurality of tasks and having the shared resource used by a plurality of tasks and a plurality of control modes for operating one or more tasks under the respective control modes, an access control state for access from the respective tasks to the shared resource is applied to each control mode, and synchronously with the switch of the control mode, the access control state is switched.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了解决通常由负责可用性的部件装置构成的常规控制器和分别负责安全的部件装置的设备重量增加的问题。解决方案：当在正常控制模式和安全控制模式之间的切换中改变来自处理器侧和从输入/输出设备侧到共享资源的访问控制状态时，两个控制模式共存于相同的计算器系统。因此，在能够操作多个任务并具有多个任务所使用的共享资源的该计算器系统和用于在各个控制模式下操作一个或多个任务的多个控制模式的访问控制状态下，将共享资源的各个任务应用于每个控制模式，并且与控制模式的切换同步，切换访问控制状态。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2009175971A Control device 有权
标题翻译：控制装置
公开(公告)号：JP2009175971A
公开(公告)日：2009-08-06
申请号：JP2008012935
申请日：2008-01-23
申请人： Hitachi Engineering & Services Co Ltd , Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立エンジニアリング・アンド・サービス , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： OTSUKA YUSAKU , MASUKO NAOYA , OGURA MAKOTO , IWASAKI YU , MURAKAWA RYUICHI , BANDO AKIRA , SASAKI WATARU , YOSHIKAWA HIDEYUKI , KOBAYASHI MASAMITSU
IPC分类号： G06F9/48
CPC分类号： G06F9/4887
摘要： PROBLEM TO BE SOLVED: To make both accurate control on the same control device and control for information such as communication be compatible. SOLUTION: The controller 1 of the hardware part of a control device is configured to perform a control arithmetic operation from a signal from an input/output device 3, and to output a control arithmetic result through an input/output device 3 to a process 4, and provided with a timer part 17 to be excited in a fixed cycle. A software part is provided with a processing part 55 for an information; a processing part 54 for control; and an interruption management part 53 for switching the processing part 55 for information and the processing part 54 for control. Every time a timer 17 is excited, the interruption management part 53 executes a processing part 54 for control by interrupting the execution of the processing part 55 for information, and resumes the execution of the processing part 55 for information when the execution of the processing part 54 for control ends, and switches the processing part 55 for information and the processing part 54 for control. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：使同一控制设备的精确控制和通信等信息的控制兼容。解决方案：控制装置的硬件部分的控制器1被配置为根据来自输入/输出装置3的信号执行控制算术运算，并且通过输入/输出装置3将控制算术结果输出到处理4，并且设置有定时部件17，以在固定循环中被激励。软件部件具有用于信息的处理部分55; 用于控制的处理部54; 以及用于切换用于信息的处理部分55和用于控制的处理部分54的中断管理部分53。每当定时器17被激励时，中断管理部分53通过中断处理部分55的信息的执行来执行用于控制的处理部分54，并且当执行处理部分时恢复处理部分55的执行 54用于控制结束，并且切换用于信息的处理部分55和用于控制的处理部分54。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2007293678A Apparatus for diagnosing common bus connection 审中-公开
标题翻译：用于诊断通用总线连接的装置
公开(公告)号：JP2007293678A
公开(公告)日：2007-11-08
申请号：JP2006122132
申请日：2006-04-26
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ENDO HIROMICHI , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO , YAMADA TSUTOMU , FUNAKI SATORU , BANDO AKIRA , KOBAYASHI MASAMITSU , OGURA MAKOTO , KOBAYASHI EIJI
IPC分类号： G06F13/00 , G06F11/22
摘要： PROBLEM TO BE SOLVED: To provide a diagnostic control system for safely and correctly perform diagnosis by preventing the malfunction of a module due to a test pattern or the error of a diagnostic report concerning the diagnosis of a common bus. SOLUTION: A subordinate control module 20 outputs respectively opposite potentials to a diagnostic state report signal line 42 and a normal state report signal line 43 in response to its own operation state. After it is confirmed that the whole subordinate modules 20 is shifted to a diagnosable state by the potentials of the diagnostic state report signal line 42 and the normal state report signal line 43, a main diagnostic control part 11 outputs the test pattern 31 onto a control bus 30 so as to start diagnosis. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种诊断控制系统，用于通过防止由于测试模式引起的模块故障或者关于公共总线诊断的诊断报告的错误来安全地并且正确地执行诊断。解决方案：下属控制模块20响应于其自身的操作状态，分别向诊断状态报告信号线42和正常状态报告信号线43输出相对的电位。在通过诊断状态报告信号线42和通常状态报告信号线43的电位确认整个下属模块20被切换到可诊断状态之后，主诊断控制部11将测试图案31输出到控制总线30，以便开始诊断。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007043679A Sending device, receiving device, and communication system 有权
标题翻译：发送设备，接收设备和通信系统
公开(公告)号：JP2007043679A
公开(公告)日：2007-02-15
申请号：JP2006178896
申请日：2006-06-29
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： ISHIKAWA MASAKAZU , ONOZUKA AKIHIRO , OGURA MAKOTO , SHIRAISHI MASAHIRO , UMEHARA TAKASHI , MASUKO NAOYA , NAGAYAMA HISAO , ENDO HIROMICHI , FUNAKI SATORU , KOBAYASHI MASAMITSU , BANDO AKIRA , KOBAYASHI EIJI , FURUTA YASUYUKI
IPC分类号： H04L29/10 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To attain both a high performance and safety in data communication between a controller and a process I/O unit.
SOLUTION: The device is provided with a circuit which generates and adds a CRC (Cyclic Redundancy Check) to a transmitted data of the controller and the process I/O unit, a circuit which checks the CRC of a received data, and a status register which selects operation modes of operation or stop of a CRC generation and a check function and shows CRC errors in each device, and inconsistency of the operation mode of a transmitter and a recipient of the data. It also performs a check of the CRC in a relay communication device. When two or more relay communication devices exist, the CRC for transmission between relay communication devices is additionally added, the CRC check result in each device of the controller, the relay communication device, and the process I/O unit is reflected in the status register, the soundness of the data between terminals is checked, the data having errors generated in a transceiver process is prevented from being used, and the device is prevented from a malfunction.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了在控制器和处理I / O单元之间实现数据通信的高性能和安全性。解决方案：该设备具有电路，该电路为控制器和处理I / O单元的发送数据生成CRC（循环冗余校验），检查接收到的数据的CRC的电路，以及选择操作模式或停止CRC生成和检查功能的状态寄存器，并且在每个设备中显示CRC错误，以及发送器的操作模式与数据的接收者的不一致。它还执行中继通信设备中的CRC校验。当存在两个以上的中继通信装置时，还附加用于中继通信装置之间传输的CRC，控制器，中继通信装置和处理I / O单元的每个装置的CRC校验结果反映在状态寄存器检查终端之间的数据的正确性，防止在收发器处理中产生的错误的数据被使用，并且防止装置发生故障。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2007011639A Input/output control apparatus, information control apparatus, input/output control method, and information control method 有权
标题翻译：输入/输出控制装置，信息控制装置，输入/输出控制方法和信息控制方法
公开(公告)号：JP2007011639A
公开(公告)日：2007-01-18
申请号：JP2005190874
申请日：2005-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： OGURA MAKOTO , FUNAKI SATORU , BANDO AKIRA , UMEHARA TAKASHI , NAGAYAMA HISAO , KOBAYASHI MASAMITSU , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , MASUKO NAOYA , ENDO HIROMICHI
IPC分类号： G06F11/18 , G06F13/12
摘要： PROBLEM TO BE SOLVED: To solve the problem that a programmable electronic apparatus must be divided into a programmable electronic apparatus for high reliability and a programmable electronic apparatus for high performance processing because the programmable electronic apparatus executes identical processing by a plurality of processors so as to obtain reliability to improve the reliability owing to the coincidence of outputs; on one side, the plurality of processors always execute the identical processing, so that the processing performance per processor is reduced to half; and on the other side, the processing not requiring its reliability requires the processing performance, so that high reliability becomes incompatible with high processing performance.
SOLUTION: The programmable electronic device has the plurality of processors, improves the processing performance by independently operating usual control and network processing in use of different processors, interrupts the other processors only in executing processing to require reliability to make them execute processing requiring the same high reliability to realize both the improvement of the reliability resulting from coincidence among a plurality of outputs of the processors, and that of the processing performance.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：为了解决可编程电子设备必须被划分为高可靠性的可编程电子设备和用于高性能处理的可编程电子设备的问题，因为可编程电子设备通过多个处理器执行相同的处理以获得可靠性，由于输出的一致性提高可靠性; 一方面，多个处理器总是执行相同的处理，使得每个处理器的处理性能减少到一半; 另一方面，不需要其可靠性的处理需要处理性能，使得高可靠性与高处理性能不兼容。解决方案：可编程电子设备具有多个处理器，通过独立操作使用不同处理器的常规控制和网络处理来提高处理性能，仅在执行处理时中断其他处理器以要求可靠性使其执行需要的处理具有相同的高可靠性，以实现由处理器的多个输出之间的一致性导致的可靠性的提高以及处理性能的提高。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2006338425A Controller 审中-公开
标题翻译： CONTROLLER
公开(公告)号：JP2006338425A
公开(公告)日：2006-12-14
申请号：JP2005163424
申请日：2005-06-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： FUNAKI SATORU , OGURA MAKOTO , NAGAYAMA HISAO , ENDO HIROMICHI , YAMADA TSUTOMU , UMEHARA TAKASHI , MASUKO NAOYA , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO , KOBAYASHI MASAMITSU , BANDO AKIRA
IPC分类号： G06F11/18
摘要： PROBLEM TO BE SOLVED: To solve the problem that a system to collate outputs of a plurality of processors regardless of the synchronization/nonsynchronization of the outputs of the processors is required in a future control system composed of a plurality of processors in order to diagnose the soundness of the processors by collating the outputs of the processors because it is difficult to synchronize processor outputs.
SOLUTION: The control system is provided with a timing sequence means for determining the synchronization/nonsynchronization of output timing from control signals from the respective processors, an ID/data selecting means for selecting data in a queue and storing the data in the queue based on a unique ID being part of the output from the processors, and a data collating means for collating data output by the ID/data selecting means.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题为了解决在由多个处理器组成的将来的控制系统中需要按顺序对由多个处理器的输出进行同步/非同步而进行整理多个处理器的输出的系统的系统的问题通过整理处理器的输出来诊断处理器的可靠性，因为难以使处理器输出同步。解决方案：控制系统具有定时序列装置，用于根据来自各个处理器的控制信号确定输出定时的同步/非同步; ID /数据选择装置，用于选择队列中的数据并将数据存储在基于作为来自处理器的输出的一部分的唯一ID的队列，以及用于对比由ID /数据选择装置输出的数据的数据对照装置。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2008262557A Task management device for controller and task management method for controller 有权
标题翻译：用于控制器的任务管理设备和控制器的任务管理方法
公开(公告)号：JP2008262557A
公开(公告)日：2008-10-30
申请号：JP2008089158
申请日：2008-03-31
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： BANDO AKIRA , OGURA MAKOTO , UMEHARA TAKASHI , KOBAYASHI MASAMITSU , NAGAYAMA HISAO , MASUKO NAOYA , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , ENDO HIROMICHI , YAMADA TSUTOMU , FUNAKI SATORU
IPC分类号： G06F11/18
摘要： PROBLEM TO BE SOLVED: To simultaneously achieve the miniaturization, improvement of performance, and safety of a device by using a plurality of processors for improving reliability. SOLUTION: Processing results which are operated on a common data processing target to allow mutual compatibility are inputted to a plurality of processors. When receiving a start signal from one processor, a calculation instruction signal is outputted to the processors so that the operation timing of one processor differs from that of the other processor. A calculation effect of one processor is compared with that of the other processor, In this way, the miniaturization, improvement of performance, and safety are simultaneously achieved for a plurality of processors, and high reliability can be obtained. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过使用多个处理器来同时实现设备的小型化，性能的提高和安全性，以提高可靠性。解决方案：在公共数据处理目标上操作以允许相互兼容的处理结果被输入到多个处理器。当从一个处理器接收到起始信号时，将计算指令信号输出到处理器，使得一个处理器的操作定时与另一处理器的操作定时不同。将一个处理器的计算效果与其他处理器的计算效果进行比较。这样，可以同时实现多个处理器的小型化，性能提高和安全性的提高，可以获得高可靠性。版权所有（C）2009，JPO＆INPIT

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