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1. 发明专利

JP2003273273A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2003273273A
公开(公告)日：2003-09-26
申请号：JP2002073159
申请日：2002-03-15
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ANDO HIDEKO , MIYAMOTO SEIJI
IPC分类号： H05K3/46 , H01L23/12 , H01L23/498 , H01L23/66 , H05K1/00 , H05K1/02
CPC分类号： H01L23/66 , H01L23/49822 , H01L2224/16 , H01L2224/16235 , H01L2924/15173 , H01L2924/15311 , H01L2924/19105 , H01L2924/3011 , H05K1/024 , H05K1/0298 , H05K3/4602 , H05K2201/0191
摘要： PROBLEM TO BE SOLVED: To accurately regulate the characteristic impedance of a wiring. SOLUTION: A semiconductor device comprises a first insulating layer 4i between a first wiring layer 4d and a second wiring layer 4e of a core layer 4c having a thickness (D) increased relative to the first wiring 4m of the layer 4e disposed in a through hole 4r of the core layer 4c in a package board 4, a thickness (C) of the layer 4j between the first wiring layer 4d of the reverse side plane layer decreased. Thus, the coupling of a power source plane of the first wiring layer 4d on the surface of the core layer 4c and the impedance of the first wiring 4m and a second wiring 4n is weakened, and a power source plane shown in a reverse side third wiring layer 4f and the impedance of the first wiring 4m or the second wiring 4n can be strengthened, and the unevenness of the characteristic impedance between the wiring 4m directly on the hole 4r and the second wiring 4n disposed by avoiding from directly above the hole 4r can be reduced. COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：准确调节布线的特性阻抗。解决方案：半导体器件包括第一布线层4d和芯层4c的第二布线层4e之间的第一绝缘层4i，芯层4c的厚度（D）相对于布置在层4e中的层4e的第一布线4m增加封装板4中的芯层4c的通孔4r，反面平面层的第一布线层4d之间的层4j的厚度（C）减小。因此，芯层4c的表面上的第一配线层4d的电源面与第一配线4m的阻抗与第二配线4n的耦合被削弱，反之，第三配线可以加强布线层4f和第一布线4m或第二布线4n的阻抗，并且通过从孔4r的正上方避开而直接设置在孔4r上的布线4m和第二布线4n之间的特性阻抗的不均匀性可以减少版权所有（C）2003，JPO

2. 发明专利

JP2008034890A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2008034890A
公开(公告)日：2008-02-14
申请号：JP2007279064
申请日：2007-10-26
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , KUBO TAKASHI , SUGA TAKU , SASAKI HIROYASU , ANDO HIDEKO , FUKUHARA MASANORI , ISOMURA SATORU
IPC分类号： H01L23/12
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To attain miniaturization of a semiconductor device. SOLUTION: The semiconductor device is composed of: a package substrate 4 having a microstripline 4g composed of a surface layer wiring 4c for a signal and a GND layer 4f; a high frequency semiconductor chip 2 mounted on the principal surface 4a of the package substrate 4 by means of flip-chip connection; a coaxial cable 7 where a core wire 7a is electrically connected to the surface layer wiring 4c for a signal; an underfill resin 6 for protecting the flip-chip connection portion of the semiconductor chip 2; a plurality of ball electrodes 3 arranged on the rear surface 4b of the package substrate 4; and a coaxial connector 11 provided to a frame member 8 attached to the package substrate 4; and provided with a structure which can transmit a high frequency signal from the coaxial cable 7 to all the surface layers of the package substrate 4 by only the microstripline, thereby miniaturization of the package can be attained by arranging the plurality of ball electrodes 3 in an array on the rear surface 4b of the package substrate 4. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了实现半导体器件的小型化。解决方案：半导体器件由以下组成：具有由用于信号的表面层布线4c和GND层4f构成的微带线4g的封装基板4; 通过倒装芯片连接安装在封装基板4的主表面4a上的高频半导体芯片2; 同轴电缆7，其中芯线7a电连接到用于信号的表层布线4c; 用于保护半导体芯片2的倒装芯片连接部分的底部填充树脂6; 布置在封装基板4的后表面4b上的多个球电极3; 以及设置在安装在封装基板4上的框架部件8的同轴连接器11; 并且具有能够通过仅由微带线从同轴电缆7将高频信号发送到封装基板4的全部表层的结构，由此能够通过将多个球电极3配置在阵列位于封装基板4的背面4b上。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2010141366A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2010141366A
公开(公告)日：2010-06-24
申请号：JP2010065484
申请日：2010-03-23
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , KUBO TAKASHI , SUGA TAKU , SASAKI HIROYASU , ANDO HIDEKO , FUKUHARA MASANORI , ISOMURA SATORU
IPC分类号： H01L23/12
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/15311 , H01L2924/16251 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To downsize a semiconductor device by arranging a plurality of terminals for external connection in a surface of a wiring board.
SOLUTION: This semiconductor device includes: a package board 4 having an optical communication IC mounted thereon, and including a micro-strip line 4g having surface layer wiring 4c for a signal and a GND layer 4f; a high-frequency semiconductor chip 2 mounted on a principal surface 4a of the package board 4 by flip chip connection; a coaxial cable 7 with a core 7a electrically connected to the surface layer wiring 4c for a signal; an underfill resin 6 for protecting the flip chip connection part of the semiconductor chip 2; a plurality of ball electrodes 3 arranged in the back face 4b of the package board 4; and a coaxial connector 11 arranged on a frame member 8 attached to the package board 4. The semiconductor device includes a structure capable of transmitting a high-frequency signal from the coaxial cable 7 to all the surface layer of the package board 4 only by the micro-strip line, and allows the package to be downsized by arranging the plurality of ball electrodes 3 in an array-like form on the back face 4b of the package board 4.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过在布线板的表面中布置用于外部连接的多个端子来缩小半导体器件的尺寸。解决方案：该半导体器件包括：安装有光通信IC的封装板4，并且包括具有用于信号的表面层布线4c和GND层4f的微带线4g; 通过倒装芯片连接安装在封装板4的主表面4a上的高频半导体芯片2; 同轴电缆7，其具有与表面层布线4c电连接用于信号的芯体7a; 用于保护半导体芯片2的倒装芯片连接部分的底部填充树脂6; 布置在封装板4的背面4b中的多个球电极3; 以及布置在附接到封装板4的框架构件8上的同轴连接器11.半导体器件包括能够仅将高频信号从同轴电缆7发送到封装板4的所有表面层的结构微带线，并且通过将多个球形电极3排列成包装板4的背面4b上的多个球形电极3来缩小尺寸。（C）2010，JPO＆INPIT

4. 发明专利

JP2007158357A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007158357A
公开(公告)日：2007-06-21
申请号：JP2006350864
申请日：2006-12-27
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , KUBO TAKASHI , SUGA TAKU , SASAKI HIROYASU , ANDO HIDEKO , FUKUHARA MASANORI , ISOMURA SATORU
IPC分类号： H01L23/12
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To attain miniaturization of a semiconductor device for optical communication that uses a coaxial cable.
SOLUTION: The semiconductor device consists of a package substrate 4 which has a microstripline 4g which consists of signal surface layer wiring 4c and a GND layer 4f; a high-frequency semiconductor chip 2 which is mounted in the main surface 4a of the package substrate 4 by flip-chip connection; a coaxial cable 7 in which a core wire 7a is electrically connected to the signal surface layer wiring 4c; underfill resin 6 which protects a flip-chip connection part of the semiconductor chip 2; a plurality of ball electrodes 3 which are arranged in a backside 4b of the package substrate 4; and a coaxial connector 11 which is provided in a frame member 8 attached to the package substrate 4. The semiconductor device has a structure, which can transmit the high-frequency signal from the coaxial cable 7 to all the surface layers of the package substrate 4 by only the microstripline. By having a plurality of ball electrodes 3 arranged in an array in the backside 4b of the package substrate 4 miniaturization of the package can be attained.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了实现使用同轴电缆的用于光通信的半导体器件的小型化。解决方案：半导体器件由具有由信号表面层布线4c和GND层4f组成的微带线4g的封装基板4组成。高频半导体芯片2，其通过倒装芯片连接安装在封装基板4的主表面4a中; 芯线7a与信号表面层布线4c电连接的同轴电缆7; 底部填充树脂6，其保护半导体芯片2的倒装芯片连接部分; 布置在封装基板4的背面4b中的多个球形电极3; 以及设置在安装在封装基板4上的框架部件8中的同轴连接器11.半导体器件具有能够将高频信号从同轴电缆7发送到封装基板4的全部表面层的结构只有微星线。通过在封装基板4的背面4b具有排列成阵列的多个球形电极3，能够实现封装的小型化。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2000077554A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2000077554A
公开(公告)日：2000-03-14
申请号：JP24237098
申请日：1998-08-27
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ANDO HIDEKO , KIKUCHI HIROSHI , SATO TOSHIHIKO
IPC分类号： H01L23/12
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To prevent harmful phenomena and to eliminate adverse effects on human health and environment by using lead-free solder bump which does not contain lead as a solder bump electrically for connecting a semiconductor chip to a package substrate. SOLUTION: For this semiconductor device, a solder bump 3 electrically connects a pad 1a formed as an external electrode on the surface of a semiconductor chip 1 to a pad 2a formed, as an external electrode on the surface of a package 2. As the solder bump 3, a lead-free solder bump which has a melting point at 250 deg.C or above and does not contain a lead, is used. As a result, since the solder bump 3 does not contain harmful lead, a harmful phenomena are prevented, and such conventional problems affecting human health and environment are prevented from occurring.
摘要翻译：要解决的问题：通过使用不含铅的无铅焊料作为用于将半导体芯片连接到封装基板的焊料凸块，来防止有害现象和消除对人体健康和环境的不利影响。解决方案：对于该半导体器件，焊料凸块3将形成为半导体芯片1的表面上的外部电极的焊盘1a电连接到在封装2的表面上形成的焊盘2a作为外部电极。作为焊料凸点3，使用熔点在250℃以上且不含引线的无铅焊料凸点。结果，由于焊锡凸块3不含有害铅，因此防止了有害现象，防止了影响人体健康和环境的传统问题。

6. 发明专利

JP2010161416A Electronic device 审中-公开
标题翻译：电子设备
公开(公告)号：JP2010161416A
公开(公告)日：2010-07-22
申请号：JP2010088669
申请日：2010-04-07
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , NAKAZATO NORIO , ANDO HIDEKO , SUGA TAKU , ISOMURA SATORU , KUBO TAKASHI , SASAKI HIROYASU , FUKUHARA MASANORI , TANAKA TADAYOSHI , NOSE FUJIAKI
IPC分类号： H01L23/12 , H01P3/08
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To improve quality of high-frequency characteristics of a semiconductor device and an electronic device. SOLUTION: A high-frequency signal from a tape-like line portion 40 having a surface-layer lead 40g and surface-layer GND leads 40h on both sides thereof is input directly to a semiconductor chip through a signal surface-layer portion of a package substrate and further a solder bump electrode, or on the contrary a high-frequency signal from the semiconductor chip is output to the outside through the tape-like line portion 40, and the high-frequency signals can be transmitted through only all microstrip lines of a surface layer of the package substrate, so that the high-frequency signals can be transmitted not through a via etc., but through only the microstrip lines. Consequently, the high-frequency signals can be transmitted without any loss in frequency characteristics, and loss in high-frequency transmission is reduced to transmit high-frequency signals of high quality. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高半导体器件和电子器件的高频特性的质量。解决方案：具有表面层引线40g和表面层GND两端的导通40h的带状线部分40的高频信号通过信号表面层部分直接输入到半导体芯片的封装基板和另外的焊料凸块电极，或者相反，来自半导体芯片的高频信号通过带状线部分40输出到外部，并且高频信号可以仅通过全部微带线，使得高频信号不能通过通孔等而仅通过微带线传输。因此，可以在没有频率特性的任何损失的情况下传输高频信号，并且降低高频传输中的损耗以传输高质量的高频信号。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2007235149A Semiconductor device and electronic device 审中-公开
标题翻译：半导体器件和电子器件
公开(公告)号：JP2007235149A
公开(公告)日：2007-09-13
申请号：JP2007096464
申请日：2007-04-02
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , NAKAZATO NORIO , ANDO HIDEKO , SUGA TAKU , ISOMURA SATORU , KUBO TAKASHI , SASAKI HIROYASU , FUKUHARA MASANORI , TANAKA TADAYOSHI , NOSE FUJIAKI
IPC分类号： H01L23/12 , H01P3/08 , H01P5/08
CPC分类号： H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To transmit a high frequency signal without degrading frequency characteristics, and to transmit the high frequency signal of high quality with less loss in high frequency transmission. SOLUTION: The high frequency signal from a tape-shaped line part 40 comprising a surface signal lead 40g and surface GND leads 40h arranged on both sides thereof is inputted directly to a semiconductor chip via surface wiring for signal of a package substrate and further transmitted through a solder bump electrode, or in an opposite direction, the high frequency signal from the semiconductor chip is outputted to the external part via the tape-shaped line part 40. By transmitting the high frequency signal only with all micro strip lines of the surface layer of a package board in this way, the high frequency signal is transmitted only with the micro strip line of the surface layer not through a via, etc. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：在不降低频率特性的情况下发送高频信号，并且在高频率传输中以较少的损耗发送高质量的高频信号。解决方案：包括表面信号引线40g和布置在其两侧的表面GND引线40h的带状线部分40的高频信号通过用于封装基板信号的表面布线直接输入到半导体芯片，进一步透过焊料凸点电极或相反的方向，来自半导体芯片的高频信号通过带状线部分40被输出到外部部分。通过仅将高频信号传输到所有的微带线以这种方式，封装板的表面层，只有表面层的微带线不通过通孔等传输高频信号。（C）2007，JPO＆INPIT

8. 发明专利

JP2005150188A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2005150188A
公开(公告)日：2005-06-09
申请号：JP2003382123
申请日：2003-11-12
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ANDO HIDEKO , KIKUCHI HIROSHI
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2924/01019 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide technology which improve heat dissipation efficiency of a multi-chip package.
SOLUTION: A lower chip 2 is joined to lower chip loading area of the surface of a lower package substrate 1a which constitutes package substrate 1 with its principal surface upside. And upper chip 4 is mounted in flip chip loading area of surface of lower package substrate 1b so as to straddle the lower chip 2 with its principal surface downside. After connecting electrode pad formed in a flip chip loading area with bump 5 formed on perimeter of it of the upper case chip 4, a part between the upper chip 4 and the lower 2 is filled up with resin 6, and a rear face of the upper chip 4 is exposed.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供提高多芯片封装的散热效率的技术。解决方案：下芯片2被连接到构成封装基板1的下封装基板1a的表面的下芯片加载区域，其主表面向上。并且上芯片4安装在下封装基板1b的表面的倒装芯片加载区域中，以便以下表面的主表面跨越下芯片2。在形成在倒装芯片装载区域中的形成在上壳体芯片4的周边上的凸起5的电极焊盘之后，上部芯片4和下部2之间的部分填充有树脂6，并且上芯片4暴露。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2004153179A Semiconductor device and electronic device 有权
公开(公告)号：JP2004153179A
公开(公告)日：2004-05-27
申请号：JP2002318936
申请日：2002-10-31
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIKUCHI HIROSHI , NAKAZATO NORIO , ANDO HIDEKO , SUGA TAKU , ISOMURA SATORU , KUBO TAKASHI , SASAKI HIROYASU , FUKUHARA MASANORI , TANAKA TADAYOSHI , NOSE FUJIAKI
IPC分类号： H01L23/12 , H01P3/08 , H01P5/08
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To improve high frequency characteristics by reducing transmission loss of high frequency, by transmitting a high frequency signal via a transmission line part connected to a surface layer wiring of a wiring board. SOLUTION: The high frequency signal from a tape-shaped line part 40 comprising a surface signal lead 40g and surface GND leads 40h arranged on both sides thereof is inputted directly to a semiconductor chip via surface wiring for signal of a package substrate and further transmitted through a solder bump electrode, or on the contrary the high frequency signal from the semiconductor chip is outputted to the external part via the tape-shaped line part 40. By transmitting the high frequency signal only with all micro strip lines of the surface layer of a package board in this way, the high frequency signal is transmitted only with the micro strip line of the surface layer not through a via, etc. Consequently the high frequency signal is transmitted without loss of frequency characteristics, and the high frequency signal of high quality is transmitted with less loss in high frequency transmission. COPYRIGHT: (C)2004,JPO

10. 发明授权

US6433412B2 Semiconductor device and a method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6433412B2
公开(公告)日：2002-08-13
申请号：US80058901
申请日：2001-03-08
申请人： HITACHI LTD
发明人： ANDO HIDEKO , KIKUCHI HIROSHI , YOSHIDA IKUO , SATO TOSHIHIKO , SHIMIZU TOMO
IPC分类号： H01L23/28 , H01L21/56 , H01L21/60 , H01L23/02 , H01L23/12 , H01L23/24 , H01L23/36 , H01L25/00 , H01L25/16
CPC分类号： H01L24/32 , H01L21/563 , H01L23/24 , H01L23/3135 , H01L24/29 , H01L25/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/27013 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73257 , H01L2224/83051 , H01L2224/83102 , H01L2224/92125 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01056 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/351 , H01L2924/00012 , H01L2224/13111 , H01L2924/00014 , H01L2924/0665 , H01L2924/00
摘要： A central portion of a main face of a package substrate 2 is mounted with a memory chip 1 using face down bonding by a flip chip bonding system. Further, a plurality of chip condensers 7 are mounted at vicinities of the memory chip 1. A clearance between a main face (lower face) of the memory chip 1 and a main face of the package substrate 2 is filled with underfill resin (seal resin) 10 constituting a seal member for achieving protection of connecting portions and for relaxation of thermal stress. An outer edge of the underfill resin 10 is extended to an outer side of the memory chip 1 and covers entire faces of the chip condensers 7 mounted at vicinities of the memory chip 1.
摘要翻译：封装基板2的主面的中心部分通过倒装芯片接合系统使用面朝下接合安装有存储芯片1。此外，在存储芯片1的附近安装多个芯片冷凝器7.将存储芯片1的主面（下表面）与封装基板2的主面之间的间隙填充有底部填充树脂（密封树脂）10构成用于实现对连接部分的保护和用于放松热应力的密封构件。底部填充树脂10的外边缘延伸到存储芯片1的外侧，并覆盖安装在存储芯片1附近的芯片电容器7的整个面。

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