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1. 发明专利

JPS60124945A PELLET BONDER 失效
公开(公告)号：JPS60124945A
公开(公告)日：1985-07-04
申请号：JP23397683
申请日：1983-12-12
申请人： HITACHI LTD , HITACHI SETSUBI KOGYO KK
发明人： KANO HIDEO , SAKAI RIYUUICHIROU , HIRAYAMA HIDEO , KAWASAKI YOSHIFUMI , KIMURA TAKASHI
IPC分类号： H01L21/52 , H01L21/58
摘要： PURPOSE:To put a pellet and a stem into high-accurate positioning by a method wherein the title device is composed of an image processing unit including a camera recognizing the pattern of pellets, an operation unit discriminating the state of positioning of the pellet to the center of the stem on the basis of its result, and a correction mechanism correcting the pellet position on the stem according to the output of judgement. CONSTITUTION:On a positioning mechanism 3 incorporating a heater 4, the pellet 1 with the stem 2 fixed to the back with solder 13 is accurately mounted by using a collet 5. Next, a cooling pipe 14 is provided above the pellet 1 in an oblique direction, the tip of which is then covered with an illuminating system 6, and the camera 8 is arranged above this via optical system 7. Thereafter, the image signals of the pellet 1 obtained by the camera 8 are transmitted to the image processing unit 9, and the positional slippage of the pellet 1 off from the center of the stem 2 is calculated out by processing the output in the operation unit 10. Next, a position correcting machine 11 is operated on the basis of the result, and then the position of the pellet 1 is corrected by means of a position correcting pawl 12.

2. 发明专利

JPH047103B2 失效
公开(公告)号：JPH047103B2
公开(公告)日：1992-02-07
申请号：JP7257882
申请日：1982-05-01
申请人： HITACHI LTD
发明人： MATSUZAKI HITOSHI , SAKURADA SHUROKU , HIRAYAMA HIDEO , MURAKAMI MASAHIRO , SUNAI SHIGEO
IPC分类号： H01L21/60 , H01L21/607 , H01L23/045

3. 发明专利

JPS53114354A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS53114354A
公开(公告)日：1978-10-05
申请号：JP3108178
申请日：1978-03-20
申请人： HITACHI LTD
发明人： SHIMA KENZOU , HIRAYAMA HIDEO , HASHIMOTO TOSHIHIKO
IPC分类号： H05K5/00 , H01L23/16 , H01L23/29 , H01L23/31 , H05K5/06
摘要： PURPOSE:To obtain easily the excellently heat radiative device whose thermal expansion coefficient approximates to that of an elemnt, by providing a glass fiber group axially to the circumference of the element with one pair of lead lines extending coaxially and by sealing it by the resin with a charging material.

4. 发明专利

JPS58191459A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS58191459A
公开(公告)日：1983-11-08
申请号：JP7257882
申请日：1982-05-01
申请人： Hitachi Ltd
发明人： MATSUZAKI HITOSHI , SAKURADA SHIYUUROKU , HIRAYAMA HIDEO , MURAKAMI MASAHIRO , SUNAI SHIGEO
IPC分类号： H01L21/60 , H01L21/607 , H01L23/045
CPC分类号： H01L23/045 , H01L2224/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/4823 , H01L2224/49 , H01L2224/85148 , H01L2224/85951 , H01L2924/01013 , H01L2924/01082 , H01L2924/1301 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To omit middle electrode insulating bases, and to contrive to simplify lead wiring structure and to facilitate workability of the semiconductor device by a method wherein middle electrodes are arranged on one side of a semiconductor chip, and spacers are interposed between the middle electrodes and a supporting base when Al ultrasonic bonding is to be performed. CONSTITUTION:The middle electrodes 14, 15 are arranged on the same side inrelation to the semiconductor chip 10, and are fixed to outside leads 12, 13 to be supported. The directions of the first bonding and the second bonding of Al ultrasonic bonding coincide, to rotate the supporting base 11 during bonding work is unnecessary, and workability of bonding is enhanced. When the spacers 44 are arranged between the middle electrodes 14, 15 and the supporting base 11, bending deformation toward the lower side of the middle electrodes 14, 15 according to load at bonding time is not generated, the middle electrode insulating bases become useless, the number of parts is reduced, and packing structure is simplified.
摘要翻译：目的：省略中间电极绝缘基底，并且通过其中中间电极布置在半导体芯片的一侧上的方法，并且旨在简化引线结构并且便于半导体器件的可加工性，并且间隔物插入在中间电极和当执行Al超声波接合时的支撑基座。构成：中间电极14,15与半导体芯片10相对配置在同一侧，并且被固定到外部引线12,13以被支撑。 Al超声波接合的第一接合方向和第二接合方向与接合加工时的支撑基座11不一致，能够提高接合的加工性。当间隔物44布置在中间电极14,15和支撑基座11之间时，不会产生根据接合时的负载向中间电极14,15的下侧的弯曲变形，所以中间电极绝缘基底变得无用，减少零件数量，简化包装结构。

5. 发明专利

JPS61210645A MANUFACTURE OF MINUTE PATTERN SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61210645A
公开(公告)日：1986-09-18
申请号：JP5145885
申请日：1985-03-14
申请人： HITACHI LTD
发明人： HOZUKI KENJI , HIRAYAMA HIDEO , MATSUZAKI HITOSHI
IPC分类号： H01L21/60
摘要： PURPOSE:To prevent deviation of a pattern after soldering, by elongating film, cooling and hardening the film, providing a lead member having a minute pattern and connecting the member to a semiconductor pellet at a high temperature. CONSTITUTION:Film is elongated, cooled and hardened. A lead member having a minute pattern is provided on the film and connected to a semiconductor pellet by soldering at a high temperature. Namely, in forming the film, elongation treatment corresponding to the difference in the thermal expansion per unit length is performed, and cooling and hardening are performed. Since remaining stress is present in the film, the remaining stress is eased when the film is heated and the film forming temperature is reached. The retained film is contracted. As the sum of the original thermal expansion a nd the contraction of the elongation treatment, the apparent thermal expansion at a solder solidifying temperature can be suppressed to a small value at the time of soldering. The difference in thermal expansions between the lead and a facing material, e.g., silicon, can be suppressed to almost zero. Therefore, the pattern is not deviated between an electrode lead 2 and a silicon pellet 1.

6. 发明专利

JPS60102761A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60102761A
公开(公告)日：1985-06-06
申请号：JP20897883
申请日：1983-11-09
申请人： HITACHI LTD
发明人： HARADA EIJI , MATSUZAKI HITOSHI , HIRAYAMA HIDEO
IPC分类号： H01L29/80 , H01L21/60 , H01L23/482
摘要： PURPOSE:To obtain a microscopic solder electrode having no uneven resistance and bridging on a conductive circuit generated by the running of solder by a method wherein no solder is provided on the non-contacting part of the internal electrode located at a stepped part, solder is provided only between the internal electrode and the electrode which is low-resistance-contacted to a semiconductor substrate. CONSTITUTION:A silicon oxide film 8 is formed on the N-emitter layer 1d juxtaposed on the main surface part constituting a rectangular narrow strip-form part which is divided into a plurality of parts and on the main surface of the silicon substrate 1 having a P-base layer 1c surrounding the layer 1d, and a cathode electrode and a gate electrode 10 are low-resistance-contacted to the layers 1c and 1d through the aperture provided on the film 8. Then, the electrode 10 is connected to the tooth-formed part 3a of a gate plate 3. No solder is allowed to be present on the electrode 10 and the non-contacting part of the stepped part 3b on the gate plate 3 by connecting the gate plate 3 to a gate terminal 7 at the position located higher than the main surface of the substrate 1.

7. 发明专利

JPS61184835A ELECTRODE MATERIAL FOR SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS61184835A
公开(公告)日：1986-08-18
申请号：JP2468285
申请日：1985-02-12
申请人： HITACHI CABLE , HITACHI LTD
发明人： ISHIKAWA TETSUO , YOSHIOKA OSAMU , YAMAGISHI RYOZO , HIRAYAMA HIDEO , HARADA EIJI , SUGIYAMA MITSUHIKO
IPC分类号： H01L21/52 , H01L21/58 , H01L21/60
摘要： PURPOSE:To increase the soldering yield by improving the solder wettability by composing a solder plating layer out of two layers of lead plating and of tin plating and making both platings dull-finish. CONSTITUTION:A solder plating layer is composed of two layers of Pb plating and Sn plating and a composition of the solder plating layer is determined by a ratio of thickness of both. Accordingly the composition can be controlled within 1% by controlling a flow of an electric current at arranging those layers on a metallic base by electroplating. As those are dull-finish plated layers, a solder wettability is good. If a layer consisting of nickel, cobalt, iron or chromium a melting point of which is higher than copper and a copper alloy is arranged when the metallic base is made of copper or a copper alloy, the copper functions as a barrier preventing diffusion into a semiconductor element through the solder at brazing or when this material is used for the semiconductor device and that prevents a decline of the functions as of a semiconductor.

8. 发明专利

JPS60214546A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS60214546A
公开(公告)日：1985-10-26
申请号：JP7255084
申请日：1984-04-10
申请人： Hitachi Ltd
发明人： HARADA EIJI , SAKAMOTO HISASHI , MATSUZAKI HITOSHI , SAITOU TAKASHI , HIRAYAMA HIDEO
IPC分类号： H01L23/12 , H01L21/52 , H01L21/58 , H01L23/02 , H01L23/13
CPC分类号： H01L23/13 , H01L2224/37147 , H01L2224/3754 , H01L2224/37599 , H01L2224/40 , H01L2224/40091 , H01L2224/40225 , H01L2224/83801 , H01L2224/84801 , H01L2924/00014 , H01L2924/00012
摘要： PURPOSE:To contrive to eliminate the generaion of a crack and a deficit in the semiconductor substrate by a method wherein a space is formed on the side of an electrode plate in the inner wall of the aperture of the ring-shaped insulating material and the semiconductor substrate and the insulating material are not brought into contact with each other by the formation of the space. CONSTITUTION:A ring-shaped insulating material 108 has been performed a chambering work on the side of an anode electrode plate 7 in the inner wall of its aperture and a space S1 has been formed there. The space S1 is formed in a dimension (l2) that a semiconductor substrate 1 doesn't come into contact with the insulating material 108 even through the minimum relative deviation (l1) arised due to the following two: the maximum relative deviation (l1) between the semiconductor substrate 1 and the insulating material 108 due to the dimensional torelance of a positioning jig (not shown in the diagram), which is used when the semiconductor substrate 1 is bonded, parts and so forth; and the thickness (t1) of the semiconductor substrate 1. (Provided that, l2>l1 and t2>t1). Accordingly, there is no possibility that the semiconductor substrate 1 and the insulating material 108 come into contact with each other. As a result, as no contact of both generates even during the time when heat is dropping, no crack and deficit generate in the semiconductor substrate 1.
摘要翻译：目的：通过在环状绝缘材料的孔的内壁上的电极板的侧面形成空间的方法和半导体衬底的半导体衬底中，形成半导体衬底的裂纹和缺陷的方法，基板和绝缘材料不会通过形成空间而彼此接触。构成：已经在其孔的内壁中的阳极板7的侧面上进行了环状绝缘材料108的制作，并且在其中形成了空间S1。空间S1形成在半导体衬底1不与绝缘材料108接触的尺寸（12）中，即使由于以下两个原因而导致的最小相对偏差（l1）：最大相对偏差（l1）由于半导体基板1被接合时使用的定位夹具（图中未示出）的尺寸相关性，在半导体基板1和绝缘材料108之间。和半导体衬底1的厚度（t1）（假设l2> l1和t2> t1）。因此，半导体衬底1和绝缘材料108不可能彼此接触。结果，即使在热量下降的时间内两者的接触也不会产生，在半导体衬底1中不产生裂纹和缺陷。

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