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1. 发明专利

JPH047103B2 失效
公开(公告)号：JPH047103B2
公开(公告)日：1992-02-07
申请号：JP7257882
申请日：1982-05-01
申请人： HITACHI LTD
发明人： MATSUZAKI HITOSHI , SAKURADA SHUROKU , HIRAYAMA HIDEO , MURAKAMI MASAHIRO , SUNAI SHIGEO
IPC分类号： H01L21/60 , H01L21/607 , H01L23/045

2. 发明专利

JP2006054227A Semiconductor power module and semiconductor device 审中-公开
标题翻译：半导体功率模块和半导体器件
公开(公告)号：JP2006054227A
公开(公告)日：2006-02-23
申请号：JP2004232885
申请日：2004-08-10
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SOGA TASAO , KAWASE DAISUKE , SUZUKI KAZUHIRO , SUNAI SHIGEO
IPC分类号： H01L21/52 , H01L21/56
CPC分类号： H01L24/29 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/92247 , H01L2924/01322 , H01L2924/10253 , H01L2924/15311 , H01L2924/15747 , H01L2924/15787 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor power module manufactured by a soldering process without cleaning processes using cleaning liquids, a wire-bonding process, or a process of sealing with an epoxy-based resin, after the wire-bonding process.
SOLUTION: In the connection of a substrate and a chip having a small number of voids, where the area of the junction area is large, for high-density packaging in a fine pitch in the semiconductor power module, solder is supplied in a paste print system, a furnace in which a hydrogen atmosphere and depressurization are combined is used, flux constituents of paste flux are volatilized, in a manner that is non-halogen and rosinless at a temperature that is equal to or lower than the soldering temperature, and thereby the surface is cleaned in wash free manner.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在引线接合工艺之后，提供通过焊接工艺制造的半导体功率模块，而不使用清洁液进行清洁处理，引线接合工艺或与环氧树脂基树脂密封的过程。解决方案：在衬底和具有少数空隙的芯片的连接中，其中接合面积的面积大，为了在半导体功率模块中以微细间距进行高密度封装，将焊料供应到使用糊状印刷系统，其中组合氢气氛和降压的炉，糊剂助熔剂的助熔剂成分以非卤素和无锡的方式挥发，温度等于或低于焊接温度，从而以无洗涤的方式清洁表面。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JPS58191459A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS58191459A
公开(公告)日：1983-11-08
申请号：JP7257882
申请日：1982-05-01
申请人： Hitachi Ltd
发明人： MATSUZAKI HITOSHI , SAKURADA SHIYUUROKU , HIRAYAMA HIDEO , MURAKAMI MASAHIRO , SUNAI SHIGEO
IPC分类号： H01L21/60 , H01L21/607 , H01L23/045
CPC分类号： H01L23/045 , H01L2224/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/4823 , H01L2224/49 , H01L2224/85148 , H01L2224/85951 , H01L2924/01013 , H01L2924/01082 , H01L2924/1301 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To omit middle electrode insulating bases, and to contrive to simplify lead wiring structure and to facilitate workability of the semiconductor device by a method wherein middle electrodes are arranged on one side of a semiconductor chip, and spacers are interposed between the middle electrodes and a supporting base when Al ultrasonic bonding is to be performed. CONSTITUTION:The middle electrodes 14, 15 are arranged on the same side inrelation to the semiconductor chip 10, and are fixed to outside leads 12, 13 to be supported. The directions of the first bonding and the second bonding of Al ultrasonic bonding coincide, to rotate the supporting base 11 during bonding work is unnecessary, and workability of bonding is enhanced. When the spacers 44 are arranged between the middle electrodes 14, 15 and the supporting base 11, bending deformation toward the lower side of the middle electrodes 14, 15 according to load at bonding time is not generated, the middle electrode insulating bases become useless, the number of parts is reduced, and packing structure is simplified.
摘要翻译：目的：省略中间电极绝缘基底，并且通过其中中间电极布置在半导体芯片的一侧上的方法，并且旨在简化引线结构并且便于半导体器件的可加工性，并且间隔物插入在中间电极和当执行Al超声波接合时的支撑基座。构成：中间电极14,15与半导体芯片10相对配置在同一侧，并且被固定到外部引线12,13以被支撑。 Al超声波接合的第一接合方向和第二接合方向与接合加工时的支撑基座11不一致，能够提高接合的加工性。当间隔物44布置在中间电极14,15和支撑基座11之间时，不会产生根据接合时的负载向中间电极14,15的下侧的弯曲变形，所以中间电极绝缘基底变得无用，减少零件数量，简化包装结构。

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