会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明专利
    • Servo device of magnetic recording and reproducing device
    • 磁记录和再现装置伺服装置
    • JPS59191165A
    • 1984-10-30
    • JP6554783
    • 1983-04-15
    • Hitachi Ltd
    • NISHIJIMA HIDEOKOBORI YASUNORIFUKUSHIMA ISAOGOTOU KATSUHIKOICHIMURA SHINYAOIKAWA TADAYOSHIKAWABATA HIROMI
    • H04N5/7826G11B15/467
    • G11B15/467
    • PURPOSE:To reduce the deterioration of S/N ratio, etc. in picture quality at the place near a joint area by deciding the phase jump of a capstan servo system of a consecutive recording mode from the resolution of the clock frequency which produces a reference signal. CONSTITUTION:When a pause switch 19 is operated, a record state (''L'' period) is set with a delay equivalent to a period of time required for matching of phase between the synchronizing signal on a magnetic tape 1 and the synchronizing signal to be newly recorded as shown in a waveform 21 given from a system controller 20. Then a signal generator 33 delivers at least >=1 shot pulse outputs 34 which are synchronous with the output 28 of a frequency divider 18. Thus a frequency divider 32 is preset. At the same time, a switch 12 is inverted. Then the input to be supplied to a phase comparator 15 is changed to the output 28 of the divider 18 from a reproduction synchronizing signal 27. The phase jump which is generated at this time point is set at maximum (2pi/M) radian as shown by a waveform 35 in the figure, where M defines the dividing ratio of the divider 32.
    • 目的:通过从产生参考的时钟频率的分辨率决定连续记录模式的主导轴伺服系统的相位跳跃来减少关节区附近的图像质量的S / N比等的劣化 信号。 构成:当暂停开关19被操作时,记录状态(“L”周期)被设置为具有等于在磁带1上的同步信号与同步信号之间的相位匹配所需的时间段的延迟 如从系统控制器20给出的波形21中所示的那样被新记录。然后,信号发生器33传送与分频器18的输出28同步的至少≥1个触发脉冲输出34。因此,分频器32 是预设的。 同时,开关12反转。 然后,将要提供给相位比较器15的输入从再现同步信号27改变为分频器18的输出28.在该时间点产生的相位跳变被设置为最大(2pi / M)弧度,如图所示 通过图中的波形35,其中M定义分频器32的分频比。
    • 3. 发明专利
    • Production of open-cellular rigid urethane foam
    • 生产开孔刚性尿素泡沫
    • JPS59142219A
    • 1984-08-15
    • JP1606983
    • 1983-02-04
    • Hitachi Ltd
    • NAKA REIJIKUROISHI KAZUYOSHISHIBATA KATSUOGOTOU KATSUHIKO
    • C08G18/00B29B7/00B29C39/00C08G18/50C08G18/76C08J9/02
    • PURPOSE: To produce a rigid urethane foam which, when used with an inner box made of ABS or the like used in a refrigerator or the like, does not cause cracking, by reacting a specified polyol component with an isocyanate component in the presence of a specified reaction catalyst, a blowing agent, etc.
      CONSTITUTION: A rigid urethane foam is produced by reacting (A) a polyol component comprising a mixture of triethanolamine polyether and an ethylenediamine polyether with (B) an isocyanate component comprising polymethylenediphenyl diisocyanate in the presence of (C) a reaction catalyst comprising a water-soluble tertiary amine, (D) a blowing agent comprising a mixture of water and trichloromonofluoromethane, (E) a foam stabilizer comprising an organosilicone block copolymer, (F) an open-cell agent comprising glycerin, and (G) a separation stabilizer comprising a phenolic polyether. It is possible to prevent an inner box for a refrigerator or the like from being cracked by clouding at low temperatures. The adhesion to an inner box is improved and the strength of the box is improved.
      COPYRIGHT: (C)1984,JPO&Japio
    • 目的:制造刚性聚氨酯泡沫,当与冰箱等中使用的ABS等制成的内箱一起使用时,不会在特定的多元醇成分与异氰酸酯成分的存在下反应而引起裂纹 规定的反应催化剂,发泡剂等。构成:通过使(A)包含三乙醇胺聚醚和乙二胺聚醚的混合物的多元醇组分与(B)含有聚亚甲基二苯基二异氰酸酯的异氰酸酯组分在 (C)包含水溶性叔胺的反应催化剂,(D)包含水和三氯一氟甲烷的混合物的发泡剂,(E)包含有机硅嵌段共聚物的泡沫稳定剂,(F)包含甘油的开孔剂 ,和(G)包含酚类聚醚的分离稳定剂。 可以防止冰箱等的内箱在低温下由于浑浊而破裂。 提高了对内箱的粘附性,并提高了箱的强度。
    • 4. 发明专利
    • Sample holding circuit
    • 样品保持电路
    • JPS59108111A
    • 1984-06-22
    • JP21680382
    • 1982-12-13
    • Hitachi Ltd
    • GOTOU KATSUHIKOKOBORI YASUNORIOKAMOTO CHIKAYUKI
    • H02P29/00G05B21/02
    • G05B21/02
    • PURPOSE:To omit the use of a high reverse voltage-proof transistor (TR) by connecting a switching element to the base terminal of a TR through a resistor and earthing the base terminal during a period no sampling pulse is applied. CONSTITUTION:A switch 8 is connected to the base of a TR 17 through a resistor 23 and a reference voltage source 20 also is connected to the base through a resistor 22 and a diode 21. During no sampling period, the switch 8 is turned on and a fixed forward voltage is applied to the base of the TR 17. Consequently, the reverse voltage between the base and emitter of the TR 17 is reduced by the base voltage. During the sampling period, the switch 8 is turned off, the diode 21 is reversely biased and the reference voltage source 20 does not exert influence upon the titled sample holding circuit. Thus, the sample holding circuit can be formed without using an especially high reverse voltage-proof TR.
    • 目的:通过在不施加采样脉冲的期间内通过电阻将开关元件连接到TR的基极端子并接地基极来省略使用高反向耐压晶体管(TR)。 构成:开关8通过电阻23连接到TR17的基极,参考电压源20也通过电阻22和二极管21连接到基极。在无采样期间,开关8接通 并且固定的正向电压被施加到TR 17的基极。因此,TR 17的基极和发射极之间的反向电压被基极电压降低。 在采样周期期间,开关8断开,二极管21反向偏置,参考电压源20不对标题样品保持电路施加影响。 因此,可以在不使用特别高的反向耐压TR的情况下形成样品保持电路。
    • 5. 发明专利
    • Reference power supply circuit
    • 参考电源电路
    • JPS5938817A
    • 1984-03-02
    • JP14778082
    • 1982-08-27
    • Hitachi Ltd
    • GOTOU KATSUHIKOKOBORI YASUNORIOKAMOTO CHIKAYUKI
    • G05F1/56G05F1/571G05F5/00
    • G05F1/571
    • PURPOSE:To obtain a same reference volage for plural power source voltages whose use is predetermined, by incorporating a switch circuit, which is turned on or off for the fluctuation of the power source voltage, in an IC and changing a resistance ratio to obtain the same set reference voltage. CONSTITUTION:When the voltage of a Zener diode 21 is lower than the power source voltage, a transistor TR23 is turned off. An output voltage determined by the power source voltage, the forward voltage (VBE) between the base and the emitter of a TR8, and resistances 6 and 7 is obtained in a terminal 5. When the voltage of a power source 4 is higher than the voltage of the Zener diode 21 by the forward voltage between the base and the emitter of the TR23, the TR23 is turned on, and a resistance 24 is grounded. An output voltage determined by the power source voltage, the voltage VBE of the TR8, and resistances 6, 7, and 24 is obtained in the terminal 5. The value of the resistance 24 is selected properly to obtain the same reference voltage for plural voltages of the power source 4.
    • 目的:为了通过在IC中并入用于电源电压波动的导通或截止的开关电路以及改变电阻比来获得与预定的多个电源电压相同的参考电压,从而获得 相同设定参考电压。 构成:当齐纳二极管21的电压低于电源电压时,晶体管TR23截止。 在端子5中获得由电源电压,TR8的基极和发射极之间的正向电压(VBE)和电阻6和7确定的输出电压。当电源4的电压高于 通过TR23的基极和发射极之间的正向电压,齐纳二极管21的电压,TR23导通,电阻24接地。 在端子5中获得由电源电压,TR8的电压VBE和电阻6,7和24确定的输出电压。正确选择电阻24的值以获得用于多个电压的相同参考电压 的电源4。
    • 7. 发明专利
    • Up-down counter
    • 向上计数器
    • JPS58223924A
    • 1983-12-26
    • JP10690382
    • 1982-06-23
    • Hitachi Ltd
    • OKAMOTO CHIKAYUKIKOBORI YASUNORIFUKUSHIMA ISAOGOTOU KATSUHIKO
    • H03K23/00H03K23/86
    • H03K23/86
    • PURPOSE:To prevent malfunction, by generating a clock pulse with a high frequency signal and switching up-down information after latching an up-down signal. CONSTITUTION:Q and Q' outputs of a T-FF and an output of latch means 21, 22 are inputted to an NAND gate, an output pair of the NAND gate is inputted to an AND gate, the output of which is inputted to the T-FF at the post-stage. An output of the FF operated with a clock 13 formed from the product between the Q output of a T-FF21 and a Q' output of a T-FF22 with an AND gate 38 or its gate processing output is inputted to the latch means 21, 22 and the T-FF reset with up-down pulses 31, 32. As a result, since the timing for latching the up-down information is shifted surely from the timing for the count operation with the clock, the malfunction is prevented.
    • 目的:通过产生具有高频信号的时钟脉冲和锁存上拉信号后切换上下信息来防止故障。 构成:将T-FF的Q和Q'输出和锁存装置21,22的输出输入到与非门,NAND门的输出对被输入到与门,其输出被输入到 T-FF在后期。 由T-FF21的Q输出与具有与门38的T-FF22的Q'输出或其门处理输出之间的乘积形成的时钟13的FF的输出被输入到锁存装置21 ,22,并且具有上升脉冲31,32的T-FF复位。结果,由于用于锁存上下信息的定时从时钟的计数操作的定时确定地移位,故障被防止。