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1. 再颁专利

USRE42180E1 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same 有权
标题翻译：在源极/漏极区域上具有金属硅化物层和栅电极的半导体器件及其制造方法
公开(公告)号：USRE42180E1
公开(公告)日：2011-03-01
申请号：US12212105
申请日：2008-09-17
申请人： Hisato Oyamatsu , Kenji Honda
发明人： Hisato Oyamatsu , Kenji Honda
IPC分类号： H01L31/113 , H01L29/76
CPC分类号： H01L21/28568 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L27/0207 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate, an element-isolating region formed in the semiconductor substrate, a real element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof, and a dummy element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof. The ratio of the sum of pattern areas of the real element region and dummy element region occupied in a 1 μm-square range of interest including the element region is 25% or more.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底中的元件隔离区域，形成在半导体衬底中并在元件隔离区域外部并且在其表面上形成有金属硅化物层的真实元件区域，以及虚拟元件元件区域形成在半导体衬底中并且在元件隔离区域外部并且在其表面上形成有金属硅化物层。在包括元件区域的1μm平方的感兴趣范围内占有的实数元素区域和虚设元素区域的图案区域之和的比率为25％以上。

2. 发明申请

US20050106833A1 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same 有权
标题翻译：在源极/漏极区域上具有金属硅化物层和栅电极的半导体器件及其制造方法
公开(公告)号：US20050106833A1
公开(公告)日：2005-05-19
申请号：US10837748
申请日：2004-05-04
申请人： Hisato Oyamatsu , Kenji Honda
发明人： Hisato Oyamatsu , Kenji Honda
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L21/76 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/02 , H01L27/04 , H01L27/088 , H01L29/78 , H01L21/00 , H01L21/44 , H01L21/4763 , H01L21/84
CPC分类号： H01L21/28568 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L27/0207 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate, an element-isolating region formed in the semiconductor substrate, a real element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof, and a dummy element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof. The ratio of the sum of pattern areas of the real element region and dummy element region occupied in a 1 μm-square range of interest including the element region is 25% or more.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底中的元件隔离区域，形成在半导体衬底中并在元件隔离区域外部并且在其表面上形成有金属硅化物层的真实元件区域，以及虚拟元件元件区域形成在半导体衬底中并且在元件隔离区域外部并且在其表面上形成有金属硅化物层。在包括元件区域的1个平均兴趣范围内占有的实数元素区域和虚设元素区域的图案区域之和的比率为25％以上。

3. 发明授权

US07176536B2 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same 有权
标题翻译：在源极/漏极区域上具有金属硅化物层和栅电极的半导体器件及其制造方法
公开(公告)号：US07176536B2
公开(公告)日：2007-02-13
申请号：US10837748
申请日：2004-05-04
申请人： Hisato Oyamatsu , Kenji Honda
发明人： Hisato Oyamatsu , Kenji Honda
IPC分类号： H01L31/113 , H01L21/44 , H01L21/8238
CPC分类号： H01L21/28568 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L27/0207 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate, an element-isolating region formed in the semiconductor substrate, a real element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof, and a dummy element region formed in the semiconductor substrate and outside the element-isolating region and having a metal silicide layer formed on the surface thereof. The ratio of the sum of pattern areas of the real element region and dummy element region occupied in a 1 μm-square range of interest including the element region is 25% or more.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底中的元件隔离区域，形成在半导体衬底中并在元件隔离区域外部并且在其表面上形成有金属硅化物层的真实元件区域，以及虚拟元件元件区域形成在半导体衬底中并且在元件隔离区域外部并且在其表面上形成有金属硅化物层。在包括元件区域的1个平均兴趣范围内占有的实数元素区域和虚设元素区域的图案区域之和的比率为25％以上。

4. 发明申请

US20080259680A1 Memory Element and Method for Manufacturing Same 失效
标题翻译：记忆元素及其制造方法
公开(公告)号：US20080259680A1
公开(公告)日：2008-10-23
申请号：US11575091
申请日：2005-11-04
申请人： Hiroyuki Nishide , Kenji Honda , Yasunori Yonekuta , Takashi Kurata , Shigemoto Abe
发明人： Hiroyuki Nishide , Kenji Honda , Yasunori Yonekuta , Takashi Kurata , Shigemoto Abe
IPC分类号： G11C11/34 , H01S4/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0016 , G11C2213/15 , H01L27/285 , H01L51/0595 , Y10T29/49002
摘要： A novel nonvolatile memory element, which can be manufactured by a simple and high yield process by using an organic material and has a high on/off ratio, and a method for manufacturing such nonvolatile memory element. A switching layer (14) made of an electrical insulating radical polymer is provided between an anode layer (12) and a cathode layer (16). Further, a hole injection transport layer (13) is provided between the switching layer (14) and the anode layer (12), and an electron injection transport layer (15), between the switching layer (14) and the cathode layer (16). An intermediate layer is provided between the switching layer and the adjacent layer. The radical polymer is preferably nitroxide radical polymer. The switching layer (14), the hole injection transport layer (13) and the electron injection transport layer (15) are formed by being stacked by a wet process.
摘要翻译：一种新颖的非易失性存储元件，其可以通过使用有机材料通过简单且高收率的方法制造并具有高的开/关比率，以及制造这种非易失性存储元件的方法。在阳极层（12）和阴极层（16）之间设置由绝缘自由基聚合物构成的开关层（14）。此外，在开关层（14）和阳极层（12）之间设置有空穴注入传输层（13），以及在开关层（14）和阴极层（16）之间的电子注入传输层（15））。在切换层和相邻层之间设置中间层。自由基聚合物优选为氮氧自由基聚合物。通过湿法堆叠形成开关层（14），空穴注入传输层（13）和电子注入传输层（15）。

5. 发明授权

US07365949B2 CPP giant magnetoresistive head including pinned magnetic layer that extends in the height direction 有权
标题翻译： CPP巨磁阻头包括在高度方向上延伸的钉扎磁性层
公开(公告)号：US07365949B2
公开(公告)日：2008-04-29
申请号：US11141543
申请日：2005-05-31
申请人： Yasuo Hayakawa , Yoshihiro Nishiyama , Digo Aoki , Masamichi Saito , Naohiro Ishibashi , Kenji Honda
发明人： Yasuo Hayakawa , Yoshihiro Nishiyama , Digo Aoki , Masamichi Saito , Naohiro Ishibashi , Kenji Honda
IPC分类号： G11B5/33 , G11B5/127
CPC分类号： G11B5/39 , G11B5/3163 , G11B5/398
摘要： A CPP giant magnetoresistive head includes a lower shield layer; an upper shield layer; and a giant magnetoresistive element (GMR) between the lower shield layer and the upper shield layer. The GMR includes a nonmagnetic material layer; a pinned magnetic layer; and a free magnetic layer. The pinned layer and the free layer are laminated with the nonmagnetic layer provided therebetween. A current flows perpendicularly to a film plane of the GMR, the pinned magnetic layer extends in the height direction longer than in a track-width direction and includes a first portion in the GMR. The first portion is disposed above or below the nonmagnetic layer and the free layer. A second portion is behind the nonmagnetic layer and the free layer in the height direction. The first and second portions are in the same plane. The width of the pinned layer in the track-width direction in the first portion is greater than that in the second portion.
摘要翻译： CPP巨磁阻头包括下屏蔽层; 上屏蔽层; 和在下屏蔽层和上屏蔽层之间的巨磁阻元件（GMR）。 GMR包括非磁性材料层; 钉扎磁性层; 和自由磁性层。被钉扎层和自由层与其间设置的非磁性层层叠。 A电流垂直于GMR的膜平面流动，被钉扎的磁性层在高度方向上比在轨道宽度方向上延伸更长，并且包括GMR中的第一部分。第一部分设置在非磁性层和自由层的上方或下方。第二部分在非磁性层的后面，高度方向上是自由层。第一和第二部分在同一平面内。第一部分中的钉扎宽度方向上的被钉扎层的宽度大于第二部分的宽度。

6. 发明授权

US06791804B2 Magnetoresistive-effect device and method for manufacturing the same 失效
标题翻译：磁阻效应器件及其制造方法
公开(公告)号：US06791804B2
公开(公告)日：2004-09-14
申请号：US10337479
申请日：2003-01-06
申请人： Daigo Aoki , Naoya Hasegawa , Kenji Honda , Yoshihiko Kakihara
发明人： Daigo Aoki , Naoya Hasegawa , Kenji Honda , Yoshihiko Kakihara
IPC分类号： G11B539
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11B5/3903 , G11B2005/3996 , H01L43/12 , Y10T29/49044
摘要： A magnetoresistive-effect device includes a multilayer film, hard bias layers arranged on both sides of the multilayer film, and electrode layers respectively deposited on the hard bias layers. The electrode layers are formed, extending over the multilayer film. Under the influence of the hard bias layers arranged on both sides of the multilayer, the multilayer film, forming the magnetoresistive-effect device, has, on the end portions thereof, insensitive regions which exhibit no substantial magnetoresistive effect. The insensitive region merely increases a direct current resistance. By extending the electrode layers over the insensitive regions of the multilayer film, a sense current is effectively flown from the electrode layer into the multilayer film. With a junction area between the electrode layer and the multilayer film increased, the direct current resistance is reduced, while the reproduction characteristics of the device are thus improved.
摘要翻译：磁阻效应器件包括多层膜，布置在多层膜两侧的硬偏置层以及分别沉积在硬偏压层上的电极层。在多层膜上形成电极层。在布置在多层的两侧的硬偏置层的影响下，形成磁阻效应器件的多层膜在其端部上具有不显着的磁阻效应的不敏感区域。不敏感区域仅增加直流电阻。通过将电极层延伸到多层膜的不敏感区域上，感测电流有效地从电极层流入多层膜。在电极层和多层膜之间的接合区域增加的同时，直流电阻降低，同时改善了器件的再现特性。

7. 发明授权

US06690554B2 Magnetoresistive-effect device with extended AFM layer and method for manufacturing the same 失效
标题翻译：具有扩展AFM层的磁阻效应器件及其制造方法
公开(公告)号：US06690554B2
公开(公告)日：2004-02-10
申请号：US10337188
申请日：2003-01-06
申请人： Daigo Aoki , Naoya Hasegawa , Kenji Honda , Kiyoshi Sato , Yoshihiko Kakihara
发明人： Daigo Aoki , Naoya Hasegawa , Kenji Honda , Kiyoshi Sato , Yoshihiko Kakihara
IPC分类号： G11B539
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11B5/3903 , G11B2005/3996 , H01L43/12 , Y10T29/49044
摘要： A magnetoresistive-effect device includes a multilayer film, hard bias layers arranged on both sides of the multilayer film, and electrode layers respectively deposited on the hard bias layers. The electrode layers are formed, extending over the multilayer film. Under the influence of the hard bias layers arranged on both sides of the multilayer, the multilayer film, forming the magnetoresistive-effect device, has, on the end portions thereof, insensitive regions which exhibit no substantial magnetoresistive effect. The insensitive region merely increases a direct current resistance. By extending the electrode layers over the insensitive regions of the multilayer film, a sense current is effectively flown from the electrode layer into the multilayer film. With a junction area between the electrode layer and the multilayer film increased, the direct current resistance is reduced, while the reproduction characteristics of the device are thus improved.
摘要翻译：磁阻效应器件包括多层膜，布置在多层膜两侧的硬偏置层以及分别沉积在硬偏压层上的电极层。在多层膜上形成电极层。在布置在多层的两侧的硬偏置层的影响下，形成磁阻效应器件的多层膜在其端部上具有不显着的磁阻效应的不敏感区域。不敏感区域仅增加直流电阻。通过将电极层延伸到多层膜的不敏感区域上，感测电流有效地从电极层流入多层膜。在电极层和多层膜之间的接合区域增加的同时，直流电阻降低，同时改善了器件的再现特性。

8. 发明授权

US06643107B1 Spin valve thin film magnetic element and method of manufacturing the same 失效
标题翻译：旋转阀薄膜磁性元件及其制造方法
公开(公告)号：US06643107B1
公开(公告)日：2003-11-04
申请号：US09679724
申请日：2000-10-04
申请人： Naoya Hasegawa , Kiyoshi Sato , Kenji Honda
发明人： Naoya Hasegawa , Kiyoshi Sato , Kenji Honda
IPC分类号： G11B539
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/313 , G11B5/3143 , G11B5/3903 , H01F10/3272 , H01F41/325
摘要： The invention provides a spin valve thin film element in which output characteristics and the stability of reproduced waveforms are improved, asymmetry is decreased, and the occurrence of side reading is prevented. The spin valve thin film element includes a lamination having an antiferromagnetic layer, a first pinned magnetic layer, a nonmagnetic intermediate layer, a second pinned magnetic layer, a nonmagnetic conductive layer, a free magnetic layer, and a backed layer composed of a nonmagnetic conductive material, which are laminated on a substrate. Hard bias layers are formed on both sides of the lamination, and orient the magnetization direction of the free magnetic layer in the direction crossing the magnetization direction of the second pinned magnetic layer. Electrode layers are formed on the hard bias layers to supply a sensing current J to the lamination. The electrode layers are formed to extend to the surface of the lamination toward the central portion from both sides of the lamination.
摘要翻译：本发明提供了一种自旋阀薄膜元件，其中输出特性和再现波形的稳定性得到改善，不对称性降低，并且防止了侧读出现。自旋阀薄膜元件包括具有反铁磁层，第一钉扎磁性层，非磁性中间层，第二钉扎磁性层，非磁性导电层，自由磁性层和由非磁性导电性构成的背衬层的层压体材料，其被层压在基底上。在层叠体的两面形成有硬偏移层，并且在与第二被钉扎磁性层的磁化方向交叉的方向上使自由磁性层的磁化方向取向。电极层形成在硬偏压层上，以向层压提供感测电流J。电极层被形成为从层压体的两侧朝向中心部分延伸到层压体的表面。

9. 发明授权

US06349021B1 Thin film magnetic head 失效
标题翻译：薄膜磁头
公开(公告)号：US06349021B1
公开(公告)日：2002-02-19
申请号：US09481452
申请日：2000-01-11
申请人： Kenji Honda
发明人： Kenji Honda
IPC分类号： G11B539
CPC分类号： G11B5/3967 , G11B5/3113 , G11B5/3116 , G11B5/313 , G11B5/3903
摘要： A thin film magnetic head is able to control occurrence of Barkhausen noises attributable to configuration magnetic anisotropy of an upper shield layer. An inductive head is provided with a magnetic material layer having a space for forming a coil layer thereon. A very narrow gap is provided between a front separate layer that opposes a magnetic recording medium and a rear separate layer that opposes the front separate layer. The front separate layer serves also as an upper shield layer of an MR head and a lower core layer of the inductive head.
摘要翻译：薄膜磁头能够控制由于上屏蔽层的配置磁各向异性引起的巴克豪森噪声的发生。感应头设置有具有用于在其上形成线圈层的空间的磁性材料层。在与磁记录介质相对的前分离层和与前分离层相对的后分离层之间提供非常窄的间隙。前分离层还用作MR头的上屏蔽层和感应头的下芯层。

10. 发明授权

US06263565B1 Method of manufacturing a substrate having electrode arcs for connecting to surface-mounted electronic parts and substrate manufactured by same 失效
标题翻译：制造具有用于连接到由表面安装的电子部件和由其制造的基板的电极弧的基板的方法
公开(公告)号：US06263565B1
公开(公告)日：2001-07-24
申请号：US09103392
申请日：1998-06-24
申请人： Masashi Gotoh , Jitsuo Kanazawa , Syuichiro Yamamoto , Kenji Honda
发明人： Masashi Gotoh , Jitsuo Kanazawa , Syuichiro Yamamoto , Kenji Honda
IPC分类号： H01K310
CPC分类号： H05K3/403 , H05K3/0052 , H05K3/3442 , H05K3/42 , H05K2201/09181 , Y10T29/49155 , Y10T29/49165 , Y10T29/49789 , Y10T29/49792
摘要： A through hole 5 formed in a substrate and having an electrode film on an inner surface thereof is cut and divided into two through holes or blind holes each of substantially semicircular arc shape through dicing processing using a rotating blade, and one of the-divided through holes 5 of substantially semicircular arc shape is used as an external connection terminal 3 of substantially semicircular concave arc shape thereby to form a surface mounted electronic parts having a plurality of the external connection terminals 3. The height H of the substantially semicircular arc formed at an inner surface of each of the external connection terminals is set to be equal to or smaller than a value obtained by subtracting twice a thickness t of the electrode film from a radius R of a curvature of the arc.
摘要翻译：形成在基板中并且在其内表面上具有电极膜的通孔5通过使用旋转叶片的切割处理被分割成基本上半圆弧形的两个通孔或盲孔，并且其中一个分割通孔使用大致半圆弧形的孔5作为大致半圆形的凹弧形状的外部连接端子3，从而形成具有多个外部连接端子3的表面安装的电子部件。大致半圆弧的高度H形成在每个外部连接端子的内表面被设定为等于或小于从电弧曲率的半径R减去电极膜的厚度t的两倍所获得的值。

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