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1. 发明申请

US20060134865A1 Method of manufacturing a semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20060134865A1
公开(公告)日：2006-06-22
申请号：US11303583
申请日：2005-12-14
申请人： Hiroyuki Inuzuka , Tsukasa Doi , Kazumasa Mitsumune
发明人： Hiroyuki Inuzuka , Tsukasa Doi , Kazumasa Mitsumune
IPC分类号： H01L21/336 , H01L21/44
CPC分类号： H01L21/76897 , H01L27/115 , H01L27/11521
摘要： According to the present invention, a method of manufacturing a semiconductor device which comprises a matrix of memory cells of the floating gate type is provided in which the silicon nitride layer is deposited as an etching stop layer on a control gate electrode for bottom borderless contact process with the threshold voltage of transistor arrangements being controlled not to change so that the productivity can remain not declined. In particular, the silicon nitride layer (115) is deposited as an etching stop layer on the control gate electrode (105) for bottom borderless contact process so that the concentration of hydrogen (H2) therein stays in a range from 1.5×1021 to 2.6×1021 atoms/cm3. Also, the silicon nitride layer (115) is deposited at a temperature of not higher than 700° C. by a low pressure CVD technique.
摘要翻译：根据本发明，提供一种制造半导体器件的方法，该半导体器件包括浮置型存储单元的矩阵，其中氮化硅层作为蚀刻停止层沉积在用于底部无边界接触工艺的控制栅极上晶体管布置的阈值电压被控制为不改变，使得生产率可以保持不下降。特别地，氮化硅层（115）作为蚀刻停止层沉积在用于底部无边界接触工艺的控制栅电极（105）上，使得其中的氢（H 2 H 2）的浓度保持在从1.5×10 21至2.6×10 21原子/ cm 3的范围。此外，氮化硅层（115）通过低压CVD技术在不高于700℃的温度下沉积。

2. 发明授权

US07402513B2 Method for forming interlayer insulation film 有权
标题翻译：形成层间绝缘膜的方法
公开(公告)号：US07402513B2
公开(公告)日：2008-07-22
申请号：US11034616
申请日：2005-01-12
申请人： Takanori Sonoda , Kazumasa Mitsumune , Kenichiroh Abe , Yushi Inoue , Tsukasa Doi
发明人： Takanori Sonoda , Kazumasa Mitsumune , Kenichiroh Abe , Yushi Inoue , Tsukasa Doi
IPC分类号： H01L21/461 , H01L21/4763 , H01L21/469
CPC分类号： H01L21/0217 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/02318 , H01L21/3143 , H01L21/31625 , H01L21/3185 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76837
摘要： It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film.A method for forming an interlayer insulation film of the present invention, comprising the steps of: (1) forming an etching stopper film of a silicon nitride film on an entire surface including a step part on a semiconductor substrate having the step part with an aspect ratio of ≧3; (2) forming an interlayer insulation film of an impurity-doped silicate film on the silicon nitride film; and (3) performing reflow of the interlayer insulation film by a heat treatment, wherein the formation of the silicon nitride film is controlled such that the N—H bond density of the silicon nitride film is 1.0×1022 pieces/cm3 or less.According to the method for forming the interlayer insulation film of the present invention, the occurrence of the voids can be suppressed in the interlayer insulation film even if the aspect ratio of the step part formed on the semiconductor substrate is 3 or more. Also, the damage applied to the semiconductor device by reflow can be reduced.
摘要翻译：本发明的目的是提供一种形成层间绝缘膜的方法，该层间绝缘膜抑制层间绝缘膜中空隙的发生。一种形成本发明的层间绝缘膜的方法，包括以下步骤：（1）在具有该步骤部分的半导体衬底上的包括台阶部分的整个表面上形成氮化硅膜的蚀刻阻挡膜，该半导体衬底具有一个方面比值> = 3; （2）在氮化硅膜上形成杂质掺杂硅酸盐膜的层间绝缘膜; 和（3）通过热处理进行层间绝缘膜的回流，其中控制氮化硅膜的形成，使得氮化硅膜的NH键密度为1.0×10 22个/ cm 3以下。根据本发明的层间绝缘膜的形成方法，即使形成在半导体基板上的台阶部的纵横比为3以上，也能够抑制层间绝缘膜的空隙的发生。此外，可以减少通过回流施加到半导体器件的损坏。

3. 发明申请

US20050159015A1 Method for forming interlayer insulation film 有权
标题翻译：形成层间绝缘膜的方法
公开(公告)号：US20050159015A1
公开(公告)日：2005-07-21
申请号：US11034616
申请日：2005-01-12
申请人： Takanori Sonoda , Kazumasa Mitsumune , Kenichiroh Abe , Yushi Inoue , Tsukasa Doi
发明人： Takanori Sonoda , Kazumasa Mitsumune , Kenichiroh Abe , Yushi Inoue , Tsukasa Doi
IPC分类号： C23C16/34 , H01L21/28 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/768 , H01L23/522 , H01L21/4763 , H01L21/469
CPC分类号： H01L21/0217 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/02318 , H01L21/3143 , H01L21/31625 , H01L21/3185 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76837
摘要： It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprising the steps of: (1) forming an etching stopper film of a silicon nitride film on an entire surface including a step part on a semiconductor substrate having the step part with an aspect ratio of ≧3; (2) forming an interlayer insulation film of an impurity-doped silicate film on the silicon nitride film; and (3) performing reflow of the interlayer insulation film by a heat treatment, wherein the formation of the silicon nitride film is controlled such that the N—H bond density of the silicon nitride film is 1.0×1022 pieces/cm3 or less. According to the method for forming the interlayer insulation film of the present invention, the occurrence of the voids can be suppressed in the interlayer insulation film even if the aspect ratio of the step part formed on the semiconductor substrate is 3 or more. Also, the damage applied to the semiconductor device by reflow can be reduced.
摘要翻译：本发明的目的是提供一种形成层间绝缘膜的方法，该层间绝缘膜抑制层间绝缘膜中空隙的发生。一种形成本发明的层间绝缘膜的方法，包括以下步骤：（1）在具有该步骤部分的半导体衬底上的包括台阶部分的整个表面上形成氮化硅膜的蚀刻阻挡膜，该半导体衬底具有一个方面比值> = 3; （2）在氮化硅膜上形成杂质掺杂硅酸盐膜的层间绝缘膜; 和（3）通过热处理进行层间绝缘膜的回流，其中控制氮化硅膜的形成，使得氮化硅膜的NH键密度为1.0×10 22个/ cm 3以下。根据本发明的层间绝缘膜的形成方法，即使形成在半导体基板上的台阶部的纵横比为3以上，也能够抑制层间绝缘膜的空隙的发生。此外，可以减少通过回流施加到半导体器件的损坏。

4. 发明申请

US20050118833A1 Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20050118833A1
公开(公告)日：2005-06-02
申请号：US10998782
申请日：2004-11-30
申请人： Kazumasa Mitsumune , Tsukasa Doi , Yushi Inoue , Kenichirou Abe , Takanori Sonoda
发明人： Kazumasa Mitsumune , Tsukasa Doi , Yushi Inoue , Kenichirou Abe , Takanori Sonoda
IPC分类号： H01L23/522 , H01L21/31 , H01L21/314 , H01L21/318 , H01L21/768 , H01L21/469
CPC分类号： H01L21/02129 , H01L21/0217 , H01L21/02274 , H01L21/3144 , H01L21/3145 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76837
摘要： It is an object of the present invention to provide a method for manufacturing a semiconductor device suppressing the occurrence of voids in an insulating film. A method for manufacturing a semiconductor device according to the present invention comprises the steps of: (1) forming an insulating film 11 composed of a thin silicon nitride film on a semiconductor substrate 1 having at least a necessary element and a recessed part 6 so as to cover the recessed part 6; (2) modifying the surface of the insulating film 11; and (3) forming a BPSG film 15 as an interlayer insulation film on the insulating film. The occurrence of voids in the interlayer insulation film 15 is suppressed by the process for modifying the surface.
摘要翻译：本发明的目的是提供一种制造半导体器件的方法，该半导体器件抑制绝缘膜中空隙的发生。根据本发明的制造半导体器件的方法包括以下步骤：（1）在具有至少必需元件的半导体衬底1上形成由氮化硅薄膜构成的绝缘膜11，以及凹入部分6，以便覆盖凹部6; （2）改性绝缘膜11的表面; 和（3）在绝缘膜上形成作为层间绝缘膜的BPSG膜15。通过改变表面的方法来抑制层间绝缘膜15中的空隙的发生。

5. 发明授权

US06537859B2 Semiconductor device baking method 失效
标题翻译：半导体器件烘烤方法
公开(公告)号：US06537859B2
公开(公告)日：2003-03-25
申请号：US09804467
申请日：2001-03-13
申请人： Kazumasa Mitsumune
发明人： Kazumasa Mitsumune
IPC分类号： H01L2144
CPC分类号： H01L21/56 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor chip is encapsulated with resin into a plastic package so as to form a semiconductor device having the semiconductor chip in the plastic package. The semiconductor device is then received in a container so that the container is vacuumed up to a vacuum degree of 10−6 or less. Thereafter, the semiconductor device is baked at a temperature within a range of 165° C. to 175° C. for 6 hours or more by using a hot plate. Thus, this baking under the reduced pressure prevents generation of blisters and cracks on the plastic package.
摘要翻译：将半导体芯片用树脂封装成塑料封装，以形成半导体器件，该半导体器件具有塑料封装中的半导体芯片。然后将半导体器件接收在容器中，使得容器被抽真空至10-6或更小的真空度。此后，通过使用热板将半导体器件在165℃至175℃的温度范围内烘烤6小时以上。因此，在减压下的这种烘烤防止塑料包装上的起泡和裂纹的产生。

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