专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07208933B2 Time limit function utilization apparatus 有权
公开(公告)号：US07208933B2
公开(公告)日：2007-04-24
申请号：US11476722
申请日：2006-06-29
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.

2. 发明申请

US20090015074A1 ELECTRONIC DEVICE 有权
标题翻译：电子设备
公开(公告)号：US20090015074A1
公开(公告)日：2009-01-15
申请号：US12049715
申请日：2008-03-17
申请人： Hiroshi WATANABE , Kazuya Matsuzawa
发明人： Hiroshi WATANABE , Kazuya Matsuzawa
IPC分类号： H01H7/00
CPC分类号： G06F21/85 , G06F21/71 , G06F2221/2137 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L25/18 , H01L27/105 , H01L27/11526 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/49171 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , Y10T307/951 , H01L2224/45099 , H01L2224/05599 , H01L2924/00
摘要： An electronic device includes a substrate, a first chip mounted on the substrate and having a first terminal, a second terminal, an input pad and a semiconductor time switch connected to the first terminal and the second terminal and configured to disconnect the first terminal and the second terminal upon lapse of a prescribed lifetime, the input pad being configured to set the prescribed lifetime, a second chip mounted on the substrate and incorporating an operational device having a third terminal connected to the first terminal and a fourth terminal serving as an input terminal for an external device, a first memory device mounted on the substrate, having a fifth terminal connected to the second terminal and storing information required for operating the operational device, and an encapsulater covering at least the input pad of the first chip.
摘要翻译：电子设备包括：基板，安装在基板上的第一芯片，具有连接到第一端子和第二端子的第一端子，第二端子，输入焊盘和半导体时间开关，并被配置为断开第一端子和第二端子经过规定的寿命时，输入焊盘被配置为设定规定的寿命，安装在基板上的第二芯片并且包括具有连接到第一端子的第三端子的操作装置和用作输入端子的第四端子对于外部设备，安装在基板上的第一存储器件，具有连接到第二端子的第五端子并且存储操作操作器件所需的信息，以及至少覆盖第一芯片的输入焊盘的封装器。

3. 发明授权

US07224157B2 Time limit function utilization apparatus 有权
标题翻译：限时功能利用装置
公开(公告)号：US07224157B2
公开(公告)日：2007-05-29
申请号：US11353218
申请日：2006-02-14
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
摘要翻译：时间限制功能利用装置包括第一功能块，第二功能块，连接第一功能块和第二功能块的信号线，并且允许使用通过彼此访问第一和第二功能块而产生的期望功能，以及插入或连接到信号线的半导体时间开关，并且在经过预定时间后禁用或使第一和第二功能块之间能够相互接近。

4. 发明授权

US06954723B2 Device simulation method, device simulation system and device simulation program 失效
标题翻译：设备仿真方法，设备仿真系统和设备仿真程序
公开(公告)号：US06954723B2
公开(公告)日：2005-10-11
申请号：US09956126
申请日：2001-09-20
申请人： Hiroshi Watanabe , Kazuya Matsuzawa
发明人： Hiroshi Watanabe , Kazuya Matsuzawa
IPC分类号： G06F17/50 , H01L29/00 , G06F17/10
CPC分类号： G06F17/5018
摘要： There is disclosed a method comprising: calculating a band gap narrowing of a semiconductor and an ionization rate of an impurity in an equilibrium state; calculating a movable electric charge density contributing to transportation of an electric charge inside the semiconductor by solving a Poisson equation and a movable electric charge continuous equation based on the calculated ionization rate in the equilibrium state; calculating said band gap narrowing and said ionization rate in a non-equilibrium state, taking presence of a potential into consideration, based on the calculated movable electric charge density; and repeating the calculation of the movable electric charge density by solving the Poisson equation and the movable electric charge continuous equation based on the ionization rate and the band gap narrowing in said non-equilibrium state, and the calculation of said band gap narrowing and said ionization rate based on the calculation result, until the ionization rate and the band gap narrowing in said non-equilibrium state converge.
摘要翻译：公开了一种方法，包括：计算半导体的带隙变窄和杂质在平衡状态下的电离速率; 通过在平衡状态下求解基于所计算的电离率的泊松方程和可移动电荷连续方程来计算有助于半导体内的电荷输送的可移动电荷密度; 基于所计算的可移动电荷密度，计算所述带隙变窄和所述电离率处于非平衡状态，考虑到考虑到电位; 并且通过基于所述非平衡状态下的电离速率和带隙变窄来求解泊松方程和可移动电荷连续方程，并且计算所述带隙变窄和所述电离的重复计算可移动电荷密度基于计算结果的速率，直到所述非平衡状态的电离速率和带隙变窄收敛。

5. 发明申请

US20060244435A1 TIME LIMIT FUNCTION UTILIZATION APPARATUS 有权
标题翻译：时间限制功能使用装置
公开(公告)号：US20060244435A1
公开(公告)日：2006-11-02
申请号：US11476722
申请日：2006-06-29
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
摘要翻译：时间限制功能利用装置包括第一功能块，第二功能块，连接第一功能块和第二功能块的信号线，并且允许使用通过彼此访问第一和第二功能块而产生的期望功能，以及插入或连接到信号线的半导体时间开关，并且在经过预定时间后禁用或使第一和第二功能块之间能够相互接近。

6. 发明授权

US08253255B2 Electronic device which disconnects first and second terminals upon lapse of a prescribed device lifetime 有权
标题翻译：电子设备在经过规定的设备寿命时断开第一和第二端子
公开(公告)号：US08253255B2
公开(公告)日：2012-08-28
申请号：US12049715
申请日：2008-03-17
申请人： Hiroshi Watanabe , Kazuya Matsuzawa
发明人： Hiroshi Watanabe , Kazuya Matsuzawa
IPC分类号： H01L23/48
CPC分类号： G06F21/85 , G06F21/71 , G06F2221/2137 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L25/18 , H01L27/105 , H01L27/11526 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/49171 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , Y10T307/951 , H01L2224/45099 , H01L2224/05599 , H01L2924/00
摘要： An electronic device includes a substrate, a first chip mounted on the substrate and having a first terminal, a second terminal, an input pad and a semiconductor time switch connected to the first terminal and the second terminal and configured to disconnect the first terminal and the second terminal upon lapse of a prescribed lifetime, the input pad being configured to set the prescribed lifetime, a second chip mounted on the substrate and incorporating an operational device having a third terminal connected to the first terminal and a fourth terminal serving as an input terminal for an external device, a first memory device mounted on the substrate, having a fifth terminal connected to the second terminal and storing information required for operating the operational device, and an encapsulater covering at least the input pad of the first chip.
摘要翻译：电子设备包括：基板，安装在基板上的第一芯片，具有连接到第一端子和第二端子的第一端子，第二端子，输入焊盘和半导体时间开关，并被配置为断开第一端子和第二端子经过规定的寿命时，输入焊盘被配置为设定规定的寿命，安装在基板上的第二芯片并且包括具有连接到第一端子的第三端子的操作装置和用作输入端子的第四端子对于外部设备，安装在基板上的第一存储器件，具有连接到第二端子的第五端子并且存储操作操作装置所需的信息，以及至少覆盖第一芯片的输入焊盘的封装器。

7. 发明授权

US07248034B2 Time limit function utilization apparatus 有权
公开(公告)号：US07248034B2
公开(公告)日：2007-07-24
申请号：US11476720
申请日：2006-06-29
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.

8. 发明申请

US20060152208A1 Time limit function utilization apparatus 有权
公开(公告)号：US20060152208A1
公开(公告)日：2006-07-13
申请号：US11353218
申请日：2006-02-14
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.

9. 发明申请

US20060244434A1 Time limit function utilization apparatus 有权
标题翻译：限时功能利用装置
公开(公告)号：US20060244434A1
公开(公告)日：2006-11-02
申请号：US11476720
申请日：2006-06-29
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
摘要翻译：时间限制功能利用装置包括第一功能块，第二功能块，连接第一功能块和第二功能块的信号线，并且允许使用通过彼此访问第一和第二功能块而产生的期望功能，以及插入或连接到信号线的半导体时间开关，并且在经过预定时间后禁用或使第一和第二功能块之间能够相互接近。

10. 发明授权

US07075284B2 Time limit function utilization 失效
标题翻译：时间限制功能利用率
公开(公告)号：US07075284B2
公开(公告)日：2006-07-11
申请号：US10612405
申请日：2003-07-03
申请人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
发明人： Hiroshi Watanabe , Kazuya Matsuzawa , Riichiro Shirota
IPC分类号： G01R19/00
CPC分类号： H01L29/7883 , G01R31/2642 , G06F9/3802 , G06F2221/2137 , G06K19/0723 , G06K19/073 , G06K19/07372 , G06Q20/341 , G07C9/00111 , G07C2009/00976 , G07F7/082 , G07F7/084 , G07F7/1008 , G11C16/14 , G11C16/349 , H01L21/28273 , H01L27/115 , H01L27/11558 , H01L29/42324 , H01L29/66825
摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
摘要翻译：时间限制功能利用装置包括第一功能块，第二功能块，连接第一功能块和第二功能块的信号线，并且允许使用通过彼此访问第一和第二功能块而产生的期望功能，以及插入或连接到信号线的半导体时间开关，并且在经过预定时间后禁用或使第一和第二功能块之间能够相互接近。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式