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1. 发明授权

US06393919B1 Pressure sensor with a thermal pressure detecting element 有权
标题翻译：具有热压检测元件的压力传感器
公开(公告)号：US06393919B1
公开(公告)日：2002-05-28
申请号：US09644693
申请日：2000-08-24
申请人： Hiroshi Ohji , Kazuhiko Tsutsumi , Yuichi Sakai , Naoki Yutani
发明人： Hiroshi Ohji , Kazuhiko Tsutsumi , Yuichi Sakai , Naoki Yutani
IPC分类号： G01L1904
CPC分类号： G01L11/002
摘要： A pressure sensor of the present invention comprises a diaphragm 6 having a first surface which receives pressure and a thermal detecting portion 3 with a heat sensitive portion disposed as to oppose the diaphragm through a spacer, wherein displacement values of the diaphragm owing to variations in pressure are detected at the thermal detecting portion as variation values of thermal equilibrium state. With this arrangement, a surface of the diaphragm which directly receives pressure from measuring fluid does not need to undergo film forming or photolithographic processes whereby main portions of thermal pressure detecting elements might be formed onto a silicon substrate by large quantities in a lump sum through simple manufacturing processes so that it is possible to improve accuracy and reliability of the thermal pressure detecting elements and to obtain a pressure sensor of low cost.
摘要翻译：本发明的压力传感器包括具有接收压力的第一表面的隔膜6和具有通过间隔件布置成与隔膜相对设置的热敏部分的热检测部分3，其中由于压力变化导致隔膜的位移值在热检测部分被检测为热平衡状态的变化值。通过这种布置，直接从测量流体接收压力的隔膜的表面不需要进行成膜或光刻工艺，其中热压检测元件的主要部分可以通过简单的一次性大量形成在硅基板上制造工艺，从而可以提高热压检测元件的精度和可靠性，并获得低成本的压力传感器。

2. 发明授权

US06591683B1 Pressure sensor 有权
标题翻译：压力传感器
公开(公告)号：US06591683B1
公开(公告)日：2003-07-15
申请号：US10203453
申请日：2002-08-09
申请人： Naoki Yutani , Hiroshi Ohji , Kazuhiko Tsutsumi
发明人： Naoki Yutani , Hiroshi Ohji , Kazuhiko Tsutsumi
IPC分类号： G01L1904
CPC分类号： G01L11/002
摘要： A pressure sensor includes a diaphragm having a first surface receiving pressure, and a first thermal detection section opposed to a central section of the diaphragm through a spacer and having a thermo-sensitive resistance section, and a second thermal detection section opposed to an end section of the diaphragm and having a thermo-sensitive resistance section, wherein the first thermo-sensitive resistance section and second thermo-sensitive resistance section are connected to independent, adjustable constant-current sources, respectively, and are connected to a differential amplifier which amplifies a difference between (i) a voltage of the first thermal detection section, which detects a displacement quantity of the diaphragm due to pressure change as a displacement quantity of a thermal equilibrium state by the thermal detection section, and (ii) a voltage of the second thermal detection section, which does not change according to pressure. The sensor can measure pressure with high accuracy.
摘要翻译：压力传感器包括具有第一表面接收压力的隔膜和通过间隔件与隔膜的中心部分相对并具有热敏电阻部分的第一热检测部分，以及与端部分相对的第二热检测部分并且具有热敏电阻部分，其中第一热敏电阻部分和第二热敏电阻部分分别连接到独立的可调节恒定电流源，并且连接到差分放大器，该差分放大器放大（i）第一热检测部分的电压之间的差异，所述第一热检测部分检测由于作为热检测部分的热平衡状态的位移量而由压力变化引起的隔膜的位移量，以及（ii）热检测部分，根据压力不变。传感器可以高精度地测量压力。

3. 发明授权

US06619130B1 Pressure sensor 有权
标题翻译：压力传感器
公开(公告)号：US06619130B1
公开(公告)日：2003-09-16
申请号：US10148809
申请日：2002-06-05
申请人： Naoki Yutani , Hiroshi Ohji , Kazuhiko Tsutsumi
发明人： Naoki Yutani , Hiroshi Ohji , Kazuhiko Tsutsumi
IPC分类号： G01L1302
CPC分类号： G01L11/002
摘要： A pressure sensor includes a first diaphragm having a first surface receiving pressure, a first thermal detection section located opposite a central section of the first diaphragm, and a second thermal detection section having little displacement by pressure, and located opposite the first diaphragm The pressure sensor amplifies and outputs a difference between the first thermal detection section for pressure measurement and the second thermal detection section for reference output. Since the diaphragm to which the second thermal detection section is opposed is equal in thickness to the diaphragm to which the first thermal detection section is opposed, pressure can be accurately measured relative to a sudden change in atmospheric temperature.
摘要翻译：压力传感器包括具有第一表面接收压力的第一隔膜，与第一隔膜的中心部分相对的第一热检测部分和具有几乎没有压力位移并且位于第一隔膜相对的第二热检测部分。压力传感器放大并输出用于压力测量的第一热检测部和用于参考输出的第二热检测部之间的差。由于第二热检测部相对的隔膜的厚度与第一热检测部相对的隔膜的厚度相等，因此能够相对于大气温度的突然变化来精确地测量压力。

4. 发明申请

US20130026494A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：硅碳化硅半导体器件
公开(公告)号：US20130026494A1
公开(公告)日：2013-01-31
申请号：US13417755
申请日：2012-03-12
申请人： Yasunori ORITSUKI , Naoki Yutani , Yoichiro Tarui
发明人： Yasunori ORITSUKI , Naoki Yutani , Yoichiro Tarui
IPC分类号： H01L29/24
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/1608 , H01L29/402 , H01L29/456 , H01L29/66068 , H01L29/7803 , H01L2924/0002 , H01L2924/00
摘要： An SiC semiconductor device includes a semiconductor element formed in an SiC substrate, a source electrode and a gate pad formed by using an interconnect layer having barrier metal provided at the bottom surface thereof, and a temperature measuring resistive element formed by using part of the barrier metal in the interconnect line.
摘要翻译： SiC半导体器件包括形成在SiC衬底中的半导体元件，源电极和通过使用其底表面上具有阻挡金属的互连层形成的栅极焊盘，以及通过使用部分势垒形成的温度测量电阻元件金属在互连线。

5. 发明授权

US07880763B2 Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07880763B2
公开(公告)日：2011-02-01
申请号：US12201764
申请日：2008-08-29
申请人： Naoki Yutani
发明人： Naoki Yutani
IPC分类号： G01R31/26 , H01L21/66
CPC分类号： H01L21/485 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/04026 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05644 , H01L2224/11334 , H01L2224/1134 , H01L2224/114 , H01L2224/1147 , H01L2224/11554 , H01L2224/116 , H01L2224/13099 , H01L2224/13144 , H01L2224/1411 , H01L2224/16 , H01L2224/16106 , H01L2224/2929 , H01L2224/29339 , H01L2224/73204 , H01L2224/73253 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/83801 , H01L2224/83851 , H01L2224/92125 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01061 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10272 , H01L2924/12032 , H01L2924/13091 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , Y10S438/931 , Y10S438/942 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device is obtained, in which excellent characteristics are achieved, the reliability is improved, and an SiC wafer can also be used for the fabrication. A plurality of Schottky-barrier-diode units 10 is formed on an SiC chip 9, and each of the units 10 has an external output electrode 4 independently of each other. Bumps 11 (the diameter is from several tens to several hundreds of μm) are formed only on the external output electrodes 4 of non-defective units among the units 10 formed on the SiC chip 9, meanwhile bumps are not formed on the external output electrodes 4 of defective units in which the withstand voltage is too low, or the leakage current is too much. Because the bumps are not formed on the defective units, Schottky-barrier-side electrodes 3 are connected in parallel to the exterior of the device through the bumps 11, and a wiring layer 13 and an external lead 13a of a wiring substrate 12; thus, only the external output electrodes 4 of the non-defective units 10 are connected in parallel with each other.
摘要翻译：获得了获得优异特性的可靠性提高的半导体器件，也可以使用SiC晶片进行制造。在SiC芯片9上形成有多个肖特基势垒二极管单元10，各单元10具有彼此独立的外部输出电极4。仅在形成在SiC芯片9上的单元10中的无缺陷单元的外部输出电极4上形成凸起11（直径为数十〜数百μm），而在外部输出电极上不形成凸点 4个耐压过低或漏电流过大的故障单元。由于在缺陷单元上没有形成凸块，因此肖特基势垒侧电极3通过凸块11与布线基板12的布线层13和外部引线13a并联连接到器件的外部。因此，只有非缺陷单元10的外部输出电极4彼此并联连接。

6. 发明申请

US20110001209A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110001209A1
公开(公告)日：2011-01-06
申请号：US12867283
申请日：2009-03-12
申请人： Hiroshi Watanabe , Naoki Yutani , Kenichi Ohtsuka , Kenichi Kuroda , Masayuki Imaizumi , Yoshinori Matsuno
发明人： Hiroshi Watanabe , Naoki Yutani , Kenichi Ohtsuka , Kenichi Kuroda , Masayuki Imaizumi , Yoshinori Matsuno
IPC分类号： H01L29/47
CPC分类号： H01L29/872 , H01L21/0495 , H01L24/05 , H01L29/0619 , H01L29/1608 , H01L29/6606 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/00
摘要： In a termination structure in which a JTE layer is provided, a level or defect existing at an interface between a semiconductor layer and an insulating film, or a minute amount of adventitious impurities that infiltrate into the semiconductor interface from the insulating film or from an outside through the insulating film becomes a source or a breakdown point of a leakage current, which deteriorates a breakdown voltage. A semiconductor device includes: an n− type semiconductor layer formed on an n+ type semiconductor substrate; a first electrode that is formed on the n− type semiconductor layer and functions as a Schottky electrode; a GR layer that is a first p type semiconductor layer formed on a surface of the n− type semiconductor layer below an end of the first electrode and a perimeter thereof; a JTE layer that is formed of a second p type semiconductor layer formed on a bottom and a lateral surface of a groove arranged in a ring shape around the GR layer apart from the GR layer, in a surface of the n− typesemiconductor layer; an insulating film provided so as to cover the GR layer and the JTE layer; and a second electrode that is an Ohmic electrode formed below a rear surface of the n+ type semiconductor substrate.
摘要翻译：在提供JTE层的端接结构中，存在于半导体层和绝缘膜之间的界面处的水平或缺陷，或从绝缘膜或外部渗透到半导体界面的少量不定性杂质通过绝缘膜成为漏电流的源极或击穿点，这会降低击穿电压。半导体器件包括：形成在n +型半导体衬底上的n型半导体层; 形成在n型半导体层上并用作肖特基电极的第一电极; GR层，其是形成在所述第一电极的端部下方的所述n型半导体层的表面上的第一p型半导体层及其周边; 在所述n型半导体层的表面中形成由形成在所述GR层之外的围绕所述GR层的环状的槽的底部和侧面上形成的第二p型半导体层的JTE层; 设置为覆盖GR层和JTE层的绝缘膜; 以及形成在n +型半导体衬底的后表面下方的欧姆电极的第二电极。

7. 发明申请

US20060131745A1 Semiconductor device and manufacturing method therefor 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060131745A1
公开(公告)日：2006-06-22
申请号：US11282600
申请日：2005-11-21
申请人： Naoki Yutani
发明人： Naoki Yutani
IPC分类号： H01L23/48
CPC分类号： H01L21/485 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/04026 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05644 , H01L2224/11334 , H01L2224/1134 , H01L2224/114 , H01L2224/1147 , H01L2224/11554 , H01L2224/116 , H01L2224/13099 , H01L2224/13144 , H01L2224/1411 , H01L2224/16 , H01L2224/16106 , H01L2224/2929 , H01L2224/29339 , H01L2224/73204 , H01L2224/73253 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/83801 , H01L2224/83851 , H01L2224/92125 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01061 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10272 , H01L2924/12032 , H01L2924/13091 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , Y10S438/931 , Y10S438/942 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device is obtained, in which excellent characteristics are achieved, the reliability is improved, and an SiC wafer can also be used for the fabrication. A plurality of Schottky-barrier-diode units 10 is formed on an SiC chip 9, and each of the units 10 has an external output electrode 4 independently of each other. Bumps 11 (the diameter is from several tens to several hundreds of μm) are formed only on the external output electrodes 4 of non-defective units among the units 10 formed on the SiC chip 9, meanwhile bumps are not formed on the external output electrodes 4 of defective units in which the withstand voltage is too low, or the leakage current is too much. Because the bumps are not formed on the defective units, Schottky-barrier-side electrodes 3 are connected in parallel to the exterior of the device through the bumps 11, and a wiring layer 13 and an external lead 13a of a wiring substrate 12; thus, only the external output electrodes 4 of the non-defective units 10 are connected in parallel with each other.
摘要翻译：获得了获得优异特性的可靠性提高的半导体器件，也可以使用SiC晶片进行制造。在SiC芯片9上形成有多个肖特基势垒二极管单元10，各单元10具有彼此独立的外部输出电极4。仅在形成在SiC芯片9上的单元10中的无缺陷单元的外部输出电极4上形成凸起11（直径为几十到几百个妈妈），而在外部输出电极上不形成凸点 4个耐压过低或漏电流过大的故障单元。由于在缺陷单元上没有形成凸块，所以通过凸块11和布线基板12的布线层13和外部引线13a，将肖特基势垒侧电极3与器件的外部并联连接。因此，只有非缺陷单元10的外部输出电极4彼此并联连接。

8. 发明授权

US09362391B2 Silicon carbide semiconductor device and method of manufacturing the same 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US09362391B2
公开(公告)日：2016-06-07
申请号：US14240017
申请日：2011-09-21
申请人： Yoichiro Tarui , Eisuke Suekawa , Naoki Yutani , Shiro Hino , Naruhisa Miura , Masayuki Imaizumi
发明人： Yoichiro Tarui , Eisuke Suekawa , Naoki Yutani , Shiro Hino , Naruhisa Miura , Masayuki Imaizumi
IPC分类号： H01L29/78 , H01L29/66 , H01L29/08 , H01L29/16 , H01L21/04 , H01L21/02
CPC分类号： H01L29/78 , H01L21/02529 , H01L21/046 , H01L21/0485 , H01L29/086 , H01L29/1608 , H01L29/66068 , H01L29/66477 , H01L29/7802
摘要： It is expected that both reduction of the resistance of a source region and reduction of a leakage current in a gate oxide film be achieved in an MOSFET in a silicon carbide semiconductor device. A leakage current to occur in a gate oxide film of the MOSFET is suppressed by reducing roughness at an interface between a source region and the gate oxide film. If an impurity concentration is to become high at a surface portion of the source region, the gate oxide film is formed by dry oxidation or CVD process. If the gate oxide film is formed by wet oxidation, the impurity concentration at the surface portion of the source region is controlled at a low level.
摘要翻译：期望在碳化硅半导体器件中的MOSFET中实现源极区域的电阻降低和栅极氧化膜中的漏电流的减小。通过减少源极区域和栅极氧化物膜之间的界面处的粗糙度来抑制在MOSFET的栅极氧化膜中发生的漏电流。如果杂质浓度在源极区的表面部分变高，则通过干法氧化或CVD法形成栅极氧化膜。如果通过湿式氧化形成栅极氧化膜，则源极区域的表面部分处的杂质浓度被控制在低水平。

9. 发明申请

US20130221477A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130221477A1
公开(公告)日：2013-08-29
申请号：US13883073
申请日：2011-12-22
申请人： Hiroshi Watanabe , Naoki Yutani , Yoshiyuki Nakaki , Kenichi Ohtsuka
发明人： Hiroshi Watanabe , Naoki Yutani , Yoshiyuki Nakaki , Kenichi Ohtsuka
IPC分类号： H01L29/872
CPC分类号： H01L29/872 , H01L27/0207 , H01L29/0619 , H01L29/0623 , H01L29/1608 , H01L29/6606
摘要： A semiconductor device that can achieve a high-speed operation at a time of switching, and the like. The semiconductor device includes: a p-type buried layer buried within an n−-type semiconductor layer; and a p-type surface layer formed in a central portion of each of cells. In a contact cell, the p-type buried layer is in contact with the p-type surface layer. The semiconductor device further includes: a p+-type contact layer formed on the p-type surface layer of the contact cell; and an anode electrode provided on the n−-type semiconductor layer. The anode electrode forms a Schottky junction with the n−-type semiconductor layer and forms an ohmic junction with the p+-type contact layer.
摘要翻译：可以在切换时实现高速运转的半导体装置等。半导体器件包括：埋在n型半导体层内的p型掩埋层; 以及形成在每个单元的中心部分的p型表面层。在接触电池中，p型掩埋层与p型表面层接触。半导体器件还包括：形成在接触单元的p型表面层上的p +型接触层; 以及设置在n型半导体层上的阳极电极。阳极与n型半导体层形成肖特基结，并与p +型接触层形成欧姆结。

10. 发明申请

US20090098719A1 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20090098719A1
公开(公告)日：2009-04-16
申请号：US12188676
申请日：2008-08-08
申请人： Yoshinori MATSUNO , Kenichi Ohtsuka , Kenichi Kuroda , Shozo Shikama , Naoki Yutani
发明人： Yoshinori MATSUNO , Kenichi Ohtsuka , Kenichi Kuroda , Shozo Shikama , Naoki Yutani
IPC分类号： H01L21/04
CPC分类号： H01L21/0495 , H01L29/6606
摘要： An object of the invention is to provide a method for manufacturing a silicon carbide semiconductor device having constant characteristics with reduced variations in forward characteristics. The method for manufacturing the silicon carbide semiconductor device according to the invention includes the steps of: (a) preparing a silicon carbide substrate; (b) forming an epitaxial layer on a first main surface of the silicon carbide substrate; (c) forming a protective film on the epitaxial layer; (d) forming a first metal layer on a second main surface of the silicon carbide substrate; (e) applying heat treatment to the silicon carbide substrate at a predetermined temperature to form an ohmic junction between the first metal layer and the second main surface of the silicon carbide substrate; (f) removing the protective film; (g) forming a second metal layer on the epitaxial layer; and (h) applying heat treatment to the silicon carbide substrate at a temperature from 400° C. to 600° C. to form a Schottky junction of desired characteristics between the second metal layer and the epitaxial layer.
摘要翻译：本发明的目的是提供一种制造具有恒定特性并减小正向特性变化的碳化硅半导体器件的方法。根据本发明的制造碳化硅半导体器件的方法包括以下步骤：（a）制备碳化硅衬底; （b）在所述碳化硅衬底的第一主表面上形成外延层; （c）在外延层上形成保护膜; （d）在所述碳化硅衬底的第二主表面上形成第一金属层; （e）在预定温度下对所述碳化硅衬底进行热处理以在所述第一金属层和所述碳化硅衬底的所述第二主表面之间形成欧姆结; （f）去除保护膜; （g）在所述外延层上形成第二金属层; 和（h）在400℃至600℃的温度下对所述碳化硅衬底进行热处理以在所述第二金属层和所述外延层之间形成所需特性的肖特基结。

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