专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07038930B2 Memory device with function to perform operation, and method of performing operation and storage 失效
标题翻译：具有执行功能的存储器件，以及执行操作和存储的方法
公开(公告)号：US07038930B2
公开(公告)日：2006-05-02
申请号：US10844069
申请日：2004-05-12
申请人： Hiroshi Nozawa , Hiroaki Kato , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Hiroaki Kato , Yoshikazu Fujimori
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： To provide a memory device with a function to perform an operation and a method of performing an operation and storage which can save space and cost and which can start, immediately after the power source is recovered, the processing which was being performed at the time of power failure. A memory cell MC can store two independent data sets; DRAM data (volatile data) and FeRAM data (non-volatile data). Thus, the number of memory cells can be reduced to a half. Also, the DRAM data to be used in the next operation of the two data sets which have been read out for the previous operation are temporarily held in a hold circuit 21 of an operation unit OU and then written back into the memory cell MC in a non-volatile manner as new FeRAM data for preparation of the next operation. Thus, even when the power source is shut down by an unexpected trouble, the data necessary for the next operation are not lost.
摘要翻译：为了提供具有执行操作的功能的存储器件和执行操作和存储的方法，其可以节省空间和成本，并且可以在电源恢复之后立即开始执行正在执行的处理电源（检测）失败。存储单元MC可以存储两个独立的数据集; DRAM数据（易失性数据）和FeRAM数据（非易失性数据）。因此，存储器单元的数量可以减少到一半。此外，将用于在先前操作中读出的两个数据组的下次操作中使用的DRAM数据被暂时保存在操作单元OU的保持电路21中，然后被写回到存储单元MC中作为新的FeRAM数据的非易失性方式，用于准备下一个操作。因此，即使当电源被意外的故障关闭时，下一个操作所需的数据也不会丢失。

2. 发明授权

US07039847B2 Coding-decoding device and method for conversion of binary sequences 失效
标题翻译：用于转换二进制序列的编码解码装置和方法
公开(公告)号：US07039847B2
公开(公告)日：2006-05-02
申请号：US10238984
申请日：2002-09-09
申请人： Hiroshi Nozawa , Shinzo Koyama , Masao Takayama , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Shinzo Koyama , Masao Takayama , Yoshikazu Fujimori
IPC分类号： G11C29/00
CPC分类号： G11C7/1006
摘要： A coding-decoding device and a coding-decoding method that take less time for coding and decoding are provided while using less number of logic gates. A memory device 15 substantially stores b pieces of conversion logic equations produced with a conversion logic equation producing device 13. An operation device 17 has a programmable hardware logic circuit to constitute logics sequentially according to plural execution unit logic equations obtained by dividing b pieces of conversion logic equations stored in the memory device 15 into execution units for respective execution unit logic equations using the hardware logic circuit. Besides, the operation device 17 sequentially divides and calculates the second sentences from the first sentences according to the constituted logics. An output device 19 collects and outputs the second sentences calculated with the operation device 17.
摘要翻译：在使用较少数量的逻辑门的同时，提供了编码解码装置和编码解码方法，其中编码解码时间较短。存储器装置15基本上存储由转换逻辑方程产生装置13产生的b个转换逻辑方程式。操作装置17具有可编程硬件逻辑电路，以根据通过使用硬件逻辑电路将存储在存储器件15中的b个转换逻辑方程分成执行单元逻辑方程而获得的多个执行单元逻辑方程来顺序地构成逻辑。此外，操作装置17根据构成的逻辑顺序地分割和计算来自第一句子的第二句子。输出装置19收集并输出用操作装置17计算的第二句子。

3. 发明申请

US20050117394A1 Switch matrix circuit, logical operation circuit, and switch circuit 有权
标题翻译：开关矩阵电路，逻辑运算电路和开关电路
公开(公告)号：US20050117394A1
公开(公告)日：2005-06-02
申请号：US11023831
申请日：2004-12-28
申请人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
IPC分类号： G11C11/22 , H03K17/24 , H03K17/693 , H03K19/177 , H04Q3/52 , G11C11/34
CPC分类号： H03K17/693 , G11C11/22 , H01L2924/0002 , H03K17/24 , H03K19/17712 , H01L2924/00
摘要： A switch circuit that is simple in constitution and capable of reliably controlling a switch cell is provided. Since the, gate terminal G1 of a transistor M1 in a switch cell SC is connected only to the terminal 37 of a transistor M2, when the transistor M2 is set to off, the moving path of the charge accumulated at the gate G1 of the transistor M1 is shut off. Consequently, even if the transistor M2 is set to an on state and immediately set back to an off state, the transistor M1 remains for some period of time in an on or off state corresponding to the switching data given through a bit line BL. It is possible to cause the transistor M1 to remain in an on or off state for a specified period of time without disposing a specific circuit for temporary storing the switching data.
摘要翻译：提供一种构造简单且能够可靠地控制开关电池的开关电路。由于开关单元SC中的晶体管M 1的栅极端子G 1仅连接到晶体管M 2的端子37，所以当晶体管M 2被设置为截止时，积聚在栅极的电荷的移动路径晶体管M 1的G 1被截止。因此，即使晶体管M 2被设置为导通状态并立即恢复为截止状态，晶体管M 1在对应于通过位线BL给出的开关数据的导通或截止状态下保持一段时间。可以使晶体管M 1在规定时间段内保持导通或截止状态，而不设置用于临时存储开关数据的特定电路。

4. 发明授权

US07218142B2 Switch matrix circuit, logical operation circuit, and switch circuit 有权
标题翻译：开关矩阵电路，逻辑运算电路和开关电路
公开(公告)号：US07218142B2
公开(公告)日：2007-05-15
申请号：US11023831
申请日：2004-12-28
申请人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
IPC分类号： H01L25/00 , H03K19/177
CPC分类号： H03K17/693 , G11C11/22 , H01L2924/0002 , H03K17/24 , H03K19/17712 , H01L2924/00
摘要： A switch circuit that is simple in constitution and capable of reliably controlling a switch cell is provided. Since the, gate terminal G1 of a transistor M1 in a switch cell SC is connected only to the terminal 37 of a transistor M2, when the transistor M2 is set to off, the moving path of the charge accumulated at the gate G1 of the transistor M1 is shut off. Consequently, even if the transistor M2 is set to an on state and immediately set back to an off state, the transistor M1 remains for some period of time in an on or off state corresponding to the switching data given through a bit line BL. It is possible to cause the transistor M1 to remain in an on or off state for a specified period of time without disposing a specific circuit for temporary storing the switching data.
摘要翻译：提供一种构造简单且能够可靠地控制开关电池的开关电路。由于开关单元SC中的晶体管M 1的栅极端子G 1仅连接到晶体管M 2的端子37，所以当晶体管M 2被设置为截止时，积聚在栅极的电荷的移动路径关断晶体管M 1的G 1。因此，即使晶体管M 2被设置为导通状态并立即恢复为截止状态，晶体管M 1在对应于通过位线BL给出的开关数据的导通或截止状态下保持一段时间。可以使晶体管M 1在规定时间段内保持导通或截止状态，而不设置用于临时存储开关数据的特定电路。

5. 发明授权

US07317794B2 Enciphering and deciphering apparatus, and enciphering and deciphering method 失效
标题翻译：加密和解密装置，以及加密和解密方法
公开(公告)号：US07317794B2
公开(公告)日：2008-01-08
申请号：US10378982
申请日：2003-03-03
申请人： Hiroshi Nozawa , Masao Takayama , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Masao Takayama , Yoshikazu Fujimori
IPC分类号： H04L9/28
CPC分类号： H04L9/302 , H04L2209/12
摘要： The present invention aims at providing a novel enciphering and deciphering apparatus and an enciphering and deciphering method related thereto, which are respectively capable of contracting the time required for enciphering and deciphering processes and decreasing the number of logic gates provided in the apparatus. Essentially based on an equation Xki=1+Σ((J=1, i)iCj·Xk−1j) and also based on an initial value consisting of a group of power raising values Xk0j corresponding to j=1 through m in relation to k−1=k0, an arithmetic operating unit 21 seeks a second expression Yk1 by serially computing a group of power raising values Xki corresponding to i=1 through m in relation to one unit of k shown in the above equation in a range from k=k0+1 up to k=k1 by applying binomial coefficients stored in a coefficient memory unit 17. Accordingly, once those binomial coefficients corresponding to predetermined integers n and m are stored in memory, thenceforth, it is possible to contract the time required for executing an enciphering or deciphering process related to identical integers n and m.
摘要翻译：本发明旨在提供一种新颖的加密和解密装置及其相关的加密和解密方法，它们能够缩短加密和解密处理所需的时间并减少设备中提供的逻辑门数。基本上基于方程式X 1 i S iΣΣ（（J = 1，i）＆lt; i＆lt; 并且还基于由一组增力值组成的初始值X＆lt; k＆gt;＆lt; j＆gt;＆lt; j＆gt; 相对于k-1 = k0对应于j = 1到m的算术运算单元21通过串联计算一组功率提升值X 存储在系数存储单元17中的系数。因此，一旦对应于预定的整数n和m的二项式系数被存储在存储器中，则可以缩小执行与相同的整数n和m相关的加密或解密处理所需的时间。

6. 发明授权

US06903572B2 Switch matrix circuit, logical operation circuit, and switch circuit 有权
标题翻译：开关矩阵电路，逻辑运算电路和开关电路
公开(公告)号：US06903572B2
公开(公告)日：2005-06-07
申请号：US10238037
申请日：2002-09-09
申请人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
发明人： Hiroshi Nozawa , Shinzo Koyama , Yoshikazu Fujimori
IPC分类号： G11C11/22 , H03K17/24 , H03K17/693 , H03K19/177 , H04Q3/52
CPC分类号： H03K17/693 , G11C11/22 , H01L2924/0002 , H03K17/24 , H03K19/17712 , H01L2924/00
摘要： A switch circuit that is simple in constitution and capable of reliably controlling a switch cell is provided. Since the gate terminal G1 of a transistor M1 in a switch cell SC is connected only to the terminal 37 of a transistor M2, when the transistor M2 is set to off, the moving path of the charge accumulated at the gate G1 of the transistor M1 is shut off. Consequently, even if the transistor M2 is set to an on state and immediately set back to an off state, the transistor M1 remains for some period of time in an on or off state corresponding to the switching data given through a bit line BL. It is possible to cause the transistor M1 to remain in an on or off state for a specified period of time without disposing a specific circuit for temporary storing the switching data.
摘要翻译：提供一种构造简单且能够可靠地控制开关电池的开关电路。由于开关单元SC中的晶体管M 1的栅极端子G 1仅连接到晶体管M 2的端子37，所以当晶体管M 2被设置为截止时，在栅极G处累积的电荷的移动路径晶体管M 1的1被截止。因此，即使晶体管M 2被设置为导通状态并立即恢复为截止状态，晶体管M 1在对应于通过位线BL给出的开关数据的导通或截止状态下保持一段时间。可以使晶体管M 1在规定时间段内保持导通或截止状态，而不设置用于临时存储开关数据的特定电路。

7. 发明授权

US4610078A Method of making high density dielectric isolated gate MOS transistor 失效
标题翻译：制造高密度介质隔离栅MOS晶体管的方法
公开(公告)号：US4610078A
公开(公告)日：1986-09-09
申请号：US684750
申请日：1984-12-21
申请人： Naohiro Matsukawa , Hiroshi Nozawa
发明人： Naohiro Matsukawa , Hiroshi Nozawa
IPC分类号： H01L29/78 , H01L21/28 , H01L21/336 , H01L21/308 , H01L21/265
CPC分类号： H01L29/66575 , H01L21/28 , Y10S148/082
摘要： There is disclosed a method of manufacturing a semiconductor device comprising a step of forming an isolation film having a patterned hole on a major surface of a semiconductor substrate of a P conductivity type, the wall of the isolation film defining the patterned hole having a large step, a step of forming a polysilicon layer on the major surface of the structure, a step of forming a first interlaid SiO.sub.2 layer on the polysilicon layer, a step of patterning the SiO.sub.2 layer and polysilicon layer using reactive ion etching process, thereby forming on the region of the substrate a gate electrode and a first SiO.sub.2 film superposed thereon, the continuous side wall of the gate electrode and first SiO.sub.2 film having a large step, a step of implanting an impurity ion into the substrate using the first SiO.sub.2 film as a mask, thereby forming an impurity diffused region of an N conductivity type in the substrate, a step of forming a second interlaid SiO.sub.2 layer on the major surface of the structure, and a step of applying reactive ion etching to the second SiO.sub.2 layer, thereby forming a contact hole in the second SiO.sub.2 layer leading to the impurity diffused region, while leaving part of the second SiO.sub.2 layer on the side walls of said isolation film, gate electrode and first SiO.sub.2 film.
摘要翻译：公开了一种制造半导体器件的方法，包括在P导电型半导体衬底的主表面上形成具有图案化孔的隔离膜的步骤，隔离膜的壁限定具有大步长的图案化孔在所述结构体的主表面上形成多晶硅层的工序，在所述多晶硅层上形成第一层叠SiO 2层的工序，使用反应离子蚀刻工序对所述SiO 2层和多晶硅层进行构图的工序，所述基板的区域是栅电极和叠置在其上的第一SiO 2膜，所述栅电极的连续侧壁和具有大台阶的第一SiO 2膜，使用所述第一SiO 2膜作为掩模将杂质离子注入所述基板的步骤，从而在衬底中形成N导电类型的杂质扩散区域，在该结构的主表面上形成第二层间SiO 2层的步骤，以及向第二SiO 2层施加反应离子蚀刻的步骤，从而在导致杂质扩散区域的第二SiO 2层中形成接触孔，同时在该隔离膜的侧壁上留下一部分第二SiO 2层，栅电极和第一个SiO 2膜。

8. 发明授权

US4441941A Method for manufacturing a semiconductor device employing element isolation using insulating materials 失效
标题翻译：使用绝缘材料制造使用元件隔离的半导体器件的方法
公开(公告)号：US4441941A
公开(公告)日：1984-04-10
申请号：US240300
申请日：1981-03-04
申请人： Hiroshi Nozawa
发明人： Hiroshi Nozawa
IPC分类号： H01L21/033 , H01L21/321 , H01L21/762 , H01L21/22
CPC分类号： H01L21/76227 , H01L21/033 , H01L21/32105 , Y10S438/911
摘要： A method for element isolation utilizing insulating materials on a semiconductor substrate in which an oxidizable material layer of polycrystalline silicon or the like is formed overlying the substrate surface, the oxidizable material layer disposed at the element-isolation-forming regions is oxidized using an oxidation mask, the oxidation mask is removed and, if necesary at least part of the unoxidized oxidizable material below the mask is removed. Predetermined processes such as oxidation and diffusion are performed thereafter to form semiconductor elements such as MOS transistors and bipolar transistors with high packaging density and reliability.
摘要翻译：使用半导体衬底上的绝缘材料进行元件隔离的方法，其中在衬底表面上形成多晶硅等的可氧化材料层，使用氧化掩模氧化设置在元件隔离形成区域处的可氧化材料层，除去氧化掩模，并且如果必要，去除掩模下面的至少部分未氧化的可氧化材料。之后进行氧化，扩散等预定处理，形成具有高封装密度和可靠性的MOS晶体管，双极晶体管等半导体元件。

9. 发明授权

US3956790A Method of apparatus for removing dust from the surface of a moving web 失效
标题翻译：从移动网的表面除去灰尘的装置的方法
公开(公告)号：US3956790A
公开(公告)日：1976-05-18
申请号：US491009
申请日：1974-07-23
申请人： Mamoru Ishiwata , Katzutaka Yoshida , Hiroshi Nozawa
发明人： Mamoru Ishiwata , Katzutaka Yoshida , Hiroshi Nozawa
IPC分类号： G03C1/74 , A47L5/38
CPC分类号： G03C1/74 , G03C2001/7429
摘要： Dust is removed from a running web by a counterflow liquid bath and downstream application of one or more high velocity air jets to a localized convex curvature of the web, said application of high velocity air jets being accompanied by application of vacuum pressure to remove the mist created by the air jets.
摘要翻译：通过逆流液浴从运行的纸幅中除去灰尘，并将一个或多个高速空气喷嘴下游施加到纸幅的局部凸曲面，所述施加高速空气喷嘴伴随着施加真空压力以除去雾由空中飞机创造。

10. 发明授权

US07891079B2 Manufacturing apparatus of a head gimbal assembly and manufacturing method of a head gimbal assembly 有权
标题翻译：头万向架组件的制造装置和头万向架组件的制造方法
公开(公告)号：US07891079B2
公开(公告)日：2011-02-22
申请号：US12489616
申请日：2009-06-23
申请人： Hiroshi Nozawa , Yukio Kato
发明人： Hiroshi Nozawa , Yukio Kato
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11B5/4826 , B21D5/04 , Y10T29/49025 , Y10T29/49027 , Y10T29/4903 , Y10T29/49032 , Y10T29/53122 , Y10T29/53165
摘要： A bending apparatus of a head gimbal assembly includes a suction unit configured to attract the head gimbal assembly, a movement unit configured to move a long tail connected to a terminal part, a stopper against which the moved long tail is butted, a transmission type optical sensor configured to detect that the long tail is positioned to the stopper, a tail holder configured to hold a part of the long tail on a work table, a roller configured to compress the terminal part against the tail holder and to bend the terminal part relative to the long tail at a right angle, and a controller configured to control, based on a detection result of the transmission type optical sensor, a movement of the tail holder to the work table and a movement of the roller to the tail holder.
摘要翻译：头万向架组件的弯曲装置包括：吸引单元，其构造成吸引头部万向架组件;移动单元，被配置为移动连接到端子部分的长尾端;移动的长尾巴对接的止动件;透射型光学传感器，被配置为检测长尾部位于止动件上，尾部保持器构造成将长尾巴的一部分保持在工作台上;辊子，其构造成压缩终端部件抵靠尾座并弯曲终端部件相对并且控制器被配置为基于透射型光学传感器的检测结果来控制尾座到工作台的移动以及辊到尾部保持器的移动。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式