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1. 发明申请

US20100330794A1 METHOD FOR CLEANING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：清洁半导体器件的方法
公开(公告)号：US20100330794A1
公开(公告)日：2010-12-30
申请号：US12819675
申请日：2010-06-21
申请人： Hirokazu KURISU , Yutaka Takeshima , Itaru Kanno , Masahiko Higashi , Yusaku Hirota
发明人： Hirokazu KURISU , Yutaka Takeshima , Itaru Kanno , Masahiko Higashi , Yusaku Hirota
IPC分类号： H01L21/28 , H01L21/306
CPC分类号： H01L21/02063 , H01L21/28518 , H01L21/76831 , H01L21/76895
摘要： There is provided a method for cleaning a semiconductor device capable of making compatible the inhibition of dissolution of a gate metal material and the acquisition of a favorable contact resistance. A method for cleaning a semiconductor device includes steps: a semiconductor substrate including silicon, and having a main surface is prepared; a multilayer gate including a metal layer and a silicon layer stacked sequentially from the bottom is formed over the main surface; a silicide layer is formed over the main surface and the silicon layer surface; an insulation layer is formed over the silicide layer in each of the main surface and the multilayer gate surface; a shared contact hole is formed in the insulation layer in such a manner that the silicide layer in the main surface of the semiconductor substrate and the surface of the multilayer gate is exposed from the insulation layer; and the shared contact hole is subjected to sulfuric acid cleaning, aqueous hydrogen peroxide cleaning, and APM cleaning separately, respectively, thereby to remove an altered layer formed in the shared contact hole.
摘要翻译：提供了一种能够使与栅极金属材料的溶解的抑制兼容并且获得良好的接触电阻的半导体器件的清洁方法。一种清洗半导体器件的方法，包括步骤：制备包括硅并具有主表面的半导体衬底; 在主表面上形成包括从底部依次堆叠的金属层和硅层的多层栅极; 在主表面和硅层表面上形成硅化物层; 在主表面和多层栅极表面中的每一个中的硅化物层上形成绝缘层; 在绝缘层中形成共享接触孔，使得半导体衬底的主表面中的硅化物层和多层栅极的表面从绝缘层露出; 分别对共用接触孔进行硫酸清洗，过氧化氢水清洗和APM清洗，从而除去形成在共用接触孔中的变化层。

2. 发明申请

US20070099406A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20070099406A1
公开(公告)日：2007-05-03
申请号：US11551861
申请日：2006-10-23
申请人： Masahiko Higashi , Satoshi Kume , Jiro Yugami , Shinichi Yamanari , Takahiro Maruyama , Itaru Kanno
发明人： Masahiko Higashi , Satoshi Kume , Jiro Yugami , Shinichi Yamanari , Takahiro Maruyama , Itaru Kanno
IPC分类号： H01L21/3205 , H01L21/4763 , H01L21/336
CPC分类号： H01L21/32134 , H01L21/28079 , H01L21/823842 , H01L21/82385 , H01L29/4958
摘要： In a semiconductor device manufacturing method of the invention, a metal film, for forming a gate electrode, is formed on a gate insulating film. Subsequently, when the metal film is processed, part of the metal film is removed by a wet etching process using a given chemical liquid.
摘要翻译：在本发明的半导体器件制造方法中，在栅极绝缘膜上形成用于形成栅电极的金属膜。随后，当处理金属膜时，通过使用给定的化学液体的湿蚀刻工艺去除部分金属膜。

3. 发明授权

US07250391B2 Cleaning composition for removing resists and method of manufacturing semiconductor device 失效
标题翻译：用于除去抗蚀剂的清洁组合物和制造半导体器件的方法
公开(公告)号：US07250391B2
公开(公告)日：2007-07-31
申请号：US10617128
申请日：2003-07-11
申请人： Itaru Kanno , Yasuhiro Asaoka , Masahiko Higashi , Yoshiharu Hidaka , Etsuro Kishio , Tetsuo Aoyama , Tomoko Suzuki , Toshitaka Hiraga , Toshihiko Nagai
发明人： Itaru Kanno , Yasuhiro Asaoka , Masahiko Higashi , Yoshiharu Hidaka , Etsuro Kishio , Tetsuo Aoyama , Tomoko Suzuki , Toshitaka Hiraga , Toshihiko Nagai
IPC分类号： C11D7/50
CPC分类号： H01L21/02063 , G03F7/423 , G03F7/425 , H01L21/31116 , H01L21/76807 , H01L21/76814 , H01L21/76831 , H01L21/76838
摘要： The cleaning composition for removing resists includes a salt of hydrofluoric acid and a base not containing a metal (A component), a water-soluble organic solvent (B1 component), at least one organic acid or inorganic acid (C component), water (D component), and, optionally, an ammonium salt (E1 component), and having a pH 4-8. Thus, in manufacturing a semiconductor device, such as a copper interconnecting process, efficiency of removing resist residue and other etching residue after etching or ashing is improved, and corrosion resistance of a copper and an insulating film is also improved.
摘要翻译：用于除去抗蚀剂的清洁组合物包括氢氟酸盐和不含金属的基质（A组分），水溶性有机溶剂（B1组分），至少一种有机酸或无机酸（C组分），水（ D成分）和任选的铵盐（E1成分），pH4〜8。因此，在制造诸如铜互连工艺的半导体器件时，蚀刻或灰化后除去抗蚀剂残留物和其它蚀刻残留物的效率提高，铜和绝缘膜的耐腐蚀性也得到改善。

4. 发明授权

US07537987B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US07537987B2
公开(公告)日：2009-05-26
申请号：US11551861
申请日：2006-10-23
申请人： Masahiko Higashi , Satoshi Kume , Jiro Yugami , Shinichi Yamanari , Takahiro Maruyama , Itaru Kanno
发明人： Masahiko Higashi , Satoshi Kume , Jiro Yugami , Shinichi Yamanari , Takahiro Maruyama , Itaru Kanno
IPC分类号： H01L21/84
CPC分类号： H01L21/32134 , H01L21/28079 , H01L21/823842 , H01L21/82385 , H01L29/4958
摘要： In a semiconductor device manufacturing method of the invention, a metal film, for forming a gate electrode, is formed on a gate insulating film. Subsequently, when the metal film is processed, part of the metal film is removed by a wet etching process using a given chemical liquid.
摘要翻译：在本发明的半导体器件制造方法中，在栅极绝缘膜上形成用于形成栅电极的金属膜。随后，当处理金属膜时，通过使用给定的化学液体的湿蚀刻工艺去除部分金属膜。

5. 发明授权

US09935320B2 Composite body, collector member, gas tank, and fuel cell device 有权
公开(公告)号：US09935320B2
公开(公告)日：2018-04-03
申请号：US13580639
申请日：2011-02-25
申请人： Tetsurou Fujimoto , Masahiko Higashi
发明人： Tetsurou Fujimoto , Masahiko Higashi
IPC分类号： H01M8/02 , H01M8/0217 , C23C28/00 , H01M8/0228 , C22C18/04 , C22C19/05 , C22C38/18 , C23C14/08 , H01M8/124
CPC分类号： H01M8/0217 , C22C18/04 , C22C19/05 , C22C19/058 , C22C38/18 , C23C14/08 , C23C28/345 , H01M8/0228 , H01M2008/1293
摘要： A composite body includes a substrate containing Cr; and a first composite oxide layer disposed on at least a part of a surface of the substrate, the first composite oxide layer having a spinel type crystal structure, a first largest content and a second largest content among constituent elements excluding oxygen of the first composite oxide layer being Zn and Al in random order. Accordingly, the composite body can suppress diffusion of Cr from the substrate containing Cr to the first composite oxide layer, and has improved long-term reliability. A collector member and a gas tank, each of which is formed of the composite body, can have improved long-term reliability. A fuel cell device having excellent long-term reliability can be obtained using the collector member and the gas tank.

6. 发明授权

US08952536B2 Semiconductor device and method of fabrication 有权
公开(公告)号：US08952536B2
公开(公告)日：2015-02-10
申请号：US12199690
申请日：2008-08-27
申请人： Masahiko Higashi , Hiroyuki Nansei
发明人： Masahiko Higashi , Hiroyuki Nansei
IPC分类号： H01L23/52 , H01L27/105 , H01L21/265 , H01L27/115
CPC分类号： H01L27/105 , H01L21/26586 , H01L27/11534 , H01L27/11568
摘要： A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of Si3N4.

7. 发明授权

US08749012B2 Methods and structures for discharging plasma formed during the fabrication of semiconductor device 有权
标题翻译：在半导体器件制造期间形成的放电等离子体的方法和结构
公开(公告)号：US08749012B2
公开(公告)日：2014-06-10
申请号：US12004969
申请日：2007-12-20
申请人： Masahiko Higashi , Naoki Takeguchi
发明人： Masahiko Higashi , Naoki Takeguchi
IPC分类号： H01L31/058
CPC分类号： H01L27/11568 , H01L23/5256 , H01L27/115 , H01L29/66833 , H01L2924/0002 , H01L2924/00
摘要： Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.
摘要翻译：公开了在制造半导体器件期间形成的用于放电等离子体的方法和结构。半导体器件包括字线，公共接地线和用于电耦合字线和公共接地线的熔丝结构，直到通过熔丝结构施加断开信号。

8. 发明申请

US20130020673A1 PROTECTION DIODE AND SEMICONDUCTOR DEVICE HAVING THE SAME 审中-公开
标题翻译：保护二极管和具有该保护二极管的半导体器件
公开(公告)号：US20130020673A1
公开(公告)日：2013-01-24
申请号：US13547496
申请日：2012-07-12
申请人： Atsushi HIRAMA , Masahiko Higashi
发明人： Atsushi HIRAMA , Masahiko Higashi
IPC分类号： H01L27/08
CPC分类号： H01L27/0255 , H01L29/0649 , H01L29/861
摘要： A protection diode includes a semiconductor substrate having a first region, a second region surrounding the first region, and a third region surrounding the second region; a first insulation layer disposed between the second region and the third region; a first conductive type semiconductor portion disposed in the third region; a second conductive type semiconductor portion disposed in the second region; and a capacity reduction layer disposed in the first region.
摘要翻译：保护二极管包括具有第一区域，围绕第一区域的第二区域和围绕第二区域的第三区域的半导体衬底; 设置在所述第二区域和所述第三区域之间的第一绝缘层; 设置在所述第三区域中的第一导电型半导体部分; 设置在所述第二区域中的第二导电型半导体部分; 以及设置在所述第一区域中的容量降低层。

9. 发明申请

US20090297917A1 HEAT-RESISTANT ALLOY MEMBER, ALLOY MEMBER FOR FUEL CELL, COLLECTOR MEMBER FOR FUEL CELL, CELL STACK, AND FUEL CELL APPARATUS 审中-公开
标题翻译：耐热合金会员，燃料电池用合金会员，燃料电池收集器部件，电池组和燃料电池装置
公开(公告)号：US20090297917A1
公开(公告)日：2009-12-03
申请号：US12091734
申请日：2006-10-27
申请人： Masahiko Higashi , Tetsuro Fujimoto
发明人： Masahiko Higashi , Tetsuro Fujimoto
IPC分类号： H01M8/02 , B32B15/04 , H01M2/02
CPC分类号： H01M8/021 , H01M8/0204 , H01M8/0208 , H01M8/0217 , H01M8/0228 , H01M8/2425
摘要： The present invention provides a heat-resistant alloy member which hardly causes external diffusion of Cr, an alloy member for a fuel cell, a collector member for a fuel cell, a cell stack, and a fuel cell apparatus.The surface of a collector base material 201 containing Cr is coated with a Cr diffusion preventing layer 203 made of an oxide containing Zn and Mn and a coating layer 202 made of an oxide containing Zn is formed on the surface of the Cr diffusion preventing layer 203. The coating layer 202 preferably contains at least one kind of Al and Fe as a trivalent or higher valent positive metal element.
摘要翻译：本发明提供一种难以引起Cr的外部扩散的耐热合金构件，燃料电池用合金构件，燃料电池用集电体构件，电池组以及燃料电池装置。包含Cr的集电体基材201的表面涂覆有由包含Zn和Mn的氧化物制成的Cr扩散防止层203，并且在Cr扩散防止层203的表面上形成由包含Zn的氧化物制成的涂层202 涂层202优选含有三价以上的金属元素中的至少一种Al和Fe。

10. 发明申请

US20060076598A1 Semiconductor device and method of fabrication 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060076598A1
公开(公告)日：2006-04-13
申请号：US11237591
申请日：2005-09-27
申请人： Masahiko Higashi , Hiroyuki Nansei
发明人： Masahiko Higashi , Hiroyuki Nansei
IPC分类号： H01L29/94
CPC分类号： H01L27/105 , H01L21/26586 , H01L27/11534 , H01L27/11568
摘要： A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of Si3N4.
摘要翻译：半导体存储器件采用SONOS型存储器架构，并且在其中埋入导电膜的浅沟槽沟槽中包括位线扩散层。这使得可以在不扩大半导体衬底的主表面上的面积的情况下降低位线扩散层的电阻率，并且制造具有稳定的电特性的半导体存储器件而不扩大单元面积。位线通过将离子注入到Si 3 N 4 N 3的侧壁中而形成。

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