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1. 发明授权

US07554305B2 Linear regulator with discharging gate driver 有权
标题翻译：带放电栅极驱动器的线性稳压器
公开(公告)号：US07554305B2
公开(公告)日：2009-06-30
申请号：US10985905
申请日：2004-11-12
申请人： Hideo Nunokawa , Tatsuo Kato , Miki Suzuki , Tomonari Morishita
发明人： Hideo Nunokawa , Tatsuo Kato , Miki Suzuki , Tomonari Morishita
IPC分类号： G05F1/56
CPC分类号： G05F1/575
摘要： Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.
摘要翻译：即使例如，由于诸如来自外部的噪声等外部因素将电荷注入到输出晶体管中，为了防止降压电压上升，降压电路由N沟道型输出晶体管其控制控制端的电压，升压器，其连接到输出晶体管的控制端并提高控制端的电压，以及放电电路，其在输出晶体管的控制端放电电从输入端输入的电源电压被降低到期望的降压电压并从输出端输出。

2. 发明申请

US20060012354A1 Step-down circuit 有权
标题翻译：降压电路
公开(公告)号：US20060012354A1
公开(公告)日：2006-01-19
申请号：US10985905
申请日：2004-11-12
申请人： Hideo Nunokawa , Tatsuo Kato , Miki Suzuki , Tomonari Morishita
发明人： Hideo Nunokawa , Tatsuo Kato , Miki Suzuki , Tomonari Morishita
IPC分类号： G05F1/56
CPC分类号： G05F1/575
摘要： Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.
摘要翻译：即使例如，由于诸如来自外部的噪声等外部因素将电荷注入到输出晶体管中，为了防止降压电压上升，降压电路由N沟道型输出晶体管其控制控制端的电压，升压器，其连接到输出晶体管的控制端并提高控制端的电压，以及放电电路，其在输出晶体管的控制端放电电从输入端输入的电源电压被降低到期望的降压电压并从输出端输出。

3. 发明授权

US07034514B2 Semiconductor integrated circuit using band-gap reference circuit 有权
标题翻译：半导体集成电路采用带隙参考电路
公开(公告)号：US07034514B2
公开(公告)日：2006-04-25
申请号：US10808532
申请日：2004-03-25
申请人： Suguru Tachibana , Tatsuo Kato , Tomonari Morishita
发明人： Suguru Tachibana , Tatsuo Kato , Tomonari Morishita
IPC分类号： G05F3/16 , G05F3/20
CPC分类号： G05F3/30
摘要： A semiconductor device is disclosed including a current generator circuit that generates a first current substantially proportional to an absolute temperature, the first current being determined by a size ratio of a MOS transistor, and by a resistor; and a starting-up circuit that causes the current generator circuit to generate the first current at a stable working point of the current generator circuit, wherein while the current generator circuit operates at the stable working point, a current that flows through the starting-up circuit is determined by a diffusion resistance and a MOS transistor. When the current generator circuit starts operating at a stable operating point, resistance of the diffusion resistor and a MOS transistor connected in series determines a current that flows through a starting-up circuit. According to the above arrangements, the power consumption of the circuit can be reduced by increasing the resistance of the diffused resistor.
摘要翻译：公开了一种半导体器件，其包括电流发生器电路，其产生与绝对温度成正比的第一电流，第一电流由MOS晶体管的尺寸比和电阻器确定; 以及启动电路，其使得所述电流发生器电路在所述电流发生器电路的稳定工作点处产生所述第一电流，其中当所述电流发生器电路在所述稳定工作点处工作时，流过所述启动的电流电路由扩散电阻和MOS晶体管决定。当电流发生器电路在稳定工作点开始工作时，串联的扩散电阻器和MOS晶体管的电阻决定了流过启动电路的电流。根据上述配置，可以通过增加扩散电阻器的电阻来降低电路的功耗。

4. 发明申请

US20050088163A1 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US20050088163A1
公开(公告)日：2005-04-28
申请号：US10808532
申请日：2004-03-25
申请人： Suguru Tachibana , Tatsuo Kato , Tomonari Morishita
发明人： Suguru Tachibana , Tatsuo Kato , Tomonari Morishita
IPC分类号： H01L27/04 , G05F1/40 , G05F3/24 , G05F3/30 , H01L21/822 , H03F3/345
CPC分类号： G05F3/30
摘要： A semiconductor device is disclosed including a current generator circuit that generates a first current substantially proportional to an absolute temperature, the first current being determined by a size ratio of a MOS transistor, and by a resistor; and a starting-up circuit that causes the current generator circuit to generate the first current at a stable working point of the current generator circuit, wherein while the current generator circuit operates at the stable working point, a current that flows through the starting-up circuit is determined by a diffusion resistance and a MOS transistor. When the current generator circuit starts operating at a stable operating point, resistance of the diffusion resistor and a MOS transistor connected in series determines a current that flows through a starting-up circuit. According to the above arrangements, the power consumption of the circuit can be reduced by increasing the resistance of the diffused resistor.
摘要翻译：公开了一种半导体器件，其包括电流发生器电路，其产生与绝对温度成正比的第一电流，第一电流由MOS晶体管的尺寸比和电阻器确定; 以及启动电路，其使得所述电流发生器电路在所述电流发生器电路的稳定工作点处产生所述第一电流，其中当所述电流发生器电路在所述稳定工作点处工作时，流过所述启动的电流电路由扩散电阻和MOS晶体管决定。当电流发生器电路在稳定工作点开始工作时，串联的扩散电阻器和MOS晶体管的电阻决定了流过启动电路的电流。根据上述配置，可以通过增加扩散电阻器的电阻来降低电路的功耗。

5. 发明申请

US20050052303A1 AD CONVERTER WITH REDUCED CURRENT CONSUMPTION 有权
标题翻译： AD转换器具有降低的电流消耗
公开(公告)号：US20050052303A1
公开(公告)日：2005-03-10
申请号：US10774525
申请日：2004-02-10
申请人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
发明人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
IPC分类号： H03M1/38 , H03K5/08 , H03M1/00 , H03M1/46 , H03M1/66
CPC分类号： H03M1/002 , H03M1/468
摘要： An AD converter includes a sample-&-hold circuit which samples and holds an input analog potential in a first period, and generates a signal indicative of a magnitude relation between the held input analog potential and a reference potential in a second period, a plurality of amplifiers connected in series which amplify an output of the sample-&-hold circuit, and a control circuit which controls operating timing of the amplifiers so as to make at least one of the amplifiers start operating in a middle of the first period.
摘要翻译： AD转换器包括采样保持电路，其在第一周期中采样并保持输入模拟电位，并且产生指示在第二周期中保持的输入模拟电位与参考电位之间的大小关系的信号，多个放大器连接的放大器，其放大采样保持电路的输出;以及控制电路，其控制放大器的工作时序，以使至少一个放大器在第一周期的中间开始工作。

6. 发明授权

US06842063B2 Analog switch circuit 有权
标题翻译：模拟开关电路
公开(公告)号：US06842063B2
公开(公告)日：2005-01-11
申请号：US10625738
申请日：2003-07-24
申请人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
发明人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
IPC分类号： H03K17/08 , H03K17/06 , H03K17/687 , H03K17/62
CPC分类号： H03K17/6872 , H03K17/063 , H03K17/6874
摘要： An analog switch circuit with superior breakdown voltage characteristics that can operate at a high speed at a low power supply voltage. The analog switch circuit includes a comparator circuit for inputting and comparing an analog input signal input to an analog switch section and a reference signal. If the input potential of the analog input signal is lower than the reference potential of the reference signal, a voltage boost circuit sets a potential of a gate of an n MOS transistor included in the analog switch section to a potential of positive power supply voltage. If the input potential of the analog input signal is higher than the reference potential of the reference signal, the voltage boost circuit boosts the potential of the gate to a potential higher than the potential of power supply voltage.
摘要翻译：具有优异的击穿电压特性的模拟开关电路，可在低电源电压下高速运行。模拟开关电路包括用于输入和比较输入到模拟开关部分的模拟输入信号和参考信号的比较器电路。如果模拟输入信号的输入电位低于参考信号的参考电位，则升压电路将模拟开关部分中包括的n个MOS晶体管的栅极的电位设置为正电源电压的电位。如果模拟输入信号的输入电位高于参考信号的参考电位，则升压电路将栅极的电位升高到高于电源电压的电位。

7. 发明授权

US06714151B2 A/D converter 有权
标题翻译： A / D转换器
公开(公告)号：US06714151B2
公开(公告)日：2004-03-30
申请号：US10465549
申请日：2003-06-20
申请人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
发明人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
IPC分类号： H03M112
CPC分类号： H03M1/68 , H03M1/468 , H03M1/765 , H03M1/804
摘要： An A/D converter includes a capacitor type D/A conversion circuit including a capacitor array constituted of a plurality of capacitors for sampling an input potential and storing electric charge, a first resistor type D/A conversion circuit for generating a desired potential by potential division, a second resistor type D/A conversion circuit for generating a desired potential by potential division, a first signal path for adding an output of the first resistor type D/A conversion circuit to an output of the capacitor type D/A conversion circuit by capacity coupling; a second signal path for adding an output of the second resistor type D/A conversion circuit to an output of the capacitor type D/A conversion circuit by capacity coupling, and a comparing circuit for determining whether an output potential of the capacitor type D/A conversion circuit is higher or lower than an input potential, and thereby the circuit with processing time of A/D conversion being shortened can be provided.
摘要翻译： A / D转换器包括电容器型D / A转换电路，其包括由用于对输入电位进行采样并存储电荷的多个电容器构成的电容器阵列，用于通过电位产生所需电位的第一电阻器D / A转换电路用于通过电势分割产生所需电位的第二电阻器D / A转换电路，用于将第一电阻器型D / A转换电路的输出与电容器类型D / A转换电路的输出相加的第一信号路径通过容量耦合; 第二信号路径，用于通过电容耦合将第二电阻器D / A转换电路的输出加到电容器类型D / A转换电路的输出;以及比较电路，用于确定电容器类型D / A转换电路高于或低于输入电位，从而可以提供A / D转换处理时间缩短的电路。

8. 发明授权

US06867723B1 AD converter with reduced current consumption 有权
标题翻译： AD转换器，降低电流消耗
公开(公告)号：US06867723B1
公开(公告)日：2005-03-15
申请号：US10774525
申请日：2004-02-10
申请人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
发明人： Suguru Tachibana , Tatsuo Kato , Hideo Nunokawa
IPC分类号： H03M1/38 , H03K5/08 , H03M1/00 , H03M1/46 , H03M1/12
CPC分类号： H03M1/002 , H03M1/468
摘要： An AD converter includes a sample-&-hold circuit which samples and holds an input analog potential in a first period, and generates a signal indicative of a magnitude relation between the held input analog potential and a reference potential in a second period, a plurality of amplifiers connected in series which amplify an output of the sample-&-hold circuit, and a control circuit which controls operating timing of the amplifiers so as to make at least one of the amplifiers start operating in a middle of the first period.
摘要翻译： AD转换器包括采样保持电路，其在第一周期中采样并保持输入模拟电位，并且产生指示在第二周期中保持的输入模拟电位与参考电位之间的大小关系的信号，多个放大器连接的放大器，其放大采样保持电路的输出;以及控制电路，其控制放大器的工作时序，以使至少一个放大器在第一周期的中间开始工作。

9. 发明授权

US07997939B2 Plug 有权
标题翻译：插头
公开(公告)号：US07997939B2
公开(公告)日：2011-08-16
申请号：US12845504
申请日：2010-07-28
申请人： Taku Akaiwa , Susumu Shinozaki , Takeshi Matsuda , Tatsuo Kato , Masaji Komuro , Kenji Nakazawa , Kenji Hatano , Yoshitaka Kimura
发明人： Taku Akaiwa , Susumu Shinozaki , Takeshi Matsuda , Tatsuo Kato , Masaji Komuro , Kenji Nakazawa , Kenji Hatano , Yoshitaka Kimura
IPC分类号： H01R24/04
CPC分类号： H01R24/58 , H01R24/66 , H01R2107/00
摘要： A plug includes a plug housing and a metal terminal group. The metal terminal group includes a mating electrode group on the first end side thereof and a connection electrode group on the second end side, the mating electrode group including mating electrode sections that are disposed with an insulating resin interposed therebetween and are to be in contact with the contacts of a mating jack, the connection electrode group including connection electrode sections that are disposed with an insulating resin interposed therebetween and are connected to the electrodes of a connection member. The mating electrode sections are disposed coaxially with an axis P of the plug, and at least two of the connection electrode sections are disposed around the axis P so as to surround the axis P side by side.
摘要翻译：插头包括插头壳体和金属端子组。金属端子组包括在其第一端侧的配合电极组和第二端侧的连接电极组，所述配合电极组包括配置有绝缘树脂的配合电极部，并且与第配合插座的触点，连接电极组包括连接电极部分，该连接电极部分设置有绝缘树脂并且连接到连接部件的电极。配合电极部分与插头的轴线P同轴设置，并且至少两个连接电极部分围绕轴线P设置成围绕轴线P并排。

10. 发明授权

US07586371B2 Regulator circuit 有权
标题翻译：调节器电路
公开(公告)号：US07586371B2
公开(公告)日：2009-09-08
申请号：US11589140
申请日：2006-10-30
申请人： Suguru Tachibana , Kenta Aruga , Tatsuo Kato
发明人： Suguru Tachibana , Kenta Aruga , Tatsuo Kato
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/347 , H03F3/45183 , H03F2200/453 , H03F2200/456 , H03F2203/45138 , H03F2203/45466
摘要： The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.
摘要翻译：本发明被设计为采用差分对型放大器电路，其包括由接收第一信号的输入的第一晶体管和由第二晶体管构成的差分对，所述第二晶体管接收通过输出第二信号而产生的第三信号的输入，电压电平是电源电压。需要匹配的元件是构成放大器电路的差分对的两个晶体管。因此，不管放大器电路之间的布局如何，需要匹配的元件可以彼此靠近放置。

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