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1. 发明授权

US06235648B1 Semiconductor device including insulation film and fabrication method thereof 有权
标题翻译：包括绝缘膜的半导体器件及其制造方法
公开(公告)号：US06235648B1
公开(公告)日：2001-05-22
申请号：US09160044
申请日：1998-09-25
申请人： Hideki Mizuhara , Hiroyuki Watanabe , Naoteru Matsubara
发明人： Hideki Mizuhara , Hiroyuki Watanabe , Naoteru Matsubara
IPC分类号： H01L21461
CPC分类号： H01L21/76859 , H01L21/02126 , H01L21/02129 , H01L21/02137 , H01L21/02164 , H01L21/0217 , H01L21/022 , H01L21/02274 , H01L21/02282 , H01L21/02321 , H01L21/02351 , H01L21/31111 , H01L21/31116 , H01L21/31155 , H01L21/31612 , H01L21/31633 , H01L21/3185 , H01L21/76801 , H01L21/76825 , H01L21/76829
摘要： A semiconductor device including an insulation film superior in insulation characteristic is obtained. Boron ions are introduced by ion implantation into an organic SOG film with a silicon nitride film formed on the organic SOG film. By this boron implantation, the property of the organic SOG film is modified. The moisture and hydroxyl group included in the film are greatly reduced irrespective of the amount of dose of ions. By using such a layered film of a modified SOG film and a silicon nitride film thereupon as an interlayer insulation film or a passivation film, the water resistance of a semiconductor device can be improved sufficiently.
摘要翻译：获得包括绝缘特性优异的绝缘膜的半导体器件。通过离子注入将硼离子引入到在有机SOG膜上形成的氮化硅膜的有机SOG膜中。通过这种硼注入，有机SOG膜的性质被改变。包括在膜中的水分和羟基与离子的剂量无关地大大降低。通过使用这样的改性SOG膜和氮化硅膜的分层膜作为层间绝缘膜或钝化膜，可以充分提高半导体器件的耐水性。

2. 发明授权

US06690084B1 Semiconductor device including insulation film and fabrication method thereof 有权
标题翻译：包括绝缘膜的半导体器件及其制造方法
公开(公告)号：US06690084B1
公开(公告)日：2004-02-10
申请号：US09716334
申请日：2000-11-21
申请人： Hideki Mizuhara , Hiroyuki Watanabe , Naoteru Matsubara
发明人： Hideki Mizuhara , Hiroyuki Watanabe , Naoteru Matsubara
IPC分类号： H01L23522
CPC分类号： H01L21/02126 , H01L21/02129 , H01L21/02137 , H01L21/02282 , H01L21/02321 , H01L21/0234 , H01L21/02351 , H01L21/02362 , H01L21/31111 , H01L21/31116 , H01L21/31155 , H01L21/31612 , H01L21/31633 , H01L21/3185 , H01L21/76825 , H01L21/76829
摘要： A semiconductor device including an insulation film superior in insulation characteristic is obtained. Boron ions are introduced by ion implantation into an organic SOG film with a silicon nitride film formed on the organic SOG film. By this boron implantation, the property of the organic SOG film is modified. The moisture and hydroxyl group included in the film are greatly reduced irrespective of the amount of dose of ions. By using such a layered film of a modified SOG film and a silicon nitride film thereupon as an interlayer insulation film or a passivation film, the water resistance of a semiconductor device can be improved sufficiently.
摘要翻译：获得包括绝缘特性优异的绝缘膜的半导体器件。通过离子注入将硼离子引入到在有机SOG膜上形成的氮化硅膜的有机SOG膜中。通过这种硼注入，有机SOG膜的性质被改变。包括在膜中的水分和羟基与离子的剂量无关地大大降低。通过使用这样的改性SOG膜和氮化硅膜的分层膜作为层间绝缘膜或钝化膜，可以充分提高半导体器件的耐水性。

3. 发明授权

US06617240B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06617240B2
公开(公告)日：2003-09-09
申请号：US09748230
申请日：2000-12-27
申请人： Yasunori Inoue , Naoteru Matsubara , Hidetaka Nishimura , Hideki Mizuhara
发明人： Yasunori Inoue , Naoteru Matsubara , Hidetaka Nishimura , Hideki Mizuhara
IPC分类号： H01L214763
CPC分类号： H01L21/76877 , H01L21/76802 , H01L21/76825 , H01L21/76828
摘要： A method of fabricating a semiconductor device capable of attaining an excellent embedding characteristic also when an opening has a small diameter is obtained. According to this method of fabricating a semiconductor device, an interlayer dielectric film having an opening is formed. A first conductive member is formed in the opening by sputtering. In advance of formation of the first conductive member, first heat treatment is performed at a temperature capable of reducing the quantity of moisture and hydroxyl groups in the interlayer dielectric film. Thus, the interlayer dielectric film has a small quantity of moisture and hydroxyl groups when the first conductive member is embedded in the opening, whereby the embedding characteristic of the first conductive member is improved. Consequently, electric characteristics of a contact part can be improved also when the opening has a small diameter.
摘要翻译：获得了当开口具有小直径时也能够获得优异的嵌入特性的半导体器件的制造方法。根据制造半导体器件的这种方法，形成具有开口的层间绝缘膜。通过溅射在开口中形成第一导电构件。在形成第一导电部件之前，首先在能够降低层间电介质膜的湿度和羟基量的温度下进行热处理。因此，当第一导电部件嵌入开口时，层间电介质膜具有少量的水分和羟基，从而提高了第一导电部件的嵌入特性。因此，当开口具有小直径时，也可以提高接触部的电特性。

4. 发明授权

US06399478B2 Method of making a dual damascene structure with modified insulation 失效
标题翻译：制造具有改性绝缘材料的双镶嵌结构的方法
公开(公告)号：US06399478B2
公开(公告)日：2002-06-04
申请号：US09788661
申请日：2001-02-21
申请人： Naoteru Matsubara , Hideki Mizuhara
发明人： Naoteru Matsubara , Hideki Mizuhara
IPC分类号： H01L214763
CPC分类号： H01L21/76825 , H01L21/76807
摘要： A semiconductor device having a dual damascene structure having a highly reliable multilayered interconnection is applied to the present invention. A protective film (12) is formed on a first interconnection (11), and a modified SOG film (13a) is then provided thereon. An etch stopper film (14) is formed on the modified SOG film (13a), and a modified SOG film (15a) is then formed. The modified SOG film (15a), the etch stopper film (14), and the modified SOG film (13a) are etched away using a resist pattern, to form a via hole (17). The modified SOG film (15a) is etched away using the resist pattern, to form a recess (19) serving as a trench interconnection portion. The etch stopper film (14) and the protective film (12) which are exposed are removed, and the recess is filled with a conductive material (20), to form a conductive plug in the via hole and a second interconnection.
摘要翻译：具有高度可靠的多层互连的双镶嵌结构的半导体器件被应用于本发明。在第一互连（11）上形成保护膜（12），然后在其上提供改性SOG膜（13a）。在改性SOG膜（13a）上形成蚀刻停止膜（14），然后形成改性SOG膜（15a）。使用抗蚀剂图案蚀刻掉改性SOG膜（15a），蚀刻停止膜（14）和改性SOG膜（13a），以形成通孔（17）。使用抗蚀剂图案蚀刻掉改性SOG膜（15a），形成用作沟槽互连部分的凹部（19）。去除暴露的蚀刻停止膜（14）和保护膜（12），并且用导电材料（20）填充凹部，以在通孔和第二互连中形成导电塞。

5. 发明授权

US06917110B2 Semiconductor device comprising an interconnect structure with a modified low dielectric insulation layer 有权
标题翻译：半导体器件包括具有改性的低介电绝缘层的互连结构
公开(公告)号：US06917110B2
公开(公告)日：2005-07-12
申请号：US10310138
申请日：2002-12-05
申请人： Naoteru Matsubara , Hideki Mizuhara , Takashi Goto
发明人： Naoteru Matsubara , Hideki Mizuhara , Takashi Goto
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L23/5226 , H01L21/76802 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76834 , H01L21/76835 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A semiconductor device capable of inhibiting a conductive plug from increase of resistance or disconnection resulting from moisture discharged from a first insulator film while reducing the capacitance between adjacent first interconnection layers is obtained. This semiconductor device comprises a plurality of first interconnection layers formed on a semiconductor substrate at a prescribed interval, a first insulator film, formed to fill up the clearance between the plurality of first interconnection layers, having an opening reaching the first interconnection layers and a conductive plug charged in the opening of the first insulator film and formed to be in contact with the first interconnection layers. An impurity is selectively introduced into a first region of the first insulator film in the vicinity of contact surfaces between the first interconnection layers and the conductive plug, thereby selectively modifying the first region of the first insulator film.
摘要翻译：可以获得能够抑制导电插头在降低相邻的第一互连层之间的电容的同时增加从第一绝缘膜释放的湿气引起的电阻或断开的半导体装置。该半导体器件包括以规定间隔形成在半导体衬底上的多个第一互连层，形成为填充多个第一互连层之间的间隙的第一绝缘膜，具有到达第一互连层的开口和导电充电在第一绝缘膜的开口中并形成为与第一互连层接触的插头。在第一互连层和导电插塞之间的接触表面附近，选择性地将杂质引入到第一绝缘膜的第一区域中，从而选择性地改变第一绝缘膜的第一区域。

6. 发明申请

US20060191894A1 Electronic appliance using heat radiation plate 审中-公开
标题翻译：电子电器采用散热板
公开(公告)号：US20060191894A1
公开(公告)日：2006-08-31
申请号：US11362121
申请日：2006-02-27
申请人： Ryosuke Usui , Hideki Mizuhara , Yasunori Inoue , Noriaki Kojima , Hiroyuki Watanabe , Shinya Nakano
发明人： Ryosuke Usui , Hideki Mizuhara , Yasunori Inoue , Noriaki Kojima , Hiroyuki Watanabe , Shinya Nakano
IPC分类号： H05B3/68
CPC分类号： G06F1/203 , H05K7/20445
摘要： In a heat radiation structure for an electronic appliance in which heat generated in a heat generating member inside a flap of the electronic appliance is radiated to a space outside the flap, a heat radiation plate integrally formed with a circuit element is thermally coupled to the heat generating member and is exposed outside the flap. Heat generated in the heat generating member is conducted to the heat radiation plate via a contact portion and is radiated to a space outside the flap from an exposed surface along with heat generated in the circuit element.
摘要翻译：在用于电子设备的热辐射结构中，其中在电子设备的翼片内的发热元件中产生的热量辐射到翼片外部的空间，与电路元件整体形成的散热板热耦合到热并且暴露在皮瓣外部。在发热元件中产生的热量经由接触部分被传导到散热板，并且随着在电路元件中产生的热量从露出的表面辐射到翼片之外的空间。

7. 发明授权

US06177343B1 Process for producing semiconductor devices including an insulating layer with an impurity 有权
标题翻译：用于制造包括具有杂质的绝缘层的半导体器件的工艺
公开(公告)号：US06177343B1
公开(公告)日：2001-01-23
申请号：US09429698
申请日：1999-10-28
申请人： Hiroyuki Watanabe , Hideki Mizuhara , Kaori Misawa , Masaki Hirase , Hiroyuki Aoe
发明人： Hiroyuki Watanabe , Hideki Mizuhara , Kaori Misawa , Masaki Hirase , Hiroyuki Aoe
IPC分类号： H01L214763
CPC分类号： H01L21/02164 , H01L21/02126 , H01L21/02129 , H01L21/02131 , H01L21/022 , H01L21/02211 , H01L21/02216 , H01L21/02274 , H01L21/02282 , H01L21/02321 , H01L21/02351 , H01L21/3115 , H01L21/31155 , H01L21/3121 , H01L21/316 , H01L21/31612 , H01L21/31625 , H01L21/31633 , H01L21/76801 , H01L21/76802 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76834 , H01L21/76877
摘要： A semiconductor device and a process for producing the same. The device has two conducting layers that are spaced from each other and an insulating film for electrically insulating these two conducting layers from each other. The insulating film contains contact holes with plugs being embedded therein so as to electrically connect these two conducting layers by the plugs. The process contains a step of forming the insulating film on the lower conducting layer. An impurity having a kinetic energy is introduced into the insulating film. Next, contact holes are formed in the insulating film, and then plugs are formed in the contact holes. An upper conducting layer is formed on the insulating film so as to be electrically connected to the plugs.
摘要翻译：半导体器件及其制造方法。该器件具有彼此间隔开的两个导电层和用于将这两个导电层彼此电绝缘的绝缘膜。绝缘膜包含嵌入其中的插塞的接触孔，以便通过插头将这两个导电层电连接。该方法包括在下导电层上形成绝缘膜的步骤。具有动能的杂质被引入到绝缘膜中。接下来，在绝缘膜中形成接触孔，然后在接触孔中形成插塞。在绝缘膜上形成上导电层以与插头电连接。

8. 发明授权

US5898221A Semiconductor device having upper and lower wiring layers 失效
标题翻译：具有上和下布线层的半导体器件
公开(公告)号：US5898221A
公开(公告)日：1999-04-27
申请号：US953822
申请日：1997-09-25
申请人： Hideki Mizuhara , Shinichi Tanimoto , Hiroyuki Watanabe , Yasunori Inoue
发明人： Hideki Mizuhara , Shinichi Tanimoto , Hiroyuki Watanabe , Yasunori Inoue
IPC分类号： H01L21/768 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53223 , H01L21/76838 , H01L23/5329 , H01L2924/0002
摘要： A semiconductor device having a semiconductor substrate and a wiring layer, which is doped with an impurity, located on the substrate. The semiconductor device has upper and lower wiring layers apart from each other. An electric insulating film electrically insulates between the upper and lower wiring layers. The insulating film has a contact hole. A wiring material is packed with the contact hole to electrically connect the upper and lower wiring layers. The impurity is contained in the lower wiring layer to decrease its resistivity.
摘要翻译：具有半导体衬底和掺杂有杂质的布线层的半导体器件位于衬底上。半导体器件具有彼此分开的上和下布线层。电绝缘膜在上下布线层之间电绝缘。绝缘膜具有接触孔。布线材料装有接触孔以电连接上下布线层。杂质包含在下布线层中以降低其电阻率。

9. 发明授权

US06794283B2 Semiconductor device and fabrication method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US06794283B2
公开(公告)日：2004-09-21
申请号：US09320271
申请日：1999-05-27
申请人： Hiroyuki Watanabe , Hideki Mizuhara , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Yamaoka , Yasunori Inoue
发明人： Hiroyuki Watanabe , Hideki Mizuhara , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Yamaoka , Yasunori Inoue
IPC分类号： H01L214763
CPC分类号： H01L21/02126 , H01L21/022 , H01L21/02274 , H01L21/02351 , H01L21/31155 , H01L21/316 , H01L21/76801 , H01L21/76807 , H01L21/76808 , H01L21/7681 , H01L21/76825 , H01L23/5226 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device superior in reliability and suitable for microminiaturization is provided. An organic SOG film is formed on a silicon oxide film. Boron ions are implanted into the organic SOG film. By introducing boron ions into the organic SOG film, the organic components in the film are decomposed. Also, the moisture and hydroxyl group included in the film are reduced. After a metal interconnection is embedded in a modified SOG film by the Damascene method, a modified SOG film is formed thereon. Then, contact holes are formed. After a contact hole interconnection is embedded in the contact holes, a modified SOG film and an upper metal interconnection are formed by the Damascene method.
摘要翻译：提供了可靠性优异并且适合于微型化的半导体器件。在氧化硅膜上形成有机SOG膜。将硼离子注入到有机SOG膜中。通过将硼离子引入有机SOG膜中，膜中的有机成分被分解。此外，膜中包含的水分和羟基也被还原。通过镶嵌法将金属互连嵌入改性SOG膜中之后，形成改性SOG膜。然后，形成接触孔。在接触孔嵌入接触孔互连后，通过镶嵌法形成改性SOG膜和上金属互连。

10. 发明授权

US6071807A Fabrication method of semiconductor device including insulation film with decomposed organic content 失效
标题翻译：具有分解有机物含量的绝缘膜的半导体器件的制造方法
公开(公告)号：US6071807A
公开(公告)日：2000-06-06
申请号：US997049
申请日：1997-12-23
申请人： Hiroyuki Watanabe , Hideki Mizuhara , Kimihide Saito
发明人： Hiroyuki Watanabe , Hideki Mizuhara , Kimihide Saito
IPC分类号： H01L21/28 , H01L21/265 , H01L21/3115 , H01L21/316 , H01L21/768 , H01L29/78 , H01L21/00
CPC分类号： H01L21/76859 , H01L21/31155 , H01L21/76801 , H01L21/76819 , H01L21/76825 , H01L21/7685
摘要： A semiconductor device including an interlayer insulation film is obtained, superior in planarization, insulation characteristics, and adhesion, suitable for microminiaturization of an element, and without inducing the problem of signal delay. In the fabrication method of this semiconductor device, an interconnection is formed on semiconductor substrate. Then, a first insulation film is formed so as to be in contact on the interconnection. Impurities are introduced into the first insulation film under a condition where the impurities arrive at least at the interconnection. As a result, the first insulation film is reduced in moisture and becomes less hygroscopic. Therefore, the insulation characteristics of the first insulation film is improved. When an SOG film superior in planarization is employed as the first insulation film, it is possible to directly form that SOG film on an underlying interconnection. In addition, the adhesion intensity between the first insulation film and the interconnection is improved. Furthermore, the distance between the pattern in the underlying interconnection can be reduced. Also, the capacitance between the interconnections is reduced.
摘要翻译：获得包括层间绝缘膜的半导体器件，其平坦化，绝缘特性和粘合性优异，适用于元件的微小化，并且不引起信号延迟的问题。在该半导体器件的制造方法中，在半导体衬底上形成互连。然后，形成第一绝缘膜以在互连上接触。杂质在杂质到达至少互连的条件下被引入第一绝缘膜。结果，第一绝缘膜的湿度降低并且吸湿性变差。因此，提高了第一绝缘膜的绝缘特性。当采用平面化优异的SOG膜作为第一绝缘膜时，可以在下面的互连上直接形成SOG膜。此外，提高了第一绝缘膜和互连之间的粘附强度。此外，底层互连中的图案之间的距离可以减小。此外，互连之间的电容减小。

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