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1. 发明授权

US08650353B2 Apparatus, system, and method for refreshing non-volatile memory 有权
标题翻译：用于刷新非易失性存储器的装置，系统和方法
公开(公告)号：US08650353B2
公开(公告)日：2014-02-11
申请号：US13174926
申请日：2011-07-01
申请人： Hanmant P. Belgal , Xin Guo , Sai Krishna Mylavarapu , Neal R. Mielke
发明人： Hanmant P. Belgal , Xin Guo , Sai Krishna Mylavarapu , Neal R. Mielke
IPC分类号： G11C16/34 , G06F12/02
CPC分类号： G11C16/3431 , G06F12/0246 , G11C16/3418
摘要： Described herein are an apparatus, system, and method for refreshing a non-volatile memory. The method comprises loading a time stamp, corresponding to data in a data location of a non-volatile memory, to a register; determining an elapsed time, corresponding to the data in the data location, according to the loaded time stamp; and refreshing data of the data location for which it is determined that the elapsed time exceeds a refresh time associated with the non-volatile memory.
摘要翻译：这里描述了用于刷新非易失性存储器的装置，系统和方法。该方法包括将对应于非易失性存储器的数据位置中的数据的时间戳加载到寄存器; 根据加载的时间戳确定对应于数据位置中的数据的经过时间; 以及确定所述经过时间超过与所述非易失性存储器相关联的刷新时间的数据位置的刷新数据。

2. 发明申请

US20130007344A1 Apparatus, System, and Method for Refreshing Non-volatile Memory 有权
标题翻译：用于刷新非易失性存储器的装置，系统和方法
公开(公告)号：US20130007344A1
公开(公告)日：2013-01-03
申请号：US13174926
申请日：2011-07-01
申请人： Hanmant P. Belgal , Xin Guo , Sai Krishna Mylavarapu , Neal R. Mielke
发明人： Hanmant P. Belgal , Xin Guo , Sai Krishna Mylavarapu , Neal R. Mielke
IPC分类号： G06F12/02
CPC分类号： G11C16/3431 , G06F12/0246 , G11C16/3418
摘要： Described herein are an apparatus, system, and method for refreshing a non-volatile memory. The method comprises loading a time stamp, corresponding to data in a data location of a non-volatile memory, to a register; determining an elapsed time, corresponding to the data in the data location, according to the loaded time stamp; and refreshing data of the data location for which it is determined that the elapsed time exceeds a refresh time associated with the non-volatile memory.
摘要翻译：这里描述了用于刷新非易失性存储器的装置，系统和方法。该方法包括将对应于非易失性存储器的数据位置中的数据的时间戳加载到寄存器; 根据加载的时间戳确定对应于数据位置中的数据的经过时间; 以及确定所述经过时间超过与所述非易失性存储器相关联的刷新时间的数据位置的刷新数据。

3. 发明申请

US20170139631A1 CONFIGURATION INFORMATION BACKUP IN MEMORY SYSTEMS 有权
公开(公告)号：US20170139631A1
公开(公告)日：2017-05-18
申请号：US15377200
申请日：2016-12-13
申请人： Ning Wu , Robert E. Frickey , Hanmant P. Belgal , Xin Guo
发明人： Ning Wu , Robert E. Frickey , Hanmant P. Belgal , Xin Guo
IPC分类号： G06F3/06
CPC分类号： G06F3/0632 , G06F3/0604 , G06F3/0647 , G06F3/065 , G06F3/0688 , G06F11/1417
摘要： According to one configuration, a memory system includes a configuration manager and multiple memory devices. The configuration manager includes status detection logic, retrieval logic, and configuration management logic. The status detection logic receives notification of a failed attempt by a first memory device to be initialized with custom configuration settings stored in the first memory device. In response to the notification, the retrieval logic retrieves a backup copy of configuration settings information from a second memory device in the memory system. The configuration management logic utilizes the backup copy of the configuration settings information retrieved from the second memory device to initialize the first memory device.

4. 发明授权

US08954650B2 Apparatus, system, and method for improving read endurance for a non-volatile memory 有权
标题翻译：用于提高非易失性存储器的读取耐久性的装置，系统和方法
公开(公告)号：US08954650B2
公开(公告)日：2015-02-10
申请号：US13234446
申请日：2011-09-16
申请人： Hanmant P. Belgal , Ning Wu , Paul D. Ruby , Andrew Vogan , Xin Guo , Ivan Kalastirsky , Mase J. Taub
发明人： Hanmant P. Belgal , Ning Wu , Paul D. Ruby , Andrew Vogan , Xin Guo , Ivan Kalastirsky , Mase J. Taub
IPC分类号： G06F12/00 , G06F12/02 , G11C16/04 , G11C16/34
CPC分类号： G06F12/0246 , G06F2212/7205 , G11C16/0483 , G11C16/3422
摘要： Described are an apparatus, system, and method for improving read endurance for a non-volatile memory (NVM). The method comprises: determining a read count corresponding to a block of NVM; identifying whether the block of NVM is a partially programmed block (PPB); comparing the read count with a first threshold when it is identified that the block is a PPB; and when identified otherwise, comparing the read count with a second threshold, wherein the first threshold is smaller than the second threshold. The method further comprises: identifying a block that is a PPB; determining a first word line corresponding to un-programmed page of the PPB; and sending the first word line to the NVM, wherein the NVM to apply: a first read voltage level to word lines corresponding to the un-programmed pages of the PPB, and a second read voltage level to word lines corresponding to programmed pages of the PPB.
摘要翻译：描述了用于改善非易失性存储器（NVM）的读取耐久性的装置，系统和方法。该方法包括：确定对应于NVM块的读取计数; 识别NVM的块是否是部分编程块（PPB）; 当识别出块是PPB时，将读取计数与第一阈值进行比较; 并且当另外标识时，将读取计数与第二阈值进行比较，其中第一阈值小于第二阈值。该方法还包括：识别作为PPB的块; 确定对应于PPB的未编程页面的第一字线; 以及将所述第一字线发送到所述NVM，其中所述NVM应用：对应于所述PPB的未编程页面的字线的第一读取电压电平和对应于所述PPB的编程页面的字线的第二读取电压电平 PPB。

5. 发明申请

US20140307507A1 EXTENDED SELECT GATE LIFETIME 有权
标题翻译：扩展选择门锁生命
公开(公告)号：US20140307507A1
公开(公告)日：2014-10-16
申请号：US14313155
申请日：2014-06-24
申请人： Yogesh Wakchaure , Kiran Pangal , Xin Guo , Qingru Meng , Hanmant P. Belgal
发明人： Yogesh Wakchaure , Kiran Pangal , Xin Guo , Qingru Meng , Hanmant P. Belgal
IPC分类号： G11C16/16
CPC分类号： G11C16/14 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/102 , G11C16/16 , G11C16/26 , G11C16/3418 , G11C16/3445 , G11C29/028 , H01L27/115
摘要： A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command. A flash controller may be coupled to the flash memory device, and is capable of sending the select gate erase commend to the flash memory device if the information provided by the flash memory device indicates that the voltage threshold of at least one of the select gates is above a predetermined voltage level, and sending the select gate program command to the flash memory device if the information provided by the flash memory device indicates that the voltage threshold of at least one of the select gates is outside of a predetermined voltage range.
摘要翻译：闪存器件可以包括在快闪存储器单元块中被组织为NAND串的两个或更多个闪存单元，以及在相对端耦合到NAND串的闪存单元，用作选择门。闪速存储器件可以能够向闪存控制器提供与选通门的电压阈值相关的信息，擦除响应于选择栅极擦除命令而用作选择栅极的闪存单元，以及编程用作响应于选择门程序命令选择门。闪存控制器可以耦合到闪存设备，并且如果闪存设备提供的信息指示至少一个选择门的电压阈值是如果由闪速存储器件提供的信息指示至少一个选择门的电压阈值在预定电压范围之外，则将选择门程序命令发送到闪速存储器件。

6. 发明申请

US20130073786A1 APPARATUS, SYSTEM, AND METHOD FOR IMPROVING READ ENDURANCE FOR A NON-VOLATILE MEMORY 有权
标题翻译：用于改善非易失性存储器的读取容忍度的装置，系统和方法
公开(公告)号：US20130073786A1
公开(公告)日：2013-03-21
申请号：US13234446
申请日：2011-09-16
申请人： Hanmant P. Belgal , Ning Wu , Paul D. Ruby , Andrew Vogan , Xin Guo , Ivan Kalastirsky , Mase J. Taub
发明人： Hanmant P. Belgal , Ning Wu , Paul D. Ruby , Andrew Vogan , Xin Guo , Ivan Kalastirsky , Mase J. Taub
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7205 , G11C16/0483 , G11C16/3422
摘要： Described are an apparatus, system, and method for improving read endurance for a non-volatile memory (NVM). The method comprises: determining a read count corresponding to a block of NVM; identifying whether the block of NVM is a partially programmed block (PPB); comparing the read count with a first threshold when it is identified that the block is a PPB; and when identified otherwise, comparing the read count with a second threshold, wherein the first threshold is smaller than the second threshold. The method further comprises: identifying a block that is a PPB; determining a first word line corresponding to un-programmed page of the PPB; and sending the first word line to the NVM, wherein the NVM to apply: a first read voltage level to word lines corresponding to the un-programmed pages of the PPB, and a second read voltage level to word lines corresponding to programmed pages of the PPB.
摘要翻译：描述了用于改善非易失性存储器（NVM）的读取耐久性的装置，系统和方法。该方法包括：确定对应于NVM块的读取计数; 识别NVM的块是否是部分编程块（PPB）; 当识别出块是PPB时，将读取计数与第一阈值进行比较; 并且当另外标识时，将读取计数与第二阈值进行比较，其中第一阈值小于第二阈值。该方法还包括：识别作为PPB的块; 确定对应于PPB的未编程页面的第一字线; 以及将所述第一字线发送到所述NVM，其中所述NVM应用：对应于所述PPB的未编程页面的字线的第一读取电压电平和对应于所述PPB的编程页面的字线的第二读取电压电平 PPB。

7. 发明申请

US20140089563A1 CONFIGURATION INFORMATION BACKUP IN MEMORY SYSTEMS 有权
标题翻译：内存系统配置信息备份
公开(公告)号：US20140089563A1
公开(公告)日：2014-03-27
申请号：US13628356
申请日：2012-09-27
申请人： Ning Wu , Robert E. Frickey , Hanmant P. Belgal , Xin Guo
发明人： Ning Wu , Robert E. Frickey , Hanmant P. Belgal , Xin Guo
IPC分类号： G06F12/16
CPC分类号： G06F3/0632 , G06F3/0604 , G06F3/0647 , G06F3/065 , G06F3/0688 , G06F11/1417
摘要： According to one configuration, a memory system includes a configuration manager and multiple memory devices. The configuration manager includes status detection logic, retrieval logic, and configuration management logic. The status detection logic receives notification of a failed attempt by a first memory device to be initialized with custom configuration settings stored in the first memory device. In response to the notification, the retrieval logic retrieves a backup copy of configuration settings information from a second memory device in the memory system. The configuration management logic utilizes the backup copy of the configuration settings information retrieved from the second memory device to initialize the first memory device.
摘要翻译：根据一种配置，存储器系统包括配置管理器和多个存储器设备。配置管理器包括状态检测逻辑，检索逻辑和配置管理逻辑。状态检测逻辑接收由第一存储器设备进行的失败尝试的通知，以便通过存储在第一存储器设备中的自定义配置设置进行初始化。响应于该通知，检索逻辑从存储器系统中的第二存储器设备检索配置设置信息的备份副本。配置管理逻辑使用从第二存储器设备检索的配置设置信息的备份副本来初始化第一存储器设备。

8. 发明授权

US08510636B2 Dynamic read channel calibration for non-volatile memory devices 有权
标题翻译：用于非易失性存储器件的动态读通道校准
公开(公告)号：US08510636B2
公开(公告)日：2013-08-13
申请号：US13078226
申请日：2011-04-01
申请人： Paul D. Ruby , Hanmant P. Belgal , Yogesh B. Wakchaure , Xin Guo , Scott E. Nelson , Svanhild M. Salmons
发明人： Paul D. Ruby , Hanmant P. Belgal , Yogesh B. Wakchaure , Xin Guo , Scott E. Nelson , Svanhild M. Salmons
IPC分类号： G11C29/00
CPC分类号： H03M13/6325 , G06F11/1048 , G11C16/00 , G11C16/0483 , G11C16/3495 , G11C29/021 , G11C29/028 , G11C29/52 , G11C2029/0409 , G11C2029/0411 , H03M13/09 , H03M13/136 , H03M13/1505 , H03M13/1515 , H03M13/152 , H03M13/19
摘要： Embodiments of the invention describe a dynamic read reference voltage for use in reading data from non-volatile memory cells. In embodiments of the invention, the read reference voltage is calibrated as the non-volatile memory device is used. Embodiments of the invention may comprise of logic and or modules to read data from a plurality of non-volatile memory cells using a first read reference voltage level (e.g., an initial read reference voltage level whose value is determined by the non-volatile device manufacturer). An Error Checking and Correction (ECC) algorithm is performed to identify whether errors exist in the data as read using the first read reference voltage level. If errors in the data as read are identified, a pre-determined value is retrieved to adjust the first read reference voltage level to a second read reference voltage level.
摘要翻译：本发明的实施例描述了用于从非易失性存储器单元读取数据的动态读取参考电压。在本发明的实施例中，读取的参考电压被校准为使用非易失性存储器件。本发明的实施例可以包括使用第一读取参考电压电平（例如，初始读取参考电压电平，其值由非易失性器件制造商确定的）从多个非易失性存储器单元读取数据的逻辑和/或模块）。执行错误检查和校正（ECC）算法以识别使用第一读取参考电压电平读取的数据中是否存在错误。如果识别出读取的数据中的错误，则检索预定值以将第一读取参考电压电平调整到第二读取参考电压电平。

9. 发明申请

US20120254699A1 DYNAMIC READ CHANNEL CALIBRATION FOR NON-VOLATILE MEMORY DEVICES 有权
标题翻译：用于非易失性存储器件的动态读取通道校准
公开(公告)号：US20120254699A1
公开(公告)日：2012-10-04
申请号：US13078226
申请日：2011-04-01
申请人： PAUL D. RUBY , Hanmant P. Belgal , Yogesh B. Wakchaure , Xin Guo , Scott E. Nelson , Svanhild M. Salmons
发明人： PAUL D. RUBY , Hanmant P. Belgal , Yogesh B. Wakchaure , Xin Guo , Scott E. Nelson , Svanhild M. Salmons
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/6325 , G06F11/1048 , G11C16/00 , G11C16/0483 , G11C16/3495 , G11C29/021 , G11C29/028 , G11C29/52 , G11C2029/0409 , G11C2029/0411 , H03M13/09 , H03M13/136 , H03M13/1505 , H03M13/1515 , H03M13/152 , H03M13/19
摘要： Embodiments of the invention describe a dynamic read reference voltage for use in reading data from non-volatile memory cells. In embodiments of the invention, the read reference voltage is calibrated as the non-volatile memory device is used. Embodiments of the invention may comprise of logic and or modules to read data from a plurality of non-volatile memory cells using a first read reference voltage level (e.g., an initial read reference voltage level whose value is determined by the non-volatile device manufacturer). An Error Checking and Correction (ECC) algorithm is performed to identify whether errors exist in the data as read using the first read reference voltage level. If errors in the data as read are identified, a pre-determined value is retrieved to adjust the first read reference voltage level to a second read reference voltage level.
摘要翻译：本发明的实施例描述了用于从非易失性存储器单元读取数据的动态读取参考电压。在本发明的实施例中，读取的参考电压被校准为使用非易失性存储器件。本发明的实施例可以包括使用第一读取参考电压电平（例如，初始读取参考电压电平，其值由非易失性器件制造商确定的）从多个非易失性存储器单元读取数据的逻辑和/或模块）。执行错误检查和校正（ECC）算法以识别使用第一读取参考电压电平读取的数据中是否存在错误。如果识别出读取的数据中的错误，则检索预定值以将第一读取参考电压电平调整到第二读取参考电压电平。

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