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1. 发明专利

JPS59162715A Communication safety device 失效
标题翻译：通信安全设备
公开(公告)号：JPS59162715A
公开(公告)日：1984-09-13
申请号：JP3457783
申请日：1983-03-04
申请人： Hitachi Ltd , Nippon Telegraph & Telephone , Oki Electric Ind Co Ltd , Nippon Electric Co , Fujitsu Ltd
发明人： NOBUSAWA KOUICHI , KUROSAWA HIDEYUKI , TAKEI TADASHI , KOBAYASHI TOSHIMASA , OBARA SHINICHIROU
IPC分类号： H02H9/00

2. 发明专利

JPS56152357A OFFSET POTENTIAL APPLYING METHOD 失效
公开(公告)号：JPS56152357A
公开(公告)日：1981-11-25
申请号：JP5508380
申请日：1980-04-25
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： FUHA MASAHIRO , YASUDA TOYOJI , TAKEI TADASHI , YOSHIDA SUMIO , OBARA SHINICHIROU
IPC分类号： H04B1/74 , H04B3/00 , H04B3/40 , H04L25/02
摘要： PURPOSE:To settle the output potential of the receiving circuit to a constant value, by connecting series resistances between both ends of the matching terminating resistance, which is connected between two lines of the balanced transmission line, and differential input terminals of the receiving circuit and by applying the offset potential across differential input terminals. CONSTITUTION:One end of matching terminating resistance 5 is connected to differential input terminal 6 of receiving circuit 8 through series resistance 10. The other end of resistance 5 is connected to differential input terminal 7 of circuit 8 through series resistance 11. At the normal operation time, the signal level from transmission circuit 1 and the noise level generated on balanced transmission line 4 are attenuated by resistances 10 and 11. For the release of transmission line 4, the short-circuit fault, or the fault or power break of circuit 1, the output potential at output terminal 9 of circuit 8 is settled to a constant potential because a constant offset potential is applied across terminals 6 and 7 of circuit 8.

3. 发明专利

JPS5290240A MOUNTING OF LOGIC CIRCUIT 失效
公开(公告)号：JPS5290240A
公开(公告)日：1977-07-29
申请号：JP598476
申请日：1976-01-23
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： MIZUKAMI MASAO , YOSHIMURA KIYOSHI , OKAMURA KAZUMASA , IWASA KIYOUICHI , HORINO NAOHARU , TAZAKI MAKOTO , OBARA SHINICHIROU
IPC分类号： H03K19/00
摘要： PURPOSE:To transmit the pulse wave form of high speed logic circuit without distortion by reducing the influence owing to branch in use of damping resistance inserted on back board, when plural receiving circuits are connected to one operating logic circuit.

4. 发明专利

JPS5448456A DC BUS CIRCUIT OF BALANCING TYPE 失效
公开(公告)号：JPS5448456A
公开(公告)日：1979-04-17
申请号：JP11466477
申请日：1977-09-26
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , HITACHI LTD , OKI ELECTRIC IND CO LTD , FUJITSU LTD
发明人： UNZAI MINORU , KANEKO YOSHIMASA , OONISHI NOBORU , YAMADA TOMOHISA , AOKI KUNIO , OBARA SHINICHIROU
IPC分类号： G06F3/00
摘要： PURPOSE:To enable to avoid uncertainty of the operation of the reception circuit, if all the transmission circuits connected to DC bus circuit are inhibited. CONSTITUTION:Inputs of a plurality of transmission circuits 2 and reception circuit 3 are connected to the delivery line 1 constituted with balancing pair, and the terminator 4 is connected to the both ends of the delivery line 1. Further, the power supply circuit 5 is connected to the balance pair, this power supply impedance is constituted greater than the power supply impedance of the output terminal of the circuit 2, and DC offset voltage is given to the pairs of the delivery line 1.

5. 发明专利

JPS56107664A SIGNAL TRANSMISSION SYSTEM 失效
公开(公告)号：JPS56107664A
公开(公告)日：1981-08-26
申请号：JP1044880
申请日：1980-01-30
申请人： NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： YASUDA TOYOJI , TAKEI TADASHI , FUHA MASAHIRO , USUI IKUO , OBARA SHINICHIROU
IPC分类号： H03M5/08 , H04J3/06 , H04L25/49
摘要： PURPOSE:To enable to completely change the receiving circuit to an integrated circuit, by constituting the system so that binary information, frame information and clock information can be transmitted by means of one transmission circuit. CONSTITUTION:When a binary signal is transmitted, the signal is inverted (for instance, the signal is made to rise) in the specified direction at the start point of the unit width T of a constant period, and corresponding to the contents (''0'', ''1'') of the binary information, the signal is inverted (for instance, the signal is made to brake) in the opposite direction of said direction by shorter width than width of T/2 (for instance, it is made ''0''), or longer width (for instance, it is made ''1''), and it is transmitted. On the other hand, when the frame information F is transmitted, the inversion of signal is halted (the signal is not made to rise or break) as to 1 signal of unit width T, and the information is transmitted. The receiving circuit generates the clock CLI of the same phase as the rise (or breaking) point of the transmission signal, the CLII (T/2 delay phase) and the CLIII (T delay phase), and the binary information, the frame information and the clock information are detected from the CLI and the transmission signal, the negative signal of the CLIII and the logical product of the CLI, and the logical sum of the CLI and III, respectively.

6. 发明专利

JPS5469934A TERMINATION SYSTEM OF LOGIC CIRCUIT 失效
公开(公告)号：JPS5469934A
公开(公告)日：1979-06-05
申请号：JP13664277
申请日：1977-11-16
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： YOSHIDA SUMIO , KANEKO YOSHIMASA , AOKI KUNIO , UNZAI MINORU , OBARA SHINICHIROU
IPC分类号： H04L25/02 , H03K19/0175
摘要： PURPOSE:To reduce waveform distortion caused by a reflected signal by providing required terminating circuits to both the terminals of a transmission line to which a plural number of current change-over type digital integrated circuits (CML) are connected. CONSTITUTION:Terminating circuits composed of terminating resistances 13 and 15, and DC power supplies 14 and 16 are provided to terminals 11 and 12 of transmission line 1 to which CMLs 2 to 7 are connected, and resistance values of those terminating resistances 13 and 15 are set between 1.4 and 2.6Z0 denoting characteristic impedance of the line by Z0. As a result, reflection coefficients at terminals 11 and 12 are decreased to approximate one third, so that the waveform distortion will be reduced to one third of conventional one.

7. 发明专利

JPS51150215A BUS SIGNAL RECEIVING SYSTEM 失效
公开(公告)号：JPS51150215A
公开(公告)日：1976-12-23
申请号：JP7367175
申请日：1975-06-19
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： TAKEI TADASHI , KAWANOBE TADASHI , INOUE KATSUHIKO , YAMADA TOMOHISA , OBARA SHINICHIROU
IPC分类号： H04L25/02 , H04L12/40
摘要： PURPOSE:A bus signal receiving system capable of receiving a high velocity signal which passes through a bus transmission way connected with a transmission-reception circuit.

8. 发明专利

JPS57167098A VOICE SYNTHESIS SYSTEM 失效
公开(公告)号：JPS57167098A
公开(公告)日：1982-10-14
申请号：JP5258781
申请日：1981-04-08
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： YASUI YUTAKA , OBARA SHINICHIROU , ITAKURA FUMITADA , SAGAYAMA SHIGEKI , KUDAMURA NOBORU
IPC分类号： G10L13/00

9. 发明专利

JPS5556673A PHOTOCOUPLER 失效
公开(公告)号：JPS5556673A
公开(公告)日：1980-04-25
申请号：JP12998478
申请日：1978-10-24
申请人： FUJITSU LTD
发明人： MATSUNAGA HIROSHI , OBARA SHINICHIROU
IPC分类号： H01L31/12
摘要： PURPOSE:To prevent aging change in characteristics of a photocoupler in a simple constitution wherein a resistor whose resistance varies with the light from a light emitting diode is provided. CONSTITUTION:A resistor R whose resistance varies with the light from a LED 11 is connected in series with a photodetecting transistor 12. In this constitution, since the resistance of the resistor R increases with degradation of light-emitting efficiency of the LED, decrease in the transistor current due to the degradation of light emitting efficiency of the LED is compensated, and the voltage generated across the resistor R can be maintained at an approximately constant level.

10. 发明专利

JPS57176895A LOSS COMPENSATING CIRCUIT 失效
公开(公告)号：JPS57176895A
公开(公告)日：1982-10-30
申请号：JP6214481
申请日：1981-04-24
申请人： FUJITSU LTD
发明人： NAITOU WATARU , OBARA SHINICHIROU
IPC分类号： H04B3/04 , H04Q3/52 , H04Q3/58
摘要： PURPOSE:To improve transmission loss characteristics in the low frequency part between a trunk line and an extension circuit of a telephone exchange, and to uniform the transmission loss characteristics in a voice frequency band by connecting a negative characteristic impedance changed by frequency in series to a transformer and an electronic switch. CONSTITUTION:The primary side of a transformer T1 is connected to a central office line trunk CT of a telephone exchange and the primary side of a transformer T2 is connected to a long-line circuit LC. A CMOS switch SW is connected to the secondary sides of respective transformers T1, T2 and a loss compensating circuit N having terminals N1, N2 is connected to a series circuit consisting of the secondary sides of the transformers T1, T2 and the switch SW. The loss compensating circuit N is provided with an operation amplifier A for operating the inputs from the respective terminals N1, N2, resistances R, R1-R2 and capacitors C1-C3 so that input impedance Ai is changed by the inputted frequency. By the said configuration, the low frequency part of the transmission loss characteristics between the trunk line CT and the extension circuit LC are improved.

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