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1. 发明专利

JPS5711594A ELECTRONIC SWITCH NETWORK 失效
公开(公告)号：JPS5711594A
公开(公告)日：1982-01-21
申请号：JP8707380
申请日：1980-06-26
申请人： FUJITSU LTD
发明人： NAITOU WATARU , OBARA SHINICHIROU
IPC分类号： H04Q3/52 , H04Q3/58
摘要： PURPOSE:To improve the transmission characteristic and to prevent the deterioration of SN through the insertion of a switch network, by connecting the secondary side of (n) sets of transformers connecting channels at the primary side with each other via an electronic switch and providing a load impedance circuit in series with the switch. CONSTITUTION:To the secondary side of a transformer T1 to the primary side of which is connected with a main trunk CT, a transformer T2 connected to an extension circuit LC via a CMOS switch SW, is connected to constitute an electronic switch network for a button telephone device. At the secondary side of the transformer T1, the negative impedance circuit N having an operational amplifier A is connected in series. Further, by suitably selecting the circuit constant of the circuit N, the impedance from input terminals N1 and N2 is taken as negative characteristic and the negative impedance compensate the transmission loss by the switch network SW and the transformers T1, T2, the deterioration of the SN ratio is prevented and the transmission characteristic is improved.

2. 发明专利

JPS5412507A MF SIGNAL RECEIVING SYSTEM 失效
公开(公告)号：JPS5412507A
公开(公告)日：1979-01-30
申请号：JP7836377
申请日：1977-06-29
申请人： FUJITSU LTD
发明人： YOSHINO HARUYUKI , GOTOU SHINJI , NAITOU WATARU , OKAZAKI HIDEO
IPC分类号： H04Q1/45 , H04L27/26 , H04Q1/453
摘要： PURPOSE:To omit the BPF for each frequency by using LPF and HPF in combination, and thus to enhance the economical properties as well as to enable the LSI formation.

3. 发明专利

JPS60186122A DECODING SYSTEM 失效
公开(公告)号：JPS60186122A
公开(公告)日：1985-09-21
申请号：JP4270884
申请日：1984-03-06
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： NAITOU WATARU , YAMAGUCHI SUKETSUGU , NISHIKADO IWAMASA , SATOU HIROHIKO
IPC分类号： H03M7/50
摘要： PURPOSE:To eliminate the need to provide a sound volume control means to a subscriber telephone terminal by providing a level control part between the linear conversion part and a nonlinear conversion part in a code converting circuit. CONSTITUTION:The level control part 23 amplifies or attenuates an intermediate signal (b) in linear PCM code format from the linear conversion part 21 at a rate specified with a level specifying signal (d) and then outputs the resulting intermediate signal b' to the nonlinear conversion part 22. Then, the nonlinear conversion part 22 converts the intermediate signal b' into an output signal c' in nonlinear PCM code format and outputs the resulting signal. Thus, the output signal C' whose level is converted is outputted from the code converting circuit 2, so the need to provide the sound volume control means to a subscriber telephone terminal is eliminated.

4. 发明专利

JPS59114921A Level shifting circuit 失效
标题翻译：水平移位电路
公开(公告)号：JPS59114921A
公开(公告)日：1984-07-03
申请号：JP22452782
申请日：1982-12-21
申请人： Fujitsu Ltd
发明人： NAITOU WATARU , TAKENO MINORU
IPC分类号： H03K17/00 , H03K5/00 , H03K17/62
CPC分类号： H03K17/62
摘要： PURPOSE:To prevent the reduction of output signals due to overflow by using a multiplexer circuit of the final stage as a tristate output, and adding a control circuit consisting of a gate and a resistance. CONSTITUTION:A multiplexer circuit 1-k' having a tristate output is provided at the final stage among those multiplexer circuits which are connected in cascade each other. A control circuit consists of a gate 3 and resistances 4-1-4-n. The upper (m) units of output terminals of the circuit 1-k' are connected to the input terminal of the gate 3, and the output terminal of the gate 3 is connected to an output enable terminal E of the circuit 1-k'. At the same time, the output terminal of the circuit 1-k' is connected to the voltage +V showing the logic value 1 via resistances 4-1-4-n. With such a connection, a saturated output signal do' is delivered in case the upper (m) bits of the signal supplied to the circuit 1-k' are all set at logic 1. Thus it is possible to prevent the reduction due to an overflow of an output signal.
摘要翻译：目的：通过使用最终级的多路复用器电路作为三态输出来防止由于溢出而导致的输出信号的减少，并且添加由栅极和电阻组成的控制电路。构成：具有三态输出的多路复用器电路1-k'被提供在彼此级联的那些多路复用器电路中的最后级。控制电路由栅极3和电阻4-1-4-n组成。电路1-k'的输出端的上（m）个单元连接到栅极3的输入端，栅极3的输出端连接到电路1-k'的输出使能端E，。同时，电路1-k'的输出端通过电阻4-1-4-n连接到表示逻辑值1的电压+ V。通过这样的连接，在提供给电路1-k'的信号的高（m）位全部设置为逻辑1的情况下，输出饱和输出信号do'。因此，可以防止由于输出信号溢出。

5. 发明专利

JPS55130286A CHANNEL SWITCH 失效
公开(公告)号：JPS55130286A
公开(公告)日：1980-10-08
申请号：JP3791379
申请日：1979-03-30
申请人： FUJITSU LTD
发明人： YOSHINO HARUYUKI , GOTOU SHINJI , NAITOU WATARU
IPC分类号： H03K17/693 , H04Q3/52
摘要： PURPOSE:To realize a switch featuring a high degree of integration and a wide range by using the field effect transistor for the channel switch. CONSTITUTION:Capacitor 2 is provided between the gate and the source of field effect transistor 1. And with application of the pulse to 1st circuit 3, the charging is given to capacitor 2. As a result, the gate voltage increases to make transistor 1 conduct. Under these conditions, transistor 1 maintains the conducting state of good linearity. With application of pulse to 2nd circuit 4, capacitor 2 discharges to make transistor 1 nonconductive. Furthermore, transistor 1 is combined to the isolation diode to produce the matrix-type crosspoint. Thus the charge and discharge of the capacitor is controlled to secure a channel switch for the electronic exchange or the like.

6. 发明专利

JPS5730897A Voice data receiving system 失效
标题翻译：语音数据接收系统
公开(公告)号：JPS5730897A
公开(公告)日：1982-02-19
申请号：JP10601580
申请日：1980-08-01
申请人： Fujitsu Ltd , Nippon Telegraph & Telephone
发明人： HASHIMOTO SHIYUUICHI , NAITOU WATARU , SAGAYAMA SHIGEKI
IPC分类号： G10L19/00 , G10L13/00

7. 发明专利

JPS5534530A SELECTION SWITCH DEVICE 失效
公开(公告)号：JPS5534530A
公开(公告)日：1980-03-11
申请号：JP10663178
申请日：1978-08-31
申请人： FUJITSU LTD
发明人： NAITOU WATARU , NAITOU SHIYUNICHI
IPC分类号： H04N5/268 , H03K17/00 , H04Q3/52
摘要： PURPOSE:To eliminate the effect of the crosstalk of the switch matrix by installing the additional signal generator which generates the signals of more than the crosstalk component to the selection switch device. CONSTITUTION:Additional signal generator ASG is installed to the input or output side of PNPN-type semiconductor switch matrix SMX which gives a free connection release via control circuit CT to several units of input unit INn of the TV camera or the like as well as to several units of output unit OTn of the monitor TV or the like. And the control circuit gives a control so that the signal of more than the crosstalk component generated within the switch matrix which sent from ASG may be transmitted selectively to the output unit which is non-selected by the control signal. As a result, the crosstalk signals within the switch matrix are offset by the additional signals.

8. 发明专利

JPS5437402A STARTING SYSTEM FOR OPTICAL COMMUNICATION TELEPHONE SET 失效
公开(公告)号：JPS5437402A
公开(公告)日：1979-03-19
申请号：JP10253977
申请日：1977-08-29
申请人： FUJITSU LTD
发明人： YOSHINO HARUYUKI , GOTOU SHINJI , NAITOU WATARU , HASEGAWA KENZOU
IPC分类号： H04B10/00 , H04B10/80 , H04M1/00
摘要： PURPOSE:To ensure the starting for the telephone set with a smaller amount of the power consumption and through a simple constitution, by actuating the self-support type semiconductor through the light-electricity conversion of the optical information to inform the information to the subscriber and then securing a switch to the power source part's cell of the main body through the subscriber hookin.

9. 发明专利

JPS53145507A PB SIGNAL TRANSMITTING SYSTEM 失效
公开(公告)号：JPS53145507A
公开(公告)日：1978-12-18
申请号：JP6087877
申请日：1977-05-25
申请人： FUJITSU LTD
发明人： YOSHINO HARUYUKI , GOTOU SHINJI , NAITOU WATARU , OKAZAKI HIDEO
IPC分类号： H03B28/00 , H03K4/02 , H04M1/50
摘要： PURPOSE:To realize an LSI formation as well as high economical performance by producing the PB signal with use of a digital circuit.

10. 发明专利

JPS52130259A MULTI CPU CIRCUIT 失效
公开(公告)号：JPS52130259A
公开(公告)日：1977-11-01
申请号：JP4690276
申请日：1976-04-24
申请人： FUJITSU LTD
发明人： NAITOU WATARU , SHIRAI HITOSHI , YOSHINO HARUKOU
IPC分类号： G01G17/02 , G06F15/16 , G06F15/177
摘要： PURPOSE:To increase the processing ability, by arranging two CPU's in parallel and making organically coupled, and making operation independently and respectively.

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