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1. 发明专利

JPH04207360A VTR-INTEGRATED CAMERA 失效
公开(公告)号：JPH04207360A
公开(公告)日：1992-07-29
申请号：JP32891890
申请日：1990-11-30
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： SASAKI MASAHIRO , UTO KAZUO , KUMAGAI TOSHIRO , KAMISAKI YASUNORI
IPC分类号： H04N5/232
摘要： PURPOSE:To match both of the picture contour of an electronic view finder and the picture contour recorded on a magnetic recording medium by detecting the difference between both picture contours and controlling the focal length of a lens. CONSTITUTION:A picture contour detecting circuit 9 is inputted with a video signal 13 of the picture contour of the electronic view finder 7 and outputs the picture contour signal 14. The presence or absence of the signals 12, 14 is discriminated by a picture contour signal discriminating circuit 10 and the result thereof is inputted as a control signal 15 to a control circuit 3. A lens driving circuit 2 is controlled in the control circuit 3 only when a switch 16 is on the side a. The picture contour of the electronic view finder when the switch 16 is on the side a can be set by previously determining the set value of the discrimination threshold value of the picture contour signal control circuit 10. The driving circuit 2 is put to the initial setting by putting the switch 16 to the side b at the time of recording. The picture contour of the video signal recorded on the magnetic recording medium and the picture contour view finder 7 are then matched or set at a certain ratio.

2. 发明专利

JPS63288402A ROTARY HEAD TYPE MULTIPLE RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS63288402A
公开(公告)日：1988-11-25
申请号：JP12129787
申请日：1987-05-20
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： KOBAYASHI MASAHARU , UTO KAZUO , YUDE YASUSHI , AMADA NOBUTAKA , ARAI TAKAO , TOEDA HIROSHI , ZAMA HIDEO , MASUDA MICHIO
IPC分类号： H04N5/7826 , G11B5/02 , G11B5/53 , H04N5/782
摘要： PURPOSE:To record and reproduce signals while keeping compatibility with conventional systems, by optimizing combination of azimuthal angles, track distribution, and the recording order in accordance with each recording mode in case that three or more signals are recorded one over another. CONSTITUTION:An FM audio head 1a always precedes a PCM audio head 2a with respect to time, and the PCM audio head 2a always precedes a video head 3a. Polarities of azimuth of an FM audio recording track and a PCM audio recording rack are opposite, and those of the FM audio recording track and a video recording track are opposite. the band of a PCM audio signal is made higher than that of an FM audio signal and is made lower than that of a video signal, and the FM audio signal, the PCM audio signal, and the video signal are recorded by private heads 1a-3a in the order of recording wavelength, and centers of recording tracks of respective signals are allowed to approximately coincide with one another. Thus, compatibility with a conventional FM audio VTR and various head systems is possible.

3. 发明专利

JPS61196620A DIGITAL RECORDING SIGNAL REPRODUCING DEVICE 失效
公开(公告)号：JPS61196620A
公开(公告)日：1986-08-30
申请号：JP3642685
申请日：1985-02-27
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： ISO YOSHIMI , UTO KAZUO
IPC分类号： H03M1/66
摘要： PURPOSE:To obtain an analog output with a good linearity by separating the grand of respective flip flops of the counter composed of a flip flop and a sima of I L, and obtaining a higher order electric current switch control signal without a jitter. CONSTITUTION:An integrating type digital analog converter has an integrator composed of an operational amplifier 1 for integrating, a capacity 2 and a switch 3 to discharge the load of the capacity, and switches 9 and 10 are closed and supplied only during the period corresponding to the input digital data from an input terminal 8 set to a higher order 8-bit I L counter 6 and a lower order 8-bit I counter 7 from two constant electric current sources 4 and 5 in which a charging electric current of the capacity 2 is weighted to 2 :1. Thus, an analog output is obtained to an output terminal 11 of the integrator. Input digital data is latched to a latch circuit 14, and thereafter, the data are transferred to the above-mentioned counters 6 and 7, and the switching of switches 9 and 10 are respectively controlled by setting resetting flip flops 16 and 17.

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