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1. 发明专利

JPH1098070A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS PRODUCTION 失效
公开(公告)号：JPH1098070A
公开(公告)日：1998-04-14
申请号：JP24936496
申请日：1996-09-20
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , HITACHI DEVICE ENG
发明人： TOJO SHINJI , ICHIHARA SEIICHI , KOYAMA HIROSHI , AKIMOTO KOJI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device and its production method, by which a highly reliable TCP(tape carrier package) structure can be realized by improving flow of resin to the rear surface of a tape and suppressing the generation of cracks during a temperature cycle testing. SOLUTION: This semiconductor package of TCP structure is formed of a semiconductor chip 1, where a plurality of bumps 5 are formed on the main surface, a tape carrier 2 where a wiring 9 is formed on the main surface of a tape 7, and a solder resist 3 formed on the main surface of the tape carrier 2. The bumps 5 of the semiconductor chip 1 is connected with an inner lead 10 of the wiring 9 of the tape carrier 2, and the connected part is filled with a resin 4, forming a package structure. Further, on the main surface of the chip 1, a load-side end part, provided with the bumps 5 is made to be stepped 6, and the stepped horizontal part is overlapped with the end part on the opening side of the tape carrier 2 with a specified clearance in between.

2. 发明专利

JPH09306944A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH09306944A
公开(公告)日：1997-11-28
申请号：JP12006496
申请日：1996-05-15
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , HITACHI HOKKAI SEMICONDUCTOR
发明人： ICHIHARA SEIICHI , TOMIHARA SEIICHI , SUZUKI HIROMICHI , HARUTA AKIRA , TSUBOSAKI KUNIHIRO , OKADA JOJI , KANEMITSU NOBUYA
IPC分类号： H01L21/60 , H01L23/50
摘要： PROBLEM TO BE SOLVED: To reduce the number of leads with keeping a good throughput and suppressing the cost. SOLUTION: Coupling members 7 for electrically connecting those electrode pads for input/output of common signals among signal input/output electrode pads formed on a semiconductor chip 2 with specified circuit elements are formed on the chip 2. Leads 6 are composed of common leads 6a and independent leads 6b. The coupling members 7 are electrically connected to the common leads 6a and electrode pads other than the electrically connected pads are electrically connected to the independent leads 6b.

3. 发明专利

JPH08321565A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08321565A
公开(公告)日：1996-12-03
申请号：JP12606995
申请日：1995-05-25
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： KIMOTO RYOSUKE , ICHIHARA SEIICHI , ICHITANI MASAHIRO , TANAKA HIDEKI
IPC分类号： H01L23/12
摘要： PURPOSE: To prevent warping of base board and generation of reflow crack at the time of mounting at the time of leading out the bump electrode of a semiconductor chip electrically to the conductive part of base board through an intermediate conductor. CONSTITUTION: A through hole 3 is made in the center of a base board 2 and a semiconductor chip 4, comprising an LSI chip, is contained therein. Size of the through hole 3 is set such that a semiconductor chip 4 if different sizes can be contained. Thickness of the base board 2 is set larger than that of the semiconductor chip 4 contained in the through hole 3. A plurality of balls 5 of solder (Pb-Sn alloy), for example, are arranged in grid on the rear 2B of the base board 2 being connected with a mounting board. A lead 7, serving as an intermediate conductor, is arranged between the bump electrode 6 on the semiconductor chip 4 and a conductive pattern formed on the rear 4B of the base board 2 while being soldered at the opposite ends thereof.

4. 发明专利

JPH1140745A SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCORPORATING THE SAME 失效
公开(公告)号：JPH1140745A
公开(公告)日：1999-02-12
申请号：JP19228297
申请日：1997-07-17
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： KAWAKUBO HIROSHI , KIMOTO RYOSUKE , ICHIHARA SEIICHI , NAKAMURA TOSHIO
IPC分类号： H01L25/18 , H01L23/50 , H01L25/10 , H01L25/11 , H05K1/18 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To reduce the size of a stack mounting portion. SOLUTION: A plurality of semiconductor devices (TCP-type stack-mounting semiconductor devices) whose leads 5u and 5d are projected side by side from side surfaces of packages 4, 4d and 4u, and which are to be mounted on a wiring board so as to be superposed, are such that their leads have the same projecting length, and at least mounting ends of the leads 5u and 5d of one of the semiconductor devices are arranged side by side with mounting ends 6u and 6d of the leads of the other semiconductor device, so as to be superposed one upon another. The packages 4, 4u and 4d of the plurality of semiconductor devices have the same size. The semiconductor devices are constituted of memory semiconductor devices. The stack-mounting semiconductor devices are an upper TCP 3 and a lower TCP 2.

5. 发明专利

JPH10303255A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH10303255A
公开(公告)日：1998-11-13
申请号：JP10998297
申请日：1997-04-28
申请人： HITACHI LTD , HITACHI CHIYOU LSI SYS KK , HITACHI DEVICE ENG
发明人： OKAMURA KAZUHIRO , ICHIHARA SEIICHI , MORI HIROYUKI , AKIMOTO KOJI , KIMURA MAKOTO
IPC分类号： H01L21/60 , H01L21/56
摘要： PROBLEM TO BE SOLVED: To control the sneaking of resin to the backside of a tape carrier sealing resin and to realize slim TCP(tape carrier package). SOLUTION: A device is constituted of a tape carrier 2 which is provided with backside 2c that are overlapped and arranged with the outer peripheral part of a main face 1b of a semiconductor chip 1 and is provided with auxiliary opening parts 2e promoting the infiltrating of sealing resin at the time of sealing resin and of a resin sealing part 6 which resin-seals a joint part 4 of the electrode of the semiconductor chip 1 and the lead 2a of the tape carrier 2 and the peripheral part 5. Each auxiliary opening part 2e is provided for both end parts of a long device hole 2d where the leads 2a of the tape carrier 2 are arranged. Thus, the sneaking of resin from the main face 2b of the tape carrier 2 to a backside 2c in sealing resin is promoted.

6. 发明专利

JPH10229104A SEMICONDUCTOR DEVICE AND TAPE CARRIER WHICH IS USED FOR MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH10229104A
公开(公告)日：1998-08-25
申请号：JP3357297
申请日：1997-02-18
申请人： HITACHI LTD , HITACHI DEVICE ENG , HITACHI CHIYOU LSI SYS KK
发明人： AKIMOTO KOJI , ICHIHARA SEIICHI , KIMURA MAKOTO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To enhance the reliability of the connection of electrodes with leads supported by a tape, by a method wherein one electrode to a plurality of electrodes at both end parts of the long sides of a semiconductor chip is formed into a wide-area electrode or wide-area electrodes of an area wider than that of other electrodes, and at the same time, the connection parts of the leads, which are connected with the wide-area electrodes, are formed into wide- area connection parts of an area wider than that of the connection parts of other leads. SOLUTION: One electrode to a plurality of electrodes at both end parts of the long sides of a semiconductor chip 4 is widened for increasing the connection strength of the one electrode to the plurality of the electrodes at both end parts of the long sides of the chip 4 with leads 3, which are connected with this one electrode to the plurality of these electrodes, in comparison with the connection parts of other leads and at the same time, the connection parts 8 of the leads, which are connected with these wide-area electrodes, are formed into wire-area connection parts of an area wider than that of the connection parts of other leads. Thereby, the connection between the wide-area electrodes and connection reinforcing leads 15 having each wide-area connection part 14 is made at both end parts of the long sides of the slender chip 4. As a result, even if there is a warpage in a tape 2 for supporting the leads 3, the electrodes and the leads 3 result in being connected reliably with each other because a connection strength higher than the force of the warpage is obtained.

7. 发明专利

JP2004134471A Semiconductor device and its manufacturing method 审中-公开
公开(公告)号：JP2004134471A
公开(公告)日：2004-04-30
申请号：JP2002295503
申请日：2002-10-09
申请人： Hitachi Device Eng Co Ltd , Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 日立デバイスエンジニアリング株式会社 , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： TOJO SHINJI , KANEMITSU NOBUYA , ICHIHARA SEIICHI , NAKAMURA TOSHIO , AKIMOTO KOJI
IPC分类号： G02F1/1345 , H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/16227 , H01L2224/29082 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73204 , H01L2224/83101 , H01L2224/83851 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a technology by which pads having a prescribed size can be formed and different bumps can be formed on the pads by changing the sizes and arrangement of the bumps in accordance with the mounted form of a semiconductor chip and, in addition, is easily applicable to custom mounting of the chip and can shorten the development TAT. SOLUTION: In a semiconductor device, a semiconductor element circuit and its external electrodes (pads) 4 are formed on the main surface of a semiconductor substrate, and the electrodes (pads) 4 are electrically connected to the wiring (inner leads) of a wiring board through bumps. In the device, the sizes of external electrodes (pads) 5B are made uniform (equalized) and the bumps are formed by changing their sizes and arrangement in accordance with the mounted state of the semiconductor chip. Since probe coordinates can be separated, probe inspections can be performed easily. COPYRIGHT: (C)2004,JPO

8. 发明专利

MY123345A SEMICONDUCTOR DEVICE, ITS FABRICATION METHOD AND ELECTRONIC DEVICE 未知
公开(公告)号：MY123345A
公开(公告)日：2006-05-31
申请号：MYPI9905115
申请日：1999-11-24
申请人： HITACHI LTD
发明人： SASAKI MASAKO , ICHIHARA SEIICHI , KUDAISHI TOMOAKI , NAKAMURA HISAO , NISHI KUNIHIKO , TANAKA HIDEKI , NAKAJIMA YUTAKA , SUZUKI KAZUNARI
IPC分类号： H01L23/31 , H01L21/68 , H01L23/00 , H01L23/495 , H01L23/498
摘要： A SEMICONDUCTOR DEVICE (10) COMPRISES: A SEMICONDUCTOR CHIP (1) HAVING A CIRCUIT FABRICATION SURFACE (1X) AND AN ELECTRODE (1C);A RESIN (7) FOR COVERING THE CIRCUIT FABRICATION SURFACE (1X) OF THE SEMICONDUCTOR CHIP (1);AND A RESIN FILM (2) FOR COVERING A REAR SURFACE (1Y) FACING THE CIRCUIT FABRICATION SURFACE (1X) OF THE SEMICONDUCTOR CHIP (1).WITH THE CONFIGURATION DESCRIBED ABOVE, A CRACK CAN BE PREVENTED FROM BEING GENERATED IN THE SEMICONDUCTOR CHIP (1).(FIG.1)

9. 发明专利

JP2003197690A SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003197690A
公开(公告)日：2003-07-11
申请号：JP2001391049
申请日：2001-12-25
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： MIYAKI YOSHINORI , ICHIHARA SEIICHI , KANEMITSU NOBUYA
IPC分类号： H01L23/12 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To prevent the production of a defective product due to the cutting-off of a bump-connected inner lead. SOLUTION: In a semiconductor device where a plurality of bonding pads are arranged in series along the periphery of a semiconductor chip for bump- connecting inner leads to the bonding pads, an inner lead connected to the boding pad positioned at an outer end is made thick. The inner lead is prevented from being broken or cut off by reinforcing the inner lead of the outer end by the constitution of connecting the inner lead positioned at the outer end to a dummy bonding pad. Further, by the constitution of connecting the inner lead positioned at the outer end to the dummy bonding pad, the inner lead is not connected with the inner circuit of the semiconductor chip even when the inner lead positioned at the outer end is cut off. Thus, the function of the semiconductor is not damaged, thereby preventing the production of the defective product. COPYRIGHT: (C)2003,JPO

10. 发明专利

JP2003068793A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2003068793A
公开(公告)日：2003-03-07
申请号：JP2001257374
申请日：2001-08-28
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： MIYAKI YOSHINORI , ICHIHARA SEIICHI , HARUTA AKIRA
IPC分类号： H01L23/12 , H01L21/60
CPC分类号： H01L2224/16 , H01L2924/01078 , H01L2924/15311
摘要： PROBLEM TO BE SOLVED: To standardize a tape working and reduce defects due to bending of an inner lead.
SOLUTION: A semiconductor device is manufactured by electrically jointing a lead (the inner lead) of the tape for COF, a bump on a semiconductor chip and a ball (a soldering ball for example) for connecting an outer portion device and by sealing a bump connecting portion on the semiconductor chip with a sealing agent. A chip loading face for the tape for COF and a ball (the soldering ball for example) loading face for connecting the outer portion device are arranged on the same face. Tin (Sn) is plated or gold (Au) is plated on a surface of a jointing face of the inner lead (copper foil wiring) of the tape for COF and the bump on the semiconductor chip and on a surface of a jointing face of the inner lead and the soldering ball.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：标准化带子加工并减少由于内部引线的弯曲引起的缺陷。解决方案：半导体器件通过电连接用于COF的带的引线（内引线），半导体芯片上的凸块和用于连接外部器件的球（例如的焊球）和通过密封凸块使用密封剂在半导体芯片上连接部分。用于COF的带的芯片装载面和用于连接外部装置的球（例如焊球）装载面布置在同一个面上。镀锡（Sn）或金（Au）镀在COF带的内引线（铜箔布线）和半导体芯片上的凸块的接合面的表面上，内引线和焊球。

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