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1. 发明专利

JPH10303255A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH10303255A
公开(公告)日：1998-11-13
申请号：JP10998297
申请日：1997-04-28
申请人： HITACHI LTD , HITACHI CHIYOU LSI SYS KK , HITACHI DEVICE ENG
发明人： OKAMURA KAZUHIRO , ICHIHARA SEIICHI , MORI HIROYUKI , AKIMOTO KOJI , KIMURA MAKOTO
IPC分类号： H01L21/60 , H01L21/56
摘要： PROBLEM TO BE SOLVED: To control the sneaking of resin to the backside of a tape carrier sealing resin and to realize slim TCP(tape carrier package). SOLUTION: A device is constituted of a tape carrier 2 which is provided with backside 2c that are overlapped and arranged with the outer peripheral part of a main face 1b of a semiconductor chip 1 and is provided with auxiliary opening parts 2e promoting the infiltrating of sealing resin at the time of sealing resin and of a resin sealing part 6 which resin-seals a joint part 4 of the electrode of the semiconductor chip 1 and the lead 2a of the tape carrier 2 and the peripheral part 5. Each auxiliary opening part 2e is provided for both end parts of a long device hole 2d where the leads 2a of the tape carrier 2 are arranged. Thus, the sneaking of resin from the main face 2b of the tape carrier 2 to a backside 2c in sealing resin is promoted.

2. 发明专利

JPH10229104A SEMICONDUCTOR DEVICE AND TAPE CARRIER WHICH IS USED FOR MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH10229104A
公开(公告)日：1998-08-25
申请号：JP3357297
申请日：1997-02-18
申请人： HITACHI LTD , HITACHI DEVICE ENG , HITACHI CHIYOU LSI SYS KK
发明人： AKIMOTO KOJI , ICHIHARA SEIICHI , KIMURA MAKOTO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To enhance the reliability of the connection of electrodes with leads supported by a tape, by a method wherein one electrode to a plurality of electrodes at both end parts of the long sides of a semiconductor chip is formed into a wide-area electrode or wide-area electrodes of an area wider than that of other electrodes, and at the same time, the connection parts of the leads, which are connected with the wide-area electrodes, are formed into wide- area connection parts of an area wider than that of the connection parts of other leads. SOLUTION: One electrode to a plurality of electrodes at both end parts of the long sides of a semiconductor chip 4 is widened for increasing the connection strength of the one electrode to the plurality of the electrodes at both end parts of the long sides of the chip 4 with leads 3, which are connected with this one electrode to the plurality of these electrodes, in comparison with the connection parts of other leads and at the same time, the connection parts 8 of the leads, which are connected with these wide-area electrodes, are formed into wire-area connection parts of an area wider than that of the connection parts of other leads. Thereby, the connection between the wide-area electrodes and connection reinforcing leads 15 having each wide-area connection part 14 is made at both end parts of the long sides of the slender chip 4. As a result, even if there is a warpage in a tape 2 for supporting the leads 3, the electrodes and the leads 3 result in being connected reliably with each other because a connection strength higher than the force of the warpage is obtained.

3. 发明专利

JPH098208A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH098208A
公开(公告)日：1997-01-10
申请号：JP15020095
申请日：1995-06-16
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KIMURA MAKOTO , TOJO SHINJI , FUJIOKA TAKAHIRO , NARISAWA AKIHIKO , TANIGAWA YOSHIYUKI , KANEMITSU NOBUYA , AKIMOTO KOJI , MORI HIROYUKI
IPC分类号： H01L23/50 , G02F1/13 , G09G3/20 , H01L21/3205 , H01L21/60 , H01L23/12 , H01L23/495 , H01L23/52
摘要： PURPOSE: To provide a semiconductor device for a liquid crystal display which can be reduced in size without deteriorating the function and reliability of the device and can increase the display area of a liquid crystal display by fixing the size of the picture frame of the display device or can reduce the side of the picture frame by fixing the display area. CONSTITUTION: A lead-on-chip semiconductor device is constituted in such a way that the thin resin film 3a of a tape 3 for TCP is provided on the entire peripheral surface of the main surface of a semiconductor chip 1 and leads 4a and 4b are provided on the thin film 3a. Then the leads 4a and 4b are electrically connected to the input-output electrode pads or bumps 2a and 2b of the chip 1 and the electrically connecting sections are covered and sealed with a sealing resin 5.

4. 发明专利

JPH0574869A FILM SUBSTRATE FOR TAPE CARRIER TYPE SEMICONDUCTOR DEVICE AND TAPE CARRIER TYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0574869A
公开(公告)日：1993-03-26
申请号：JP23443491
申请日：1991-09-13
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： AKIMOTO KOJI , OBUCHI ATSUSHI , MORI HIROYUKI , UENO TATSUAKI
IPC分类号： H01L21/60 , H01L21/66 , H01L23/50
摘要： PURPOSE:To judge defects of a film substrate such as the degradation in resolution due to defective etching by setting an interval between wiring patterns to an allowable length of a tin whisker and a projection due to defective etching and checking the electrical continuity between the wiring patterns to electrically inspect the length of tin whiskers and projections. CONSTITUTION:Prepared is a film substrate which is to be used for a tape carrier type semiconductor device with a plurality of leads 2 transversely arrayed at a specified interval. This film substrate is provided with adjacent wiring patterns 2D at an interval smaller than that between outer parts of the leads 2. This automatizes the judgment of the film substrate acceptability and improves the reliability of a tape carrier type semiconductor device.

5. 发明专利

JP2002158263A PACKING METHOD OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002158263A
公开(公告)日：2002-05-31
申请号：JP2000355861
申请日：2000-11-22
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： AKIMOTO KOJI , MORI HIROYUKI , KIMURA MAKOTO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To reduce a yield from decreasing due to the adhesion of foreign maters by preventing an outer lead from being damaged and cut due to the position deviation between a tape carrier and a spacer tape. SOLUTION: In the packing method using the spacer tape, the spacer tape where projections are continuously provided with a constant pitch in the longitudinal direction at both the ends of the tape and the taper carrier are overlapped for winding, two rows of projections are provided at each of both ends, the inner projection row is allowed to correspond to the sprocket hole of the tape carrier, the outer projection row is formed at the tape carrier end section at a constant pitch in the longitudinal direction of the spacer tape, a spacer tape plane that is higher than the inner projection where the interval of projection is a pair in the lateral direction of the spacer tape is located between the projections is nearly as wide as the tape carrier, and the spacer tape and the tape carrier are overlapped for winding and are packed.

6. 发明专利

JPH1098070A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS PRODUCTION 失效
公开(公告)号：JPH1098070A
公开(公告)日：1998-04-14
申请号：JP24936496
申请日：1996-09-20
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , HITACHI DEVICE ENG
发明人： TOJO SHINJI , ICHIHARA SEIICHI , KOYAMA HIROSHI , AKIMOTO KOJI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device and its production method, by which a highly reliable TCP(tape carrier package) structure can be realized by improving flow of resin to the rear surface of a tape and suppressing the generation of cracks during a temperature cycle testing. SOLUTION: This semiconductor package of TCP structure is formed of a semiconductor chip 1, where a plurality of bumps 5 are formed on the main surface, a tape carrier 2 where a wiring 9 is formed on the main surface of a tape 7, and a solder resist 3 formed on the main surface of the tape carrier 2. The bumps 5 of the semiconductor chip 1 is connected with an inner lead 10 of the wiring 9 of the tape carrier 2, and the connected part is filled with a resin 4, forming a package structure. Further, on the main surface of the chip 1, a load-side end part, provided with the bumps 5 is made to be stepped 6, and the stepped horizontal part is overlapped with the end part on the opening side of the tape carrier 2 with a specified clearance in between.

7. 发明专利

JP2004134471A Semiconductor device and its manufacturing method 审中-公开
公开(公告)号：JP2004134471A
公开(公告)日：2004-04-30
申请号：JP2002295503
申请日：2002-10-09
申请人： Hitachi Device Eng Co Ltd , Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 日立デバイスエンジニアリング株式会社 , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： TOJO SHINJI , KANEMITSU NOBUYA , ICHIHARA SEIICHI , NAKAMURA TOSHIO , AKIMOTO KOJI
IPC分类号： G02F1/1345 , H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/16227 , H01L2224/29082 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73204 , H01L2224/83101 , H01L2224/83851 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a technology by which pads having a prescribed size can be formed and different bumps can be formed on the pads by changing the sizes and arrangement of the bumps in accordance with the mounted form of a semiconductor chip and, in addition, is easily applicable to custom mounting of the chip and can shorten the development TAT. SOLUTION: In a semiconductor device, a semiconductor element circuit and its external electrodes (pads) 4 are formed on the main surface of a semiconductor substrate, and the electrodes (pads) 4 are electrically connected to the wiring (inner leads) of a wiring board through bumps. In the device, the sizes of external electrodes (pads) 5B are made uniform (equalized) and the bumps are formed by changing their sizes and arrangement in accordance with the mounted state of the semiconductor chip. Since probe coordinates can be separated, probe inspections can be performed easily. COPYRIGHT: (C)2004,JPO

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