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1. 发明专利

DE3682415D1 未知
公开(公告)号：DE3682415D1
公开(公告)日：1991-12-19
申请号：DE3682415
申请日：1986-03-24
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： TAKIGAWA AKIRA , KONDO SHIZUO , KASAHARA MASUMI , HIRASHIMA TOSHINORI , HAIJIMA MIKIO , OGURA SETSUO , TAKADA OSAMU , AKAMATSU YOSHIKI
IPC分类号： H01C7/00 , H01L21/02 , H03M1/76 , H01L21/31 , H03M1/00
摘要： A resistor comprises a plurality of turn parts (a1 ... a8) whose corners (1A, 1B) have an obtuse flexional angle. Such resistors connected in series form a ladder resistor for use in an electron device.

2. 发明专利

HK141093A RESISTOR AND ELECTRON DEVICE EMPLOYING THE SAME 未知
公开(公告)号：HK141093A
公开(公告)日：1993-12-31
申请号：HK141093
申请日：1993-12-23
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： TAKIGAWA AKIRA , KONDO SHIZUO , KASAHARA MASUMI , HIRASHIMA TOSHINORI , HAIJIMA MIKIO
IPC分类号： H01C7/00 , H01L21/02 , H03M1/76 , H01L21/31 , H03M1/00
摘要： A resistor comprises a plurality of turn parts (a1 ... a8) whose corners (1A, 1B) have an obtuse flexional angle. Such resistors connected in series form a ladder resistor for use in an electron device.

3. 发明专利

JPS6123356A Apparatus for preventing electrostatic breakdown of semiconductor device 失效
标题翻译：防止半导体器件静电破坏的装置
公开(公告)号：JPS6123356A
公开(公告)日：1986-01-31
申请号：JP14239484
申请日：1984-07-11
申请人： Akita Denshi Kk , Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： TAKIGAWA AKIRA , HAIJIMA MIKIO , IHARA HIROSHI , WATABE TOMOYUKI , WASHIO KATSUYOSHI , IWASAKI ISAO
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H01L27/06
CPC分类号： H01L27/0255
摘要： PURPOSE:To absorb both positive and negative surge pulses by forming an n type buried layer as a protection resistance and using a junction diode composed of the n type region and the p type diffused region. CONSTITUTION:When a forward surge pulse enters the electrode in the input terminal side, a voltage drops due to a resistance while a surge current flows into the n type buried layer 5. Thereby, an input voltage is clamped to a value which is equal to a breakdown voltage of the p-n junction diode D1 between the n type region 6a and p type region 9. Namely, holes are implanted to a low potential p type layer 9 from the n type region 6a, causing a current I1 to flow and absorbing a surge pulse. A backward surge current operates the p-n junction diode between the n type region 6a and the p type diffused layer 9 and an input voltage is clamped to a voltage (GND-VF) which is equal to a difference between the ground voltage and forward voltage VF of diode, causing electrons to be implanted to the side of p type diffused layer 9 from the n type region 6a.
摘要翻译：目的：通过形成n +型埋层作为保护电阻并使用由n +型区域和p型扩散区域构成的结二极管来吸收正和负浪涌脉冲。构成：当正向浪涌脉冲进入输入端侧的电极时，在浪涌电流流入n +型埋层5的同时由于电阻而下降，由此，将输入电压钳位到等于n +型区域6a和p型区域9之间的pn结二极管D1的击穿电压。即，从n +型区域6a将空穴注入到低电位p型层9中，导致电流I1流动并吸收浪涌脉冲。反向浪涌电流在n +型区域6a和p型扩散层9之间操作pn结二极管，并且将输入电压钳位到等于接地电压和二极管的正向电压VF，使电子从n +型区域6a注入到p型扩散层9侧。

4. 发明专利

JPH04306837A RESIN SEALED SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04306837A
公开(公告)日：1992-10-29
申请号：JP7106891
申请日：1991-04-03
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： AKAMATSU YOSHINORI , TAKIGAWA AKIRA , MATSUSHITA TSUKASA
IPC分类号： H01L21/31 , H01L21/768 , H01L23/522
摘要： PURPOSE:To avoid the corrosion of wiring due to the permeation of water content into the wiring layer of a semiconductor pellet for improving the humidity resistance in the title resin sealed semiconductor device. resin CONSTITUTION:In the title resin sealed semiconductor device 1, a bonding metallic bodies 44B or 46B are arranged between interlayer insulating films 43 and 45 such as the region 11 around a semiconductor pellet 4, the region 12 around an outer terminal 46P or between the interlayer insulating film 45 and the final protective film 47 (a release preventive structure 7). Furthermore, the bonding metallic body 46B is connected to the lower layer bonding metallic body 44B while the bonding metallic body 44B is connected to the lower semiconductor region 42 (the release preventive structure 7 is to be stud-structured).

5. 发明专利

JPS61218157A RESISTOR 失效
公开(公告)号：JPS61218157A
公开(公告)日：1986-09-27
申请号：JP5841585
申请日：1985-03-25
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： TAKIGAWA AKIRA , KONDO SHIZUO , KASAHARA MASUMI , HIRASHIMA TOSHINORI , HAIJIMA MIKIO , OGURA SADAO
IPC分类号： H01C7/00 , H01L21/822 , H01L27/04 , H03M1/12
摘要： PURPOSE:To improve the ratio accuracy when a ladder type is particularly formed by forming the corners of a thin film resistor of bent flat pattern at an obtuse angle. CONSTITUTION:A thin film resistor R1 is formed by photoetching a metal resistor 1 made of aluminum or the like in a semiconductor integrated circuit device, and to increase the resistance value, the flat pattern shape is bent in a zigzag shape. The corners 1A, 1B of the pattern are formed at obtuse angle (approx. 135 deg.). Thus, a deformation due to etching is hardly laterally presented, to improve the product accuracy.

6. 发明专利

JPS6174366A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS6174366A
公开(公告)日：1986-04-16
申请号：JP19472784
申请日：1984-09-19
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： HOYA KAZUO , WATABE TOMOYUKI , HAIJIMA MIKIO , TAKIGAWA AKIRA , HAYASHI MAKOTO
IPC分类号： H01L21/8226 , H01L21/331 , H01L27/082 , H01L29/73 , H01L29/732
CPC分类号： H01L29/7325
摘要： PURPOSE:To improve the withstand voltage of a p-n-p subtransistor without increasing the manhour by a method wherein an n-type impurity of the concentration higher than that of the n-type Si layer is diffused in the n-type Si layer including the junction parts, which are formed of the n-type Si layer and the p-type diffusion layers. CONSTITUTION:An n type Si layer 2 is isolated by groove parts 3, and a region I, a region II and a region III are respectively used as a p-n-p sub-transistor forming part, an n-p-n transistor forming part and an IIL forming part. Donors are ion-implanted in the surfaces of the regions I and III, and GN (high- concentration n-type) regions II are formed. As a result, elongation of a depletion layer, which spreads from the substrate p-type layer, is reduced. Accordingly, the withstand voltage of the p-n-p sub-transistor can be improved.
摘要翻译：目的：为了提高pnp副晶体管的耐受电压，而不增加工作空间，其中浓度比n型Si层高的n型杂质扩散到包含接合部分的n型Si层中由n型Si层和p型扩散层形成。构成：n型Si层2被沟槽部分3隔离，区域I，区域II和区域III分别用作pnp子晶体管形成部分，npn晶体管形成部分和IIL 形成部分。在区域I和III的表面离子注入供体，形成GN（高浓度n型）区域II。结果，从衬底p型层扩散的耗尽层的伸长率降低。因此，可以提高p-n-p子晶体管的耐受电压。

7. 发明专利

JPS61220449A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61220449A
公开(公告)日：1986-09-30
申请号：JP6064285
申请日：1985-03-27
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： HAIJIMA MIKIO , ISHIKAWA MAKOTO , TAKIGAWA AKIRA , KONDO SHIZUO , TANIZAKI YASUNOBU
IPC分类号： H01L21/822 , H01L21/8226 , H01L27/02 , H01L27/04 , H01L27/082
摘要： PURPOSE:To obtain a highly integrated, highly reliable device, by forming a recess part in the surface of a chip, forming a thin digital circuit in the inner part, forming a thick analog circuit at the peripheral pat in a concentrated manner, implementing high speed and high performance of the digital circuit, and implementing high withstanding voltage of the analog circuit. CONSTITUTION:An n epitaxial layer 2 is provided on a p substrate 1, in which an n layer 3 is embedded. Selective etching is performed and a recess part 4 is formed at the central part. The central part 5 of the layer 2 is thin, and a peripheral part 6 is thick. A digital element such as I L is provided at the thin central part. The impurity distribution in the cross section of a transistor in the reverse direction is formed in a steep form. An operating margin is made high and the high speed I L is implemented. Meanwhile a bipolar n-p-n transistor at a linear part is formed in the thick peripheral part 50 that enough withstanding voltage is provided. In this configuration, stepped parts due to the irregularities of the surface are reduced, and wire breakdowns are decreased. This is especially useful when an organic insulating film is formed on the surface and multilayer wiring is provided.

8. 发明专利

JPS6123355A Apparatus for preventing electrostatic breakdown of semiconductor 失效
标题翻译：防止半导体静电破坏的装置
公开(公告)号：JPS6123355A
公开(公告)日：1986-01-31
申请号：JP14238984
申请日：1984-07-11
申请人： Akita Denshi Kk , Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： HAIJIMA MIKIO , TAKIGAWA AKIRA , IHARA HIROSHI , IWASAKI ISAO , WATABE TOMOYUKI
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H01L27/06
CPC分类号： H01L27/0248
摘要： PURPOSE:To absorb both forward and backward surge pulses by forming an n type buried layer as a protection resistance and allowing an input pulse to escape through utilization of the forward and backward npn transistor comprising an n type semiconductor region, p type diffused region and n type diffused region. CONSTITUTION:When a forward surge pulse enters the electrode in the side of input terminal B, a voltage drops due to a resistance R while a surge current I0 flows in the n type buried layer 5. Thereby, a forward npn transistor Q1 (composed of the n type semiconductor region 6a, p type semiconductor region 9 and n type semiconductor 10) operates and a current I1 flows into the ground electrode passing through the electrode on n type diffused region 10. When a backward surge pulse enters, a negative surge current flows to the side of circuit A through the n type buried layer 5, resulting in voltage drop. Therefore, a backward npn transistor Q2 where the p type region 9 is formed as the base, the n type diffused region 10 as the collector and n type semicondutor region as the emitter operates and a current I2 flows to the side of input terminal B.
摘要翻译：目的：通过形成n +型埋层作为保护电阻并允许输入脉冲通过利用包括n +型半导体区域的正向和反向npn晶体管来逸出来吸收正向和反向浪涌脉冲， p型扩散区和n +型扩散区。构成：当正向浪涌脉冲进入输入端子B侧的电极时，由于电阻R的电压下降，而浪涌电流I0在n +型埋层5中流动。因此，正向npn晶体管Q1 （由n型半导体区域6a，p型半导体区域9和n +型半导体10构成）工作，电流I1流入通过n +型扩散区域10上的电极的接地电极当反向浪涌脉冲进入时，负的浪涌电流通过n +型埋层5流向电路A侧，导致电压下降。因此，作为基极形成p型区域9的后向npn晶体管Q2，作为集电极的n +型扩散区域10和作为发射极的n +型半导体区域工作，电流I2流向输入端B.

9. 发明专利

JPS6123354A Apparatus for preventing electrostatic breakdown of semiconductor device 失效
标题翻译：防止半导体器件静电破坏的装置
公开(公告)号：JPS6123354A
公开(公告)日：1986-01-31
申请号：JP14238884
申请日：1984-07-11
申请人： Akita Denshi Kk , Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： IHARA HIROSHI , HAIJIMA MIKIO , TAKIGAWA AKIRA , WATABE TOMOYUKI , IWASAKI ISAO
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H01L27/06
CPC分类号： H01L27/0248
摘要： PURPOSE:To improve an electrostatic breakdown level up to about 100V by forming the n type diffused region by diffusion of emitter as a protection resistance and by absorbing the forward and backward surge pulse by allowing an input pulse to escape to Vcc through utilization of the npn transistor consisting of such n type region, p type diffused region and n type region. CONSTITUTION:In case the forward surge pulse enters the electrode in the side of input terminal, a voltage drops due to a resistance R while a surge current Io flows into the n diffused region 10. Thereby, the backward npn transistor, where the n type diffused region 10 used as the collector, the p type diffused region 9 as the base and the n type region 6a as the emitter, operatesk. Since the emitter side is connected to a high voltage side, electrons are implanted to the p type region 9 as the base from the n type region 6a which becomes the emitter, causing a current I1 to flow in order to absorb surge pulse. When the backward surge pulse enters the electrode in the input terminal side, a current I2 flows to the input terminal side from Vcc side, absorbing a surge pulse.
摘要翻译：目的：为了通过扩散发射极作为保护电阻形成n +型扩散区域，并通过允许输入脉冲通过利用来将输入脉冲逸出到Vcc来吸收正向和反向浪涌脉冲，来提高高达约100V的静电击穿电平由n +型晶体管组成的n +型区域，p型扩散区域和n +型区域。构成：在正向浪涌脉冲进入输入端侧的电极的情况下，由于电阻R的电压下降，而浪涌电流Io流入n +扩散区域10.因此，后向npn晶体管，其中用作集电极的n +型扩散区域10，作为基极的p型扩散区域9和作为发射极的n +型区域6a。由于发射极侧连接到高电压侧，因此电子从作为发射极的n +型区域6a注入作为基极的p型区域9，导致电流I1流过以吸收浪涌脉冲。当反向浪涌脉冲进入输入端侧的电极时，电流I2从Vcc侧流向输入端侧，吸收浪涌脉冲。

10. 发明专利

JPS59231839A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS59231839A
公开(公告)日：1984-12-26
申请号：JP10571783
申请日：1983-06-15
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： INABA TOORU , TAKAGI TATSUITSU , KOWASE YASUAKI , TAKIGAWA AKIRA
IPC分类号： H01L25/18 , H01L23/02 , H01L23/16 , H01L23/31 , H01L23/50 , H01L25/065 , H01L25/07 , H01L23/28 , H01L23/48 , H01L25/04
摘要： PURPOSE:To obtain an airtightly sealed package of high reliability at low cost by a method wherein an airtightly sealing cover is connected directly according to an airtightly sealing material to the surface of a semiconductor chip at the whole surface or at the ring type part along the periphery thereof. CONSTITUTION:The back of a semiconductor chip 2 is fixed to the tab 1 of a lead frame, a cover 3 of ceramics, glass, Si, metal material, etc. is provided facing to the surface of the chip, and airtightly sealed by glass or solder, etc. 4 at the frame type part along the periphery of the cover plate. Outside lead- out leads 5 are soldered directly to junction pads 6 at the periphery of the semiconductor substrate, and the outer edges thereof are bent downward. The semiconductor substrate 2, the cover 3, a part of each lead 5 are sealed according to epoxy resin 7 as occasion demands. To support the whole surface of the cover 3 on the surface of the chip 2 by the airtightly sealing material 4 and to connect is also favorable. According to this construction, the surface of the semiconductor chip can be cut off completely from the outside by a simple method, and the device of high reliability can be obtained.

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