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1. 发明专利

JP2000244571A DEVICE AND METHOD FOR NETWORK RELAY 失效
公开(公告)号：JP2000244571A
公开(公告)日：2000-09-08
申请号：JP4642299
申请日：1999-02-24
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： SUKAI KAZUO , AIMOTO TAKESHI , YAZAKI TAKEMI , MATSUYAMA NOBUHITO , SAKO YOSHITO , TANABE TOMOHIKO
IPC分类号： H04L29/06 , H04L12/70 , H04L12/701 , H04L12/741 , H04L12/775 , H04L12/861 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To perform routing and packet transfer at high speed. SOLUTION: A transfer engine stores a packet received through a network interface part 30 into a packet buffer 12 and stores header information into a header RAM 11. A retrieval engine 14 retrieves transfer control information such as transfer destination information and action information by using the header information and writes it in the header RAM 11. In the transfer engine 13, an output packet is prepared on the basis of the information stored in the packet buffer 12 and the header RAM 11 and outputted to the transfer destination. A switch part 20 switches the output packet to a routing processing part 10 of the destination. In the transfer engine 13, reception processing and transmission processing are executed and in the retrieval engine 14, input retrieval processing and output retrieval processing are executed. Each processing is performed under pipeline control while independently using necessary tables.

2. 发明专利

JP2000244570A DEVICE AND METHOD FOR NETWORK RELAY 失效
公开(公告)号：JP2000244570A
公开(公告)日：2000-09-08
申请号：JP4595999
申请日：1999-02-24
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： SUKAI KAZUO , AIMOTO TAKESHI , YAZAKI TAKEMI , MATSUYAMA NOBUHITO , SAKO YOSHITO , TANABE TOMOHIKO
IPC分类号： H04L12/701 , H04L12/28 , H04L12/46 , H04L12/70 , H04L12/741 , H04L12/775 , H04L12/861 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To achieve high speed routing while guaranteeing high communication quality (QoS), high reliability and security. SOLUTION: A transfer engine 13 stores a packet received through a network interface part 30 into a packet storage buffer 12 and stores header information into a header RAM 11. A retrieval engine 14 retrieves transfer control information such as transfer destination information and action information by using the header information and writes it in the header RAM 11. In the transfer engine 13, an output packet is prepared on the basis of the information stored in the packet buffer 12 and the header RAM 11 and outputted to the transfer destination. A switch part 20 switches the output packet to a routing processing part 10 of the destination. The header RAM 11 can be asynchronously accessed at high speed independently of the packet buffer 12 and suppresses the access competition of the transfer engine 13 and the retrieval engine 14.

3. 发明专利

JP2000083051A PACKET RELAYING METHOD AND PACKET RELAYING DEVICE 失效
公开(公告)号：JP2000083051A
公开(公告)日：2000-03-21
申请号：JP37442798
申请日：1998-12-28
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： KIMURA SATOSHI , SEKINO HIROSHI , HIROTA NAGAYUKI , HAYASHI HISAYOSHI , MORIMOTO SHIGEKI , SAKO YOSHITO , FUKUDA MASASHI
IPC分类号： H04L12/70 , H04L12/701 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To provide a packet relaying device without causing any packet relay wait caused by a route calculation. SOLUTION: A route calculating part 1 preliminarily distributes a relaying basic information 3 being the basis of route calculation to a forwarding part 2 and the part 2 decides a relaying route by utilizing a preliminarily distributed relaying basic information 6 in the case of receiving a packet where a destination does not exist in a relaying determination information 26, relays the packet and then reports noncoincidence destination information of the packet to the route calculating part 1. The part 1 formally produces relaying determination information according to the relaying basic information 3 and the noncoincidence destination information and distributes it to the forwarding part 2. The part 2 relays the same destination packet that arrives next according to the distributed relation determination information.

4. 发明专利

JP2000244573A DEVICE AND METHOD FOR NETWORK RELAY 失效
公开(公告)号：JP2000244573A
公开(公告)日：2000-09-08
申请号：JP4657999
申请日：1999-02-24
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： SUKAI KAZUO , AIMOTO TAKESHI , YAZAKI TAKEMI , MATSUYAMA NOBUHITO , SAKO YOSHITO , TANABE TOMOHIKO
IPC分类号： H04L12/46 , H04L12/70 , H04L12/701 , H04L12/741 , H04L12/775 , H04L12/823 , H04L12/865 , H04L12/911 , H04L12/947 , H04L12/56 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To perform high quality transfer under stable QoS(quality of service) control. SOLUTION: A transfer engine stores a packet received through a network interface part 30 into a packet buffer 12 and stores header information into a header RAM 11. A retrieval engine 14 retrieves transfer control information such as transfer destination information and action information by using the header information and writes it in the header RAM 11. In the transfer engine, an output packet is prepared on the basis of the information stored in the packet buffer 12 and the header RAM 11 and outputted to the transfer destination. A switch part switches the output packet to a routing processing part 10 of the destination. QoS control is individually executed at plural spots of an input side routing processing part 10, an output side routing processing part 10 and the switch part.

5. 发明专利

JP2000244574A DEVICE AND METHOD FOR NETWORK RELAY 失效
公开(公告)号：JP2000244574A
公开(公告)日：2000-09-08
申请号：JP4683799
申请日：1999-02-24
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： SUKAI KAZUO , AIMOTO TAKESHI , YAZAKI TAKEMI , MATSUYAMA NOBUHITO , SAKO YOSHITO , TANABE TOMOHIKO
IPC分类号： H04L29/06 , H04L12/70 , H04L12/701 , H04L12/741 , H04L12/775 , H04L12/801 , H04L12/861 , H04L12/865 , H04L12/879 , H04L12/911 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To perform various QoS(quality of service) control or filtering at high speed by detecting a flow at high speed. SOLUTION: A transfer engine 13 stores a packet received through a network interface part 30 into a packet buffer 12 and stores header information in a header RAM 11. A retrieval engine 14 retrieves transfer control information such as transfer destination information and action information with the header information and writes it in the header RAM 11. In the transfer engine 13, an output packet is prepared on the basis of information stored in the packet buffer 12 and the header RAM 11, and outputted to the transfer destination. A switch part 20 switches the output packet to a routing processing part 10 of the destination. A flow retrieval table defines the action of QoS or the like corresponding to the transfer source or the transfer destination information of the packet as an entry, divides it for each input port number and retrieves only the entry of the coincident input port number so that acceleration is attained.

6. 发明专利

JP2000115243A PACKET REPEATER AND MULTI-CAST SPEEDUP SYSTEM 失效
公开(公告)号：JP2000115243A
公开(公告)日：2000-04-21
申请号：JP28220598
申请日：1998-10-05
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY
发明人： AKAHA SHINICHI , SUKAI KAZUO , AIMOTO TAKESHI , MATSUYAMA NOBUHITO , SAKO YOSHITO , SEKINO HIROSHI
IPC分类号： G06F13/00 , H04L12/18 , H04L12/46 , H04L12/70 , H04L12/771 , H04L12/931 , H04L13/08 , H04L12/56 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To obtain a system that retrieves a multi-cast route for the retrieval of transmission port information used to transfer a received multi-cast packet succeedingly at a high speed. SOLUTION: A (p-th power of 2) tree is configured, by forming a route address and connecting a destination address and a transmission source address in this order, using nodes in total of (p-th power of 2 minus one), being the sum of one node of a binary retrieval tree corresponding to a bit pattern of the route address and nodes for p-stages directly beneath the node, and is stored in a memory 300, not one bit but p-consecutive bits of the route address obtained by connecting a destination address and a transmission source address to each other in this order of a received multi-cast packet are checked at the same time and the retrieval tree stored in the memory 300 is retrieved by using consecutive bit values for key so as to complete retrieval processing and passing through nodes by number of (bit number of retrieval keys÷p) times independently of number of entries.

7. 发明专利

JPH11341076A NETWORK REPEATER AND NEXT NETWORK TRANSFER DESTINATION RETRIEVAL METHOD 失效
公开(公告)号：JPH11341076A
公开(公告)日：1999-12-10
申请号：JP31723598
申请日：1998-11-09
申请人： HITACHI LTD
发明人： SUKAI KAZUO , AIMOTO TAKESHI , MATSUYAMA NOBUHITO , AKAHA SHINICHI , SAKO YOSHITO , TANABE NOBORU
IPC分类号： G06F17/30 , H04L12/66 , H04L12/701 , H04L12/745 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To eliminate a time for retrieval processing by a host number bit of a sub-network address by extending a node by the host number bit of the sub-network address at the time of retrieval of a host bit correspondence part of the sub-network address. SOLUTION: When nodes N0002, N0102, N1002 and N1102 of mask length 2 bit are extended at a fixed position of a memory, an address where the mask length 2 bit nodes are extended from values of a 0 and first bits are obtained, any of the mask length 2 bit nodes is jumped to, and a time is reduced by a time for node retrieval done twice. Generally speaking, when a node of a mask length (m) bit is extended at a fixed position on the memory and jumped to at a time, it is possible to reduce the time for retrieval by a time spent for crossing a node for (m) times of the node in total from a mask length 0 bit. On the other hand, as memory efficiency deterioration is invited by extending the node of the mask length (m) bit of the m-powered of 2 number regardless whether or not there is the node, a value (m) is decided from a trade-off between the memory efficiency and performance.

8. 发明专利

JPH09135273A INTER-NETWORK DEVICE 失效
公开(公告)号：JPH09135273A
公开(公告)日：1997-05-20
申请号：JP15997096
申请日：1996-06-20
申请人： HITACHI LTD
发明人： TSUCHIYA KAZUAKI , WATABE KEN , SAKO YOSHITO , OURA TETSUO
IPC分类号： G06F13/00 , G06F12/00 , H04L12/46 , H04L12/66 , H04L12/70 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To improve the packet processing capability of the entire device by taking statistics of processing times by each step of plural relay processing sets and using an adjustment means so as to provide command and adjustment to each processor so as to uniformize the processing load. SOLUTION: Relay sections 21'-24' provided individually to networks 5-8 are integrated by an adjustment section 25 via a message bus 91. Each relay section stores a packet sent/received ia transmission reception means 74-77 to storage means 64-67 tentatively and statistic means 52-55 take statistics of processing time for each step of relay processing. A transfer means of the adjustment section 25 transfers the statistic information sent from the relay sections 21'-24' and stores the information tentatively in the data buffer. An adjustment means 82 based on the statistic information gives a command to each of processors 1-4 via a processor 83 and an adjustment program memory 84 so as to uniformize the processing load of the processors 1-4. Thus, the packet processing capability of the entire device is improved.

9. 发明专利

JPH07191927A INTER-MODULE TRANSFER SYSTEM AND INFORMATION PROCESSOR FOR THIS SYSTEM 失效
公开(公告)号：JPH07191927A
公开(公告)日：1995-07-28
申请号：JP13408794
申请日：1994-06-16
申请人： HITACHI LTD , HITACHI SOFTWARE ENG
发明人： OURA TETSUO , TSUKAGOSHI MASAHITO , SAKO YOSHITO , IKEDA NAOYA , IKEDA MASASHI , TSUCHIYA KAZUAKI
IPC分类号： G06F15/16 , G06F13/00 , G06F15/163 , G06F15/177
摘要： PURPOSE:To provide the inter-module transfer system which efficiently realizes inter-module transfer in an information processor. CONSTITUTION:An information processor 5 consisting of a master module 18, slave modules A3a, B3b, and C3c, and a bus 4 for mutual connection of these modules is provided with interrupt signal lines as to 43 for inter-module transfer ana adopts the constitution where data to be transferred and control information of this data are transferred at a time as one packet. Since data to be transferred and control information of this data are transferred at a time as one packet by this constitution, the control system is made easy and the performance is improved.

10. 发明专利

JPH03240154A COMMAND INPUT SYSTEM 失效
公开(公告)号：JPH03240154A
公开(公告)日：1991-10-25
申请号：JP3372290
申请日：1990-02-16
申请人： HITACHI LTD
发明人： OGURA TOSHIHIKO , IKEDA NAOYA , SAKO YOSHITO , YAMASHITA YOSHIAKI
IPC分类号： G06F15/00
摘要： PURPOSE:To reduce the input processing frequency for an interactive program by providing an input data editing part which edits an interactive command and the data inputted interactively from outside and a store part which stores the editing result. CONSTITUTION:The input data editing parts 51-53 edit the data inputted interactively from outside to an interactive command into the reusable data to store these data in a store part 7. Meanwhile a batch type command is stored in the part 7 as it is, and an interactive command is converted into a batch type command and stored in the part 7. Thus not only the commands but the input data contained in these commands can be reused in regard of the contents stored in the part 7. As a result, the contents stored in the part 7 can be used as they are for execution of the same operations.

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