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1. 发明专利

JPH10301659A MICROPROCESSOR 失效
公开(公告)号：JPH10301659A
公开(公告)日：1998-11-13
申请号：JP11054897
申请日：1997-04-28
申请人： HITACHI LTD , HITACHI CHIYOU LSI SYS KK
发明人： MATSUDA KENGO , KAWASAKI IKUYA , AKAO YASUSHI , MATSUI SHIGESUMI , YAMAMOTO MITSUTAKE , HASHIMOTO KOJI
IPC分类号： G06F1/32 , G06F1/04
摘要： PROBLEM TO BE SOLVED: To substantially reduce power consumption by disposing a circuit for dynamically shifting a circuit block without the need of an operation among the plural circuit blocks to a low power consumption state. SOLUTION: A clock stoppage control circuit 42 inside a memory management unit 4 monitors the high-order three bits of address signals on a logical address bus 8a and judges which one of a cache area and a non-cache area a central processing unit 1 accesses and whether or not a so-called fixed physical space accessible only by a physical address is accessed. Then, control signals are sent to a clock supply/interruption circuit 19 and the supply of clock signals to a cache controller 7 is stopped at the time of accessing the non-cache area. Also, at the time of accessing the fixed physical space, the supply of the clock signals to the control part 41 of an address conversion circuit for converting a logical address to the physical address is stopped.

2. 发明专利

JPH09160831A INFORMATION PROCESSOR 失效
公开(公告)号：JPH09160831A
公开(公告)日：1997-06-20
申请号：JP31998995
申请日：1995-12-08
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： NISHIMOTO JUNICHI , YOSHIOKA SHINICHI , TAMAKI SANEAKI , MATSUI SHIGESUMI , TAKAKUBO KATSUJI , HASHIMOTO KOJI , TATEZAWA TAKESHI , FURUYAMA MIKIO
IPC分类号： G06F12/14 , G06F21/24
摘要： PROBLEM TO BE SOLVED: To protect the contents of a memory which is specially desired not to be read, e.g. a ROM or RAM, by providing an instruction level setting circuit and an execution level judging circuit which judges whether or not data are allowed to be read out or written according to the level of the level setting circuit. SOLUTION: An access level setting circuit decodes addresses and transfers levels by the addresses to a CPU through a bus 103. An access level judging circuit judges whether or not data is accessed by using a command sent from the CPU through a bus 101 and compares the level of the data access itself sent through a bus 014 with the level of an instruction itself issuing data access sent through a bus 105 when it is judged that the data is accessed. When this judging circuit allows the access, the driving of buses 107 and 108 connecting the CPU, and a memory and a peripheral circuit is controlled through a bus 106.

3. 发明专利

JPH0421196A INFORMATION RECORDING MEDIUM 失效
公开(公告)号：JPH0421196A
公开(公告)日：1992-01-24
申请号：JP12412390
申请日：1990-05-16
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： ISHIGURO TETSUO , MATSUI SHIGESUMI
IPC分类号： B42D15/10 , G06K19/00 , G07F7/08
摘要： PURPOSE:To sharply reduce probability of stealing the information recording medium by forming the medium as a ring like accessory put on a part of a human body and providing an information recording part for storing personal identification (ID) code information on the outer and inner peripheries of the accessory. CONSTITUTION:An ID ring body 11 has a shape similar to a general accessory ring and has a function of a ring put on one of fingers of a human's hand. Hard plastic such as polycarbonate is used as the material of the body 11. A bar code 13 to be identified by a computer at the time of reading out it mechanically is displayed so as to be stuck or printed to the surface of the outer periphery of the ring 11. In addition, Arabic numerals 14 corresponding to the ID number displayed by the bar code 13 are displayed on the surface of the inner periphery so as to be read out by human's eyes.

4. 发明专利

JPH01298460A INFORMATION PROCESSING SYSTEM AND PROCESSOR 失效
公开(公告)号：JPH01298460A
公开(公告)日：1989-12-01
申请号：JP12836288
申请日：1988-05-27
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： TONOMURA MOTONOBU , MATSUI SHIGESUMI , HASHIMOTO KOJI
IPC分类号： G06F9/38 , G06F15/80
摘要： PURPOSE:To execute an arithmetic instruction for operating a coprocessor in a main processor by freely using the number of a coprocessor identifier. CONSTITUTION:One number of a coprocessor identifier provided to control plural same types or different types of coprocessors 151-157 is arbitrarily assigned for a main processor 100, an arithmetic instruction for operating a coprocessor is decoded, and then, the classification destination inside and outside a processor to decide, control and execute in the main processor 100 can be arbitrarily executed. Thus, even when the arithmetic instruction function for a coprocessor is on-chipped in the main processor, the instruction can be controlled and executed without changing the conventional programmed arithmetic instruction for a coprocessor, without being conscious of it or arbitrarily.

5. 发明专利

JPH01298437A DATA PROCESSOR 失效
公开(公告)号：JPH01298437A
公开(公告)日：1989-12-01
申请号：JP12834788
申请日：1988-05-27
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： HASHIMOTO KOJI , KUBO MITSUYUKI , HASEGAWA ATSUSHI , MATSUI SHIGESUMI
IPC分类号： G06F9/22
摘要： PURPOSE:To promote the common operation of a micro-instruction, to shorten a micro-program and to delete a micro ROM capacity by providing a modifying circuit to be able to change an address held at an address register. CONSTITUTION:Two address registers AD to hold the peak address of a micro instruction group are provided, a modifying circuit MDF is provided corresponding to one side address register AD2, the contents of an address register AD2 are changed, and can be returned to the original register AD2 through a selector SEL 2 again. Thus, even when the same peak address is given to the different macro instruction, the peak address is changed on the way of the step, the program can be branched, the same micro-instruction can be commonly promoted, and therefore, the micro program can be shortened and the micro ROM capacity can be deleted.

6. 发明专利

JP2002007222A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002007222A
公开(公告)日：2002-01-11
申请号：JP2000188768
申请日：2000-06-23
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： MATSUMOTO YASUNORI , MATSUI SHIGESUMI
IPC分类号： G06F12/16 , G06F11/00 , H01L21/82 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which a specified mask ROM area can be replaced by a RAM area and an alternative RAM area can be substituted for a defective RAM area, even after the mask ROM is manufactured. SOLUTION: A functional part of an LSI of a microcomputer which substitutes for a mask ROM comprises a mask ROM 1, which has four areas sectioned by a specific capacity, an alternative RAM 2 which replaces a prescribed area of the mask ROM 1, an alternative area specifying register 3 which specifies an address for replacing the specific area of the mask ROM 1 with the alternative RAM 2, and an built-in memory control signal generation module 4, which generates a control signal of the mask ROM according to an address of substitution specification and an internal address by access, etc. Access to the mask ROM 1 set to the alternative area specifying register 3 is replaced with the alternative RAM 2.

7. 发明专利

JPH096490A MICROCOMPUTER AND DATA PROCESSING UNIT 失效
公开(公告)号：JPH096490A
公开(公告)日：1997-01-10
申请号：JP17673495
申请日：1995-06-20
申请人： HITACHI LTD
发明人： KAWASAKI IKUYA , YOSHIOKA SHINICHI , NARITA SUSUMU , YAMAMOTO MITSUTAKE , MATSUI SHIGESUMI , KANEKO SUSUMU
IPC分类号： G06F1/32 , G06F1/28 , G06F12/06 , G06F15/78
摘要： PURPOSE: To provide a microcomputer suitable for reducing the power consumption of the data processing unit. CONSTITUTION: The processing unit has an access state flag register 13 storing a access state to a memory and a control logic 12 generating a signal for low power consumption mode command with respect to a memory not accessed for a prescribed period based on the storage content of the access state flag register 13 to form a bus controller 21. Since the signal for commanding low power consumption mode to the memory not accessed for a prescribed period is obtained, the transit of a peripheral device to the low power consumption mode is made proper.

8. 发明专利

JPH08320796A DATA PROCESSOR 失效
公开(公告)号：JPH08320796A
公开(公告)日：1996-12-03
申请号：JP24087295
申请日：1995-08-25
申请人： HITACHI LTD
发明人： YOSHIOKA SHINICHI , KAWASAKI IKUYA , MATSUI SHIGESUMI , NARITA SUSUMU
IPC分类号： G06F11/00 , G06F9/30 , G06F9/32 , G06F9/48 , G06F12/10 , G06F9/46
摘要： PURPOSE: To shorten the time of transition from exception generation to a handler which copes with it. CONSTITUTION: The vector point of an exception processing handler regarding a TLB miss exception is obtained by adding a vector offset (H'400) to the vector base address of a register VBR. The vector point of an exception processing handler regarding an exception factor other than the TLB miss exception is obtained by adding the vector offset to the value (vector base address) of the register VBR. Then an exception factor code as an address offset which is obtained from a register EXPEVT or INTEVT is added to the obtained vector point. Consequently, branching to the necessary exception handler is performed to perform an exception process regarding the exception factor other than the TLB miss exception. The branch destination address need not be obtained by direct memory access.

9. 发明专利

JPH05120071A DATA PROCESSOR 失效
公开(公告)号：JPH05120071A
公开(公告)日：1993-05-18
申请号：JP30690191
申请日：1991-10-25
申请人： HITACHI LTD
发明人： YOSHIOKA SHINICHI , KONDO YOSHIYUKI , KAWASAKI IKUYA , MATSUI SHIGESUMI
IPC分类号： G06F9/38 , G06F11/28
摘要： PURPOSE:To acquire execution instruction trace including internal information and the software coverage rate of an execution instruction in real time in a state that the use of a built-in cache is enabled in a data processor which is provided with the built-in cache memory and pre-fetches an instruction. CONSTITUTION:A microprocessor 1 has an external trace cycle mode. This operation mode is set in a control register 80 by the specified instruction, and the microprocessor issues an external trace cycle synchronously with the change of a signal 98 to be asserted at every execution of the instruction, and outputs an execution instruction address a program counter 2 holds to an address bus 22, and outputs instruction length which an instruction length register 93 holds, to a data bus 21. Whether it is the external trace cycle or not is shown to the outside by a bus access type signal BAT. An emulator returns a data complete signal DC* after fetching information outputted in the external trace cycle, and after waiting it, the microprocessor finishes the external trace cycle.

10. 发明专利

JPS63211024A DATA PROCESSOR 失效
公开(公告)号：JPS63211024A
公开(公告)日：1988-09-01
申请号：JP4250487
申请日：1987-02-27
申请人： HITACHI LTD
发明人： MATSUI SHIGESUMI , KAWASAKI IKUYA
IPC分类号： G06F7/52 , G06F7/508 , G06F7/523 , G06F7/527
摘要： PURPOSE:To speed up multiplier operation by generating an input signal of an arithmetic operation unit through a selector which transmits a multiplicand, a complement, or zero selectively and a shifter which receives the output signal of the arithmetic operation unit in parallel. CONSTITUTION:The multiplicand is inputted to a register 1, which is supplied to a complement device 3 to generate the complement, and the multiplicand, complement, or data zero is supplied selectively to one input of the arithmetic operation unit 4 through the selector 3. The output signal of the arithmetic operation unit 4 is supplied to the other input of the arithmetic operation unit 4 in parallel through a shifter A5 and a shifter C7. A multiplier, on the other hand, is inputted to a shifter B6 and a signal consisting of plural bits required for unit arithmetic is supplied to a canonical recorder 2 through a code extending circuit 8 to generate control signals for the selector 3 and shifters A5 and C7, thereby performing partial product arithmetic corresponding to the plural bits.

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